Editorial
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The Transition to 300 mm Challenges, Risks and Rewards Following several years of an industry-wide effort with billions of dollars of R&D expense, and after an initial false start, the transition to the 300 mm wafer size has finally begun. Currently, one 300 mm pilot line is in production. In addition, recently, two 300 mm pilot lines produced their first chips and plan to move to production in 2001. Furthermore, eight 300 mm pilot fabs have schedules for first silicon in 2001. Overall, there are more than forty announced 300 mm fab plans over the next three years. Interestingly, the recent business slowdown has had little impact on the 300 mm transition. In fact, a number of companies have stated their intentions to continue their 300 mm projects or even move up 300 mm plans. However, some have lowered the initial wafer starts. The transition to 300 mm wafers has coincided with two other major technology transitions, namely, copper/ low-κ interconnect, and 0.13 µm design rules using sub-wavelength lithography. The move to an entirely new interconnect architecture, based on the damascene process with copper wires and low-κ dielectric materials, is designed to enhance the chip performance and reduce cost. This change is accompanied with the introduction of new processes including copper electroplating and copper CMP, leading to new defects such as copper ECD voids, copper CMP dishing and erosions, and microscratches. In lithography, the design rules are far below the wavelength of the laser light source. Sub-wavelength lithography has been made possible with advancements in steppers/scanners, tracks, metrology, reticles and resists. Of particular importance is the implementation of optical extensions such as optical proximity correction (OPC) and phase shift masks (PSM). These transitions require high levels of investment, combined with major innovations, and are accompanied by significant challenges and risks. To reduce the risks of the transition to 300 mm, the industry has initially focused on establishing pilot lines and transferring proven 0.18 µm processes with familiar aluminum interconnect from existing 200 mm manufacturing fabs. The main objectives of these pilot lines include evaluation and verification of process capability and performance readiness 4
Spring 2001
Yield Management Solutions
of various tools, understanding of fab automation issues, verification of ROI, identification of gaps, and 300 mm production learning. However, 300 mm fabs are being designed for the subsequent transition to 0.13 µm technology with copper/low-κ interconnect, within the first year of operation. The move to 300 mm wafers is primarily driven by the requirements for lower cost and higher productivity. Larger 300 mm wafers are also suitable for the large die sizes of high value complex products such as SOCs and advanced microprocessors. With approximately 2.25X more area than 200 mm wafers, 300 mm wafers will provide anywhere between 2.2X to 2.5X more die per wafer, leading to an estimated 30% cost reduction per wafer. This expected cost saving is based on several key assumptions including 300 mm/200 mm silicon wafer cost ratio of approximately 3.7X, and 300 mm/200 mm equipment cost ratio of approximately 1.3X. Currently, industry data indicates a wafer cost ratio of 6X to 8X and equipment cost ratio of 1.5X. Although the wafer cost is expected to reduce over the next few years, equipment costs will actually increase with time. It should also be noted that, due to insufficient infrastructure investment, in the interim, silicon supply and cost are of concern. The key question is how can the expected 30% cost reduction target be achieved? Among factors impacting the cost, yield and yield learning rate are important components of the cost equation. Clearly, to achieve the wafer cost reduction goal, the yield of 300 mm wafers should be higher than the earlier targets. In addition, accelerated yield learning is now more important than ever. Rapid timeto-information, as a result of accelerated yield learning, leads to rapid time-to-yield, time-to-volume and timeto-market. All these factors in turn directly contribute to lower cost, a better margin, and a higher return on investment. The cost of operating a typical, leadingedge, high volume 300 mm fab is estimated to be over $100,000 per hour. This clearly indicates that the return on investment as a result of higher yields, accelerated yield learning, and faster yield ramp could amount to tens and even hundreds of millions of dollars.
Yield Management
S S O O L L U U T T II O O N N S S
Advanced yield management and process control systems and methodologies are essential for enabling accelerated yield learning, rapid yield ramp and fast production ramp, as well as reducing the percentage of materials-at-risk in 300 mm fabs. Due to narrower process windows, 300 mm technology will be primarily impacted by systematic defects and faults. Higher value, 300 mm wafers require increased sampling per wafer to cover the larger sample area, to identify spatial yield problems, and to detect and reduce cost of excursions. As a result, proper 300 mm fab diagnostics planning and 300 mm sampling plan optimization provide significant cost savings and productivity improvements. To handle heavy FOUPs containing expensive 300 mm wafers and to enhance fab productivity, fabwide automation is an essential operational necessity. Therefore, factory automation solutions, including advanced process control, and guaranteed software integration and connectivity are key requirements. In fully automated 300 mm manufacturing fabs, “information flow” and “product flow” will effectively merge. This trend presents a unique opportunity for implementation of an integrated yield management and process control system. Clearly, yield and process control are important challenges for new 300 mm fabs. To address these challenges and to minimize the risks, a comprehensive set of value-added 300 mm defect and parametric control tools and solutions are required. Capabilities provided by these solutions should include leading-edge, high sensitivity inspection and metrology tools together with yield analysis and correlation software solutions that not only address 0.13 µm design rules challenges, but are also extendible to 0.10 µm design rules. In addition, 0.13 µm sub-wavelength lithography module solutions, and copper/low k module solutions are needed in order to facilitate process technology transitions. Furthermore, suppliers need to provide 300 mm expertise, best known methods, and optimized 300 mm recipes through experienced applications and solution engineers. The increased presence of tools and solutions suppliers in 300 mm fabs, as well as providing increased support to customers on 300 mm learning, are critical factors for reducing the risks of the transition to 300 mm wafers. In particular, yield management support in 200 mm to 300 mm process transfer, fab start-up, and fab ramp management is critical for success. The semiconductor industry is going through an unprecedented transformation. The 300 mm wafer fabs of the future will be significantly different from what we know today. Companies and manufacturers that are capable of meeting the challenges of these technology transitions and managing the risks will be rewarded with a stronger business and a successful path to the future.
E DITOR-IN-CHIEF Uma Subramaniam M ANAGING EDITOR Siiri Tuckwood C ONTRIBUTING EDITORS Aparjot Dehal Dave Hattorimanabe ART DIRECTOR AND P RODUCTION MANAGER Carlos Hueso D E S I G N C O N S U LTA N T Michael Garnica C I R C U L AT I O N M A N A G E R Rolando Gonzalez
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Bijan Moslehi, Ph.D. Vice President 300 mm Process Module Control Solutions Spring 2001
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Yield Management Solutions
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