Editorial
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The Transition to 300 mm Challenges, Risks and Rewards Following several years of an industry-wide effort with billions of dollars of R&D expense, and after an initial false start, the transition to the 300 mm wafer size has finally begun. Currently, one 300 mm pilot line is in production. In addition, recently, two 300 mm pilot lines produced their first chips and plan to move to production in 2001. Furthermore, eight 300 mm pilot fabs have schedules for first silicon in 2001. Overall, there are more than forty announced 300 mm fab plans over the next three years. Interestingly, the recent business slowdown has had little impact on the 300 mm transition. In fact, a number of companies have stated their intentions to continue their 300 mm projects or even move up 300 mm plans. However, some have lowered the initial wafer starts. The transition to 300 mm wafers has coincided with two other major technology transitions, namely, copper/ low-κ interconnect, and 0.13 µm design rules using sub-wavelength lithography. The move to an entirely new interconnect architecture, based on the damascene process with copper wires and low-κ dielectric materials, is designed to enhance the chip performance and reduce cost. This change is accompanied with the introduction of new processes including copper electroplating and copper CMP, leading to new defects such as copper ECD voids, copper CMP dishing and erosions, and microscratches. In lithography, the design rules are far below the wavelength of the laser light source. Sub-wavelength lithography has been made possible with advancements in steppers/scanners, tracks, metrology, reticles and resists. Of particular importance is the implementation of optical extensions such as optical proximity correction (OPC) and phase shift masks (PSM). These transitions require high levels of investment, combined with major innovations, and are accompanied by significant challenges and risks. To reduce the risks of the transition to 300 mm, the industry has initially focused on establishing pilot lines and transferring proven 0.18 µm processes with familiar aluminum interconnect from existing 200 mm manufacturing fabs. The main objectives of these pilot lines include evaluation and verification of process capability and performance readiness 4
Spring 2001
Yield Management Solutions
of various tools, understanding of fab automation issues, verification of ROI, identification of gaps, and 300 mm production learning. However, 300 mm fabs are being designed for the subsequent transition to 0.13 µm technology with copper/low-κ interconnect, within the first year of operation. The move to 300 mm wafers is primarily driven by the requirements for lower cost and higher productivity. Larger 300 mm wafers are also suitable for the large die sizes of high value complex products such as SOCs and advanced microprocessors. With approximately 2.25X more area than 200 mm wafers, 300 mm wafers will provide anywhere between 2.2X to 2.5X more die per wafer, leading to an estimated 30% cost reduction per wafer. This expected cost saving is based on several key assumptions including 300 mm/200 mm silicon wafer cost ratio of approximately 3.7X, and 300 mm/200 mm equipment cost ratio of approximately 1.3X. Currently, industry data indicates a wafer cost ratio of 6X to 8X and equipment cost ratio of 1.5X. Although the wafer cost is expected to reduce over the next few years, equipment costs will actually increase with time. It should also be noted that, due to insufficient infrastructure investment, in the interim, silicon supply and cost are of concern. The key question is how can the expected 30% cost reduction target be achieved? Among factors impacting the cost, yield and yield learning rate are important components of the cost equation. Clearly, to achieve the wafer cost reduction goal, the yield of 300 mm wafers should be higher than the earlier targets. In addition, accelerated yield learning is now more important than ever. Rapid timeto-information, as a result of accelerated yield learning, leads to rapid time-to-yield, time-to-volume and timeto-market. All these factors in turn directly contribute to lower cost, a better margin, and a higher return on investment. The cost of operating a typical, leadingedge, high volume 300 mm fab is estimated to be over $100,000 per hour. This clearly indicates that the return on investment as a result of higher yields, accelerated yield learning, and faster yield ramp could amount to tens and even hundreds of millions of dollars.