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Taking Sides to Optimize Wafer Surface Uniformity Backside Inspection Applications In Lithography Kay Lederer, Matthias Scholze, Ulrich Strohbach, Infineon Technologies Andreas Wocko, Thomas Reuter, Angela Schoenauer, KLA-Tencor Corporation
As the semiconductor industry ramps to sub-130 nm production capacity,1 the need for optimal uniformity across the wafer surface becomes a very important topic in lithography. Due to the tightening of depth of focus requirements the process window required to be able to print the required structure leaves little or no room for any localized deviation in the wafer uniformity. For 300 mm semiconductor device manufacturing, this resulted in the use of double-side polished, sometimes called “super flat� wafers. This paper will discuss methods to identify yield relevant defects on the wafer backside without having to sacrifice wafers. It is based on recent studies carried out at both Infineon Semiconductor 200 and 300 mm fabs in Dresden to characterize the need and the effectiveness of wafer backside defect inspection using the backside inspection module (BSIM) on the Surfscan SP1DLS.
Introduction
In contrast to bare wafer inspection strategies, semiconductor manufacturers are still in the early learning stages of implementing backside inspections of silicon wafers. Backside defects in the form of particles or topography are highly relevant to photolithography processing. Particularly in 300 mm photolithography, where double-sided polished wafers are used, such defects reduce surface uniformity and cause undesired effects on the exposure chuck. The two most common effects are focus spots and vacuum failures. For critical lithography layers with small process windows, focus spots have a direct impact on yield. Vacuum failures result in tool downtime, which impairs manufacturing efficiency. Moreover, backside contamination often results in time-consuming cleaning 6
Spring 2004
Yield Management Solutions
procedures of the exposure tool chuck. Experience indicates that 200 mm and 300 mm manufacturing share largely the same backside issues. The effects that backside defects can have on the devices built on the frontside of the wafer are largely known, but have not been systematically characterized. This is mainly because traditional backside inspection methods require wafers to be manually turned upside down with a vacuum wand to conduct a thorough inspection, which damages the devices on the frontside and could contaminate the inspection tool. Working with KLA-Tencor, Infineon Semiconductor investigated the effectiveness of a new inspection methodology for identifying yield-relevant defects on the wafer backside in an automated and non-destructive way at its 200 mm and 300 mm fabs in Dresden.