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Enhancing Overlay Metrology Productivity and Stability Using an Off-line Recipe Database Manager

by Stephen J. DeMoora, Stephanie Hilbun, George P. Beck III, Kristi L. Bushmana, Russell D. Fields, Texas Instruments Incorporated Robert M. Peters, Todd E. Calvert, KLA-Tencor Corporation

Tool cost of ownership and manufacturing productivity continue to be key factors in equipment selection discussions. Products that differentiate themselves by maximizing tool utilization and minimizing engineering resources make the best economic impact in a time of increasing fab capital costs. This paper will demonstrate the use of a single off-line recipe database manager (RDM) in conjunction with multiple optical misregistration measurement tools for the purpose of misregistration recipe creation and management in a high volume ASIC manufacturing line.

The manufacturing environment that exists in today’s high volume ASIC production fabs presents multiple logistic challenges to the photolithography sector. In such fabs, it is common to have hundreds of independent devices running concurrently. This, in turn, corresponds to having thousands or even tens of thousands of reticles active at any one time. Typically, each individual reticle will require independent recipes for stepper exposure, and the subsequent misregistration and critical dimension metrology steps. In such an environment, recipe creation and management become very large and critical tasks.

In order to maximize tool utilization and minimize cycle time impact, recipe setup time must be minimal. Furthermore, in order to ensure the robustness and stability of a large number of recipes, the number of personnel involved in recipe creation and maintenance should be minimized. To meet these requirements, the recipe management system must be fast, simple to use, and capable of easy replica44

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tion and/or distribution of recipes to multiple process tools within the fab. In an ideal case, the system should be capable of creating recipes off-line from the production tool without requiring a wafer, and be able to distribute recipes to process tools via network connections.

Historically, metrology tools have not been capable of meeting this ideal case, mainly due to restrictions placed on metrology equipment vendors by their customers. With limited real estate available in scribe lines, chip manufacturers have pushed metrology vendors to design flexible pattern recognition systems that do not require a specific alignment target to be placed in the scribe. As a result, most metrology systems on the market today require that recipe setup be performed on the tool using a production wafer in order to acquire the necessary pattern recognition and measurement site templates with the proper illumination and other setup conditions.

The limitations described above can be overcome to a large degree by using a system that allows for storage of “master� templates for pattern recognition and measurement site setup. Furthermore, by using some forethought, a standard pattern recognition structure can be designed for use by multiple types of metrology

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systems (overlay, CD SEM, film thickness, etc.), while minimizing the scribe line space used. By using standard structures, and taking advantage of process similarities across multiple devices, a system can be developed that allows for nearly 100 percent off-line, waferless recipe creation. The strategy for using such a system to handle recipe creation and management for overlay metrology systems, along with the associated productivity and recipe stability improvements will be discussed for the remainder of this paper.

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Parameters

Wafer Map

Run time options Wafer selection Data output options

Wafer orientation Grid layout and offset Step pitch

Alignment

Tests

Pattern recognition image Pattern recognition location*

Misregistration target image Measurement options Measurement locations*

*Denotes a parameter that is associated with the element, but is physically linked to the recipe, not the element.

Recipe and element management strategy

For the work presented in this paper, a KLA-Tencor Recipe Database Manager (RDM) was used in conjunction with multiple KLA-Tencor overlay metrology systems installed in Texas Instruments’ DMOS 5 production facility. The RDM consists of a server with a database for storing recipes and recipe elements with clients which allow for the creation, editing, and distribution of recipes. The server is linked to each of the overlay systems via network connection to allow for easy recipe distribution. The RDM database employs a library structure that allows for recipe elements to be easily manipulated and also allows multiple recipes to share the same element. Inside the RDM database, the standard recipes are broken down into a series of four separate recipe elements. (Table 1.)

The first goal is to develop a strategy that minimizes the total number of elements required to support all recipe creation for the fab. Figure 1a describes an ASIC fab scenario with two distinct product families. The product families are differentiated by unique manufacturing process flows. Within a single product family, there are several different devices that run on the same

Process Flow X Device X1

Device X2

Process Flow Y

Device X3

Device Y1

Device Y2

Level 1x Level 1x

Level 1x

Level 1y

Level 1y

Level 1y

Level 2x Level 2x

Level 2x

Level 2y

Level 2y

Level 2y

Level 3x Level 3x

Level 3x

Level 3y

Level 3y

Level 3y

• • •

• • •

• • •

• • •

•••

• • •

Level Nx Level Nx ••• Level Nx

• • •

Level Ny

•••

Device Y3

Level Ny ••• Level Ny

Table 1: RDM recipe element structure and content.

process flow. Outside of using a different reticle set and the associated wafermap layout, each device will see the exact same process steps, and thus should appear optically identical.

By standardizing pattern recognition and miss-registration targets, one can take advantage of the similarities within the process flow. As Figure 1b illustrates, at a specific process level, the same single alignment and single test element can be used in the recipe for every device under the same process flow. All that needs to be changed is the vector location of the pattern recognition target and each misregistration target with respect to the center of the field.

Figure 1b also illustrates that for a single device, the same wafermap element can be used at each process level within that device. RDM parameters generally contain information that is global to the manufacturing facility, such as wafer size, notch orientation, etc. Thus only a handful of specific parameter elements (typically less than 5, possibly as few as 1) are necessary to cover all recipes running within the fab.

The test case outlined in Figure 2 demonstrates the effectiveness of the above strategy. For the test case specified (three process flows, each with 20 layers, and each having 100 devices running under the flow), 6000 recipes are necessary. However, these 6000 recipes can all be created using as few as 421 distinct elements.

Productivity improvement

Minimizing the number of recipe elements using the strategy defined in the previous section results in significant productivity improvements for the fab. When

Figure 1a. ASIC fab example of multiple product families.

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Process Flow X Device X1

Device X2

•••

Process Flow Y

Device X3

Device Y1

Device Y2

•••

Device Y3

Align_FlwX_Lev_1 Test_FlwX_Lev_1

Level 1x Level 1x

Level 1x

Level 1y

Level 1y

Level 1y

Align_FlwY_Lev_1 Test_FlwY_Lev_1

Align_FlwX_Lev_2 Test_FlwX_Lev_2

Level 2x Level 2x

Level 2x

Level 2y

Level 2y

Level 2y

Align_FlwY_Lev_2 Test_FlwY_Lev_2

Align_FlwX_Lev_3 Test_FlwX_Lev_3

Level 3x Level 3x

Level 3x

Level 3y

Level 3y

Level 3y

Align_FlwY_Lev_3 Test_FlwY_Lev_3

• • •

• • •

• • •

• • •

• • •

Align_FlwX_Lev_N Test_FlwX_Lev_N

• • •

• • •

• • •

Level Nx Level Nx • • • Level Nx

Level Ny Level Ny • • • Level Ny

Map_Dev _X1 Map_Dev _X2

Map_Dev _Y1 Map_Dev _Y2

Map_Dev _X1

Align_FlwY_Lev_N Test_FlwY_Lev_N

Map_Dev _Y1

Figure 1b. Strategy for selecting common recipe elements for different process flows and devices.

Process Flow X

Process Flow Y

Process Flow Z

Tab Total

# Device # Layers

100 20

100 20

100 20

300 60

# Recipes

(100)(20)=2000

(100)(20)=2000

(100)(20)=2000

6000

1* 100 20 20

1* 100 20 20

1* 100 20 20

1 300 60 60

141*

141*

141*

421

# Parameter Elements # Wafermap Elements # Alignment Elements # Test Elements Total # Elements

Second, since waferless recipe creation is now possible, a significant amount of tool time previously used for setup is now made available for production use. Figure 3 shows

Figure 2. Element selection strategy vs. number of recipes.

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RDM Phase-In Avg. Eng. Hours per System Avg. Eng. Utilization (4 Systems) Eng. Util. due to non-recipe setup items

60.00 50.00

9.00% 8.00% 7.00% 6.00%

40.00

5.00% 30.00

4.00%

20.00

3.00% 2.00%

10.00 0.00

*The same parameter element may be used for the entire fab

10.00%

70.00

1.00% 0.00% Apr99

May99

Jun99

Jul99

Aug99

Figure 3. Average engineering utilization.

Sep99

Oct99

% Eng. Utilization

The productivity benefits from this process are realized on three separate fronts. First, using the database library of elements, recipe creation time is significantly reduced. Waferless recipes in RDM can be created in

approximately five minutes as opposed to approximately 30 minutes when written on the tool. This time savings, along with the relatively small number of elements that need to be maintained, allows for reduction in the number of personnel required to handle recipe creation and maintenance. For example, implementing RDM has allowed DMOS 5 to reduce the number of people responsible for new recipe creation and maintenance from less than 10 down to 1.

Hours

a new process flow is introduced into the fab, the recipes for the initial device will need to be written on the tool itself with a wafer present, as alignment and test elements will not yet exist in the database.

However, as these initial recipes are created, they are imported into the database. Once in the database, the alignment and test elements can then be used as the “master” elements to create recipes for each successive device running under the same process flow. All successive recipes in the process flow can thus be written off-line and waferless.

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The third productivity benefit is tied to manufacturing cycle time. If waferless setup is used for a new device, recipes can be created and distributed to the tools in the fab in advance of lots being released into the line.

As a result, lots sitting in queue waiting for overlay recipes to be written do not add cycle time. While no hard data has been obtained to quantify the exact effect of using RDM on cycle time, the following estimates can be made. To write a recipe on the tool takes approximately 30 minutes. Furthermore, most often the tool is not available, nor is there a person readily available to write the recipe at the exact time when the lot arrives at the overlay process step. A conservative estimate would add another 30 minutes of queue time per level. If a typical high-end device requires overlay measurement at approximately 20 layers, this adds at least 20 hours to the cycle time for that lot. In the case of the prototype lot for a new device, cycle time is critical for verifying design functionality. Therefore, a oneday cycle time improvement provides significant return on investment to the fab.

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Theoretically, if a single test element is used at the same process level for multiple devices under the same process flow, then on a specific overlay tool, the TIS values for that process level should be the same for each device using that element. Some preliminary data has been taken to verify this hypothesis. Recipes for two devices running on the same process flow were set-up via RDM using the same “master” test element. These recipes were also set up to measure and record the TIS value on every production lot run with that recipe. The recipes were released to standard production on all KLA-Tencor overlay tools in DMOS 5 and allowed to run and collect TIS data for one month. Figures 4a, 4b and 5a, 5b summarize some of the results from this experiment.

Figures 4a and 4b show the TIS values for X and Y measurement orientations for a contact process level for both devices across four overlay systems at DMOS 5.

The values represent the mean of the TIS values from all production lots run through each tool during the 10 9

Absolute Value Mean TIS (nm)

the engineering utilization as tracked by on-board automation log files for four KLA-Tencor overlay systems used in Texas Instrument’s DMOS 5 wafer fab.

Prior to April 1999, DMOS 5 was performing all recipe setup directly on the overlay systems. Over MayJune 1999, RDM was implemented, employing the element strategy as defined in Section 2. By October 1999, the average engineering utilization on the 4 tools dropped to 2.35 percent from the initial April value of 8.86 percent. Based on a 720-hour month, these percentages correspond to picking up almost 47 hours of production availability per overlay machine per month as a result of implementing RDM.

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Device A

8

Device B

7 6 5 4 3 2 1 0 Tool 1

Tool 2

Tool 3

Tool 4

Figure 4a. X-TIS values for contact level across four overlay.

Tool induced shift (TIS) stability 10 9

Absolute Value Mean TIS (nm)

Along with the productivity improvements seen with RDM, recipe stability improvements should be seen as well. By using a “master” element strategy, person-person and tool-tool variation in the alignment and misregistration test setups can be minimized, if not completely eliminated. One of the areas in which stability and consistency can be improved is tool induced shift, or TIS1. TIS tends to be sensitive to the illumination and focus conditions present on the tool during misregistration measurement setup2. Therefore, if multiple tools and/or people are involved in recipe setup, it is extremely difficult to maintain consistent TIS results for the same process level across multiple devices.

Device A

8

Device B

7 6 5 4 3 2 1 0 Tool 1

Tool 2

Tool 3

Tool 4

Figure 4b. Y-TIS values for contact level across four overlay tools.

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Summary

Absolute Value Mean TIS (nm)

9 Device A

8

Device B

7 6 5 4 3 2 1 0 Contact

Metal A

Metal B

Implant A

Implant B

Implant C

Process Level Figure 5a. X-TIS value for six different process levels on one tool.

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Absolute Value Mean TIS (nm)

9 Device A

8

Device B

7 6 5

To summarize, a KLA-Tencor Recipe Database Manager (RDM) system was used in conjunction with multiple KLA-Tencor overlay metrology systems to significantly improve manufacturing productivity and recipe stability in Texas Instruments’ DMOS 5 wafer fab facility. The strategy employed to minimize the number of recipe elements required to create and maintain all recipes in the fab was discussed. Through the implementation of this strategy, a 6.5 percent improvement in tool availability, corresponding to almost 47 hours per tool per month was realized in DMOS 5 over a time frame of six months. Associated improvements in material cycle time were also discussed. Data was also presented to verify that using the RDM system produced recipes with highly consistent tool induced shift (TIS) results, typically within 1 nm between recipes using the same overlay test element. Future work will include a more in depth analysis of TIS stability, as well as investigating further productivity improvements that may be attained by fully automating the recipe creation process by utilizing CAD output data and factory automation.

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Acknowledgements

2 1 0 Contact

Metal A

Metal B

Implant A

Implant B

Implant C

Process Level Figure 5b. Y-TIS value for six different process levels on one tool.

one-month test period. On all four tools, the TIS values for Device A and Device B match within 2.5 nm, and in all but one case, match to less than 1 nm.

Figures 5a and 5b summarize the TIS values for X and Y measurement orientations for a combination of six process levels for both devices on a single overlay system in DMOS 5. Again, the values represent the mean of the TIS values from all production lots run through each tool during the one-month test period.

For this case, at all process levels, the TIS values for Device A and Device B match within 3 nm, and in all but one case, match to less than 1 nm.

The authors would like to acknowledge Mark Smith and Tim Zommermaand of KLA-Tencor, and Russ Funk of RFSolutions for their assistance in collecting and analyzing the automation logs from the overlay metrology systems.

The authors would like to acknowledge the management at Texas Instruments’ DMOS 4 and DMOS 5 production facilities and at KLA-Tencor for their support of the work presented in this paper.

References 1. Daniel J. Coleman, Patricia J. Larson, Alexander D. Lopata, William A. Muth, and Alexander Starikov, “On the Accuracy of Overlay Measurements: Tool and Mark Asymmetry Effects,” SPIE Vol. 1261, pp. 139-161, 1990 2. Moshe E. Preil, Bert Plambeck, Yoram Uziel, Hao Zhao, and Matthew W. Melvin, “Improving The Accuracy of Overlay Measurements through Reduction in Tool and Wafer Induced Shifts,” SPIE Vol. 3050, pp. 123-134, 1998 Reprinted with permission from SPIE. Presented at SPIE ‘00 Microlithography.

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