Summer00 optimizing yield

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Optimizing Yield By Detecting Lithography and Etch CD Process Excursions by Richard C. Elliott, Raman K. Nurani, Sung Jin Lee, Luis Ortiz, Moshe Preil, KLA-Tencor Corporation, J. George Shanthikumar, University of California at Berkeley, Trina Riley, Greg Goodwin, Advanced Micro Devices

Effectively detecting lithography and etch critical dimension (CD) process excursions while minimizing added cost can have a significant impact on semiconductor production yield. Finding this balance requires effective application-specific planning in order to identify excursions and find the optimal measurement scheme. There are many different yield-limiting excursion signatures in photo and etch, and a given excursion signature at photo may turn into a different excursion signature at etch with a different impact on yield and performance. Many current sampling plans and monitoring schemes miss these excursions. An improved procedure for effective detection of CD process excursions can have a significant impact on yield and revenue.

Feature dimension is a critical parameter for lithography and etch processes in semiconductor manufacturing. CD measurements are made for pass/fail purposes to ensure that the data for a particular lot are within the process tolerances. These tolerances are usually specified in terms of basic statistics such as the lot mean and range. The data is also used to identify systematic trends in the process over time. If necessary, the lot CD measurements can be fed back manually or automatically to adjust the process. The measurement sampling required to precisely estimate the mean CD of the lot is a function of the baseline process variations. For example, in a process that has minimal wafer-to-wafer variation, the measurement of multiple wafers per production lot does not greatly improve the estimate of the lot mean CD. Determining baseline variations requires accurate estimation of different variance components such as lot-to-lot variation, wafer-to-wafer variation within a lot, fieldto-field variation within a wafer, and siteto-site variation within a field7. It is common practice to use a nested ANOVA model to compute these variations3,6. 60

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However, current ANOVA models do not provide accurate estimates of these variations when systematic variations are present in the data. A new Generalized ANOVA model is more effective than the conventional ANOVA model for characterizing the baseline process variations. The full distribution of CD measurements can also be used to identify isolated process failures or “excursions.� While process excursions that are isolated to within field or within wafer may not greatly affect the mean CD of an entire production lot, they can have a catastrophic impact on the performance or yield of the semiconductor devices. Identifying these excursions is critical to ensure timely correction of yield limiting lithography and etch process issues. This requires a precise estimation of the systematic and random components of the total variation (otherwise some of the random excursions can be masked under the total variation). The guiding principle to the approach outlined in this article is to determine a sampling plan that effectively detects process excursions, while minimizing the metrology resources required to support the collection of this data. These resources include not only the capital cost of the CD measurement equipment, but also the engineering resources required to analyze and interpret the data, and the lost production time which occurs when metrology data erroneously indicates the occurrence


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of a CD excursion. The optimal sampling plan provides not only the quantity of data needed to detect excursions, but also the quality of data needed to detect real excursions with a minimum of false alarms. The best sampling plans will also enable the user to effectively diagnose the types of excursions when they do occur, and to facilitate the best corrective action so that production can be maintained with a minimum of interruptions. Analyzing the sources of variation and determining the primary excursion types and frequencies in the process are thus key building blocks of an effective sample planning methodology. While statistical analysis and cost modeling are an important part of sample planning, understanding the basic lithographic variations in the process is equally important in determining the optimal sampling plan. There are three basic steps to determining an optimal process sampling plan: determining the baseline statistics of the CD process; identifying the different excursion types, as well as their magnitudes and frequencies; and the evaluation of alternate sampling strategies for detecting process excursions.

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ponent being larger than the sum of the lower plus the higher order components. When this happens, fabs typically set the “negative� variance component equal to zero and make decisions accordingly. In this case, for example, this could lead to sampling fewer fields on the wafer and eventually missing the field-to-field baseline variation problems and excursions. In fact, true field-tofield variance obtained from the Generalized ANOVA model is indeed the most significant component of the total variation. Precise estimation of variation leads to better understanding of the process variations, and allows us more reliable capture of random excursions. The conventional model is at risk to underestimate the total variance components (Table 1). Generalized ANOVA Systemic Random Total Site-to-Site

6.25

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5.29

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Table 1: Baseline variance components (nm 2 ).

Baseline statistics

To evaluate the sampling plan, we collected production CD data for over 600 lots (X wafers per lot, Y fields from a wafer and 2Z sites from each field) from poly gate photolithography and etch steps of a 0.18 Âľm logic product. The CD data were collected using the KLA-Tencor 8100 CD SEM measurement tools at the end of poly after-develop and after-etch steps. We analyzed this data to characterize the baseline process and identify excursions. We also collected wafer level yield data in order to study if the identified wafer level excursions resulted in any yield impact. Using the data, we computed the baseline distributions and excursion statistics, separating the systematic and random baseline components of variation. Table 1 depicts the results of our generalized ANOVA approach and those of the conventional nested ANOVA approach. The nested ANOVA does not separate the systematic and random components of variation, which can cloud results. For instance, some of the variance components from the conventional model will be reported as negative numbers. This happens whenever there are systematic variations, which results in the lowest order nested variance com-

The sampling plan for excursion monitoring is primarily dependent on the random variance component. Without separation of the systematic and random components, sampling decisions will be made using the total variation, which can be much higher than the random component. In the example in Table 1, the total variance for the site-to-site component has the largest value, which might cause the user to allocate more metrology resources to measuring multiple sites. In fact, the random variance components show that field-to-field variation is larger, and thus between field measurements are more important for excursion monitoring. In this case, failure to separate the random and systematic components leads to a sampling plan that is not optimal. CD excursion types

A lot is considered to have an excursion if its statistics are significantly different from the baseline with 95 percent confidence level. The Generalized ANOVA model identifies mean excursions as well as several types of variance excursions, such as site-to-site within field variance excursions, field-to-field within wafer variance excursions, and wafer-to-wafer within lot variance excursions. Summer 2000

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Most of the lot level mean excursions can be detected by monitoring the lot mean of photo and etch CD processes in an SPC chart. Detection of variance excursions requires separation as well as precise estimation of systematic and random variance components. Using our baseline analysis and excursion detection algorithms, we identified several types of excursions in the photo and etch CD data. Each excursion signature demonstrated how much the CD deviated from the baseline at some of the representative fields and sites on a wafer. After identifying the excursion types, it is necessary to determine their frequency during photo and etch. The difference between photo and etch CD distributions is a function of the different etch biases for different types of features, as well as the different patterns of spatial variations in the etcher as opposed to the stepper and track processes. In general, a photo CD variance excursion resulted in an etch CD variance excursion, even if the signature of the excursion changed from photo to etch. In fact, about 55 percent of the photo field-to-field variance excursions in our study became field-to-field variance excursions after etch. This usually occurs when there is no feed forward control from photo to etch. Moreover, after applying regular etch bias to a given excursion wafer, the photo CD excursion signature turns into a different CD excursion signature after etch. These observations indicate that it is very important to understand different types of excursions at photo as well as at etch in order to design an optimal feed forward/feedback model for CD control. It is also important to sample enough fields and sites within a field to detect these excursion signatures and to comprehend the correlation between photo and etch excursion signatures. The true purpose of measurement is to identify problems and facilitate their rapid correction. Classifying excursions into types can dramatically reduce the engineering time and resources required to isolate the root cause of a problem and initiate appropriate corrective action. Understanding the patterns of excursions can also help drive process improvements and enable setting tighter tolerances to improve the performance and value of the finished parts. After correlating the wafer level excursion to yield, we observed that the field-to-field (or across wafer) variance excursions had significant impact on yield. In fact, 70 percent of the time, these excursions resulted in low 62

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Above Average Yield

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Wafers with field-to-field variance excursion Figure 1. Examples of yield impact of field-to-field variance excursions on wafer yield. The yield factor illustrates whether the yield for the wafer was above or below average (horizontal black line). There is no significance to the sequence of the wafers; they were arranged from lowest to highest yield simply for visualization purposes.

yield. Figure 1 shows the normalized wafer level yield of thirteen wafers that were subjected to field-to-field variance excursion at photo and etch. (The correlation of within field excursions to yield requires analysis of more detailed die level yield and performance data, and this study is currently ongoing.) Sampling plans

Various sampling strategies are available to detect process excursions. Finding the optimal plan requires finding the best balance between missing excursions and triggering false alarms; in other words maximizing yield while minimizing cost. The key question is what is the optimal sampling plan for detecting excursions. This is evaluated based on the trade-off between “lots exposed to these excursions” (which is proportional to β-risk) and “number of false alarms” (which is proportional to α-risk). If the sampling frequency increases, the number of lots exposed to these excursions is reduced due to early detection. The trade-off is that there could be more false alarms when there are no excursions. Tighter process specs can also minimize β-risk, but again, this improvement is obtained at the cost of more false alarms. The goal is to find a sampling plan with the lowest possible β-risk for a given level of α-risk. We attempt to find the most effective sampling answer by looking at what appropriate control charts to use and


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Lot Average and Variance Control Charts

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Figure 2. Fraction of material at risk (proportional to β-risk) vs. fraction

Figure 4: Fraction of material at risk vs. fraction of false alarms for

of false alarms (proportional to Îą-risk) for the same sampling plan but

two sample plans with a different total number of measurements.

with different SPC control charting strategies.

Doubling the number of fields per wafer reduces the amount of material at risk for any given fraction of false alarms.

then obtaining the sampling plan. Figure 2 shows that using the lot average and lot range control charts is not adequate for quick detection of the CD excursions at photo and etch. The addition of variance control charts using the exact same sampling plan greatly reduces the material at risk for a given fraction of false alarms. Simply using a better set of control charts provides a far more favorable control strategy.

Increasing the number of fields from Y to 2Y results in significant reduction in material at risk (Figure 4). In fact, at a 3 percent false alarm rate, which is the normal operating region, the material-at-risk can be cut almost in half. In this case, the number of measurements required increases by a factor of two.

Assuming that we use lot average and variance control charts, we examine if sampling Y fields per wafer and 2Z sites per field is better than sampling 2Y fields per wafer and Z sites per field. The curves in Figure 3 demonstrate that sampling the same number of fields per wafer and twice as many sites per fields produces better results.

In this example, it is also more beneficial to allocate a fixed number of measurements to more fields on fewer wafers than to measure more wafers with a smaller number of fields. Figure 5 shows that sampling X wafers per lot, 2Y fields per wafer, and 2Z sites per field is better than sampling 2X wafers per lot, Y fields per wafer, and 2Z sites per field. These results were not

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Fraction of False Alarms Figure 3. Fraction of material at risk vs. fraction of false alarms for

Figure 5. Fraction of material at risk vs. fraction of false alarms for two

two different sampling plans with the same total number of measure-

different sampling plans with the same total number of measurements

ments but a different allocation of measurements between fields per

but a different allocation of measurements between wafers per lot and

wafer and sites per field.

fields per wafer.

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surprising given that Table 1 showed the field-to-field variance, when properly computed, is larger than the wafer-to-wafer variance. (This improvement would not be obvious using a conventional nested ANOVA model.) After applying the learnings from these sampling strategies to the 0.18 µm logic fab, the material at risk was reduced by roughly 28 percent at a constant 3 percent false alarm rate. A mere 1 percent saving in material at risk can result in significant financial returns. For example, if a fab has 5000 wafer starts per week, 200 die per wafer, and a $100 selling price per die, then 1 percent material at risk has a revenue potential of $1 million a week, which translates into $52 million a year. With a very conservative yield benefit estimate of 10 percent, which is the difference between the baseline and excursion yield, and a baseline yield of 50 percent, the net benefit from saving 1 percent material-at-risk could be $2.6 million a year. In each case, the additional cost savings need to be weighed against the cost of any increase in measurements. In this case, the additional measurements required did not significantly increase the cost of metrology for the fab, so the change in sampling plans was clearly beneficial. Summary

Properly characterizing baseline excursions and applying optimal sampling techniques allowed a notable increase in yield without a significant increase in cost. For this particular fab, the best answer was to double the number of fields per wafer sampled, thereby realizing a significant reduction in material-at-risk. In order to maximize yield and minimize false alarms, each fab needs to precisely estimate the baseline statistics, understand the different types of excursions, their frequency, their yield impact, and how they carry over from photo to etch. Moreover, a stochastic model that captures all these dynamics and evaluates the risks/costs of different sampling strategies is needed to determine the best-customized CD sampling plan-and realize significant financial gains.

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Acknowledgements

The authors would like to thank Steve Reeves, Paul Ackmann, Renee Walker of AMD, Gus Pinto, Gil Griffin, Umar Whitney, Pat Lord, Harikrishnan Rajagopal, Dadi Gudmundsson, Richard Quattrini of KLA-Tencor Corporation, and Chayakrit Charoensiriwath of UC Berkeley for their support and assistance in executing this joint project. References 1. R. Carnes and M. Su, “Long term cost of ownership: Beyond purchase price,” in the proceedings of IEEE/SEMI International Semiconductor Manufacturing Science Symposium, pp. 39-43, 1991. 2. C. Derman and S. M. Ross, “Statistical Aspects of Quality Control,” Academic Press, 1997. 3. S. A. Eastman, “Evaluating Automated Wafer Measurement Instruments,” SEMATECH Technology Transfer report 94112638A-XFR, 1995. 4. R. Elliott, R. K. Nurani, D. Gudmundsson, M. Preil, R. Nasongkhla, and J. G. Shanthikumar, “Critical dimension sample planning for sub-0.25 micron processes,” in the proceedings of Advanced Semiconductor Manufacturing Conference and Workshop, pp. 139-142, September 1999. 5. S. Kudva, and R. Potter, “Cost analysis and risk assessment for metrology application,” in the proceedings of SPIE, vol. 1673, pp. 2-13, 1992. 6. K. Monahan, R. Forcier, W. Ng, S. Kudallur, H. Sewell, H. Marchman and J. Schlesinger, “Application of statistical metrology to reduce total uncertainty in the CD-measurement of across-chip linewidth variation,” in the proceedings of SPIE, vol. 3050, pp. 1-14, 1997. 7. B. E. Stine, D. S. Boning and J. Chung, “Analysis and decomposition of spatial variation in integrated circuit processes and devices,” IEEE Transactions on Semiconductor Manufacturing, vol. 10, no. 1, February 1997.

Reprinted with permission from SPIE. Presented at SPIE ‘00 Microlithography. Vol. 3998-120.

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