Editorial S
E
C
T
I
O
N
S
Copper—The Technology Marathon Enabler Like moths to a flame, humankind is irresistibly drawn toward technology. Its pull is so strong, yet so innate, that we often don’t even question why we push so hard at testing its limits. Take Moore’s Law, for example. Why has the semiconductor industry continued to keep pace with it, as if engaged in a marathon? Certainly, no one questions the benefits of device scaling. Smaller chip designs enable more—and more complex—ICs per wafer, which leads to increased profits for the device manufacturer. If we take the 30,000-foot view, more complex and better-performing devices lead to new technology innovations that literally reshape the world we live in—from exploring the furthest reaches of our solar system or unlocking the secrets of the human genome, to redefining how we communicate with our friends and family, or even view our role in the universe. We test the limits of technology because the pros far outweigh the cons. Technology is THE driving factor in improving our lives. Faster and lower power-consuming chips will one day, very soon, help replace the gas-guzzling automobile with the environmentally friendly electric car. Supercomputers that were developed for military and defense purposes are used today to develop advanced drugs that will help impede the progress of ravaging diseases. In the not-too-distant future, microfluid biochips will be used for clinical diagnoses, and the list goes on. Without continued technology investments, however, many such futuristic advances may remain embryonic ideas. Let’s look at how this perspective applies to the technology trends we’re seeing today in advanced semi-
4
Winter 2002
Yield Management Solutions
conductor fabrication. If you look at chip manufacturing, you can essentially break it down into two segments: front-end-of-line, or FEOL (the transistor), and backend-of-line, or BEOL (the interconnect). Within these, two key technology inflections are occurring. In the front end, Intel’s newly announced depleted substrate transistors (DSTs) or silicon-on-insulator (SOI) materials are being introduced that promise to enable faster, lower-power switching. In the back end, however, no amount of innovation can improve device performance – it can only minimize any losses that you might have. All the improvement you’ve achieved in the front end can be lost in the back end, and what’s the point of having a faster-switching transistor that consumes less power if you have a poorly performing interconnect? That’s why copper and low-κ materials are so important to semiconductor innovation: because they help to minimize your losses in the back end so you can reap the performance gains of the front end. While copper has revolutionized chip manufacturing, it has also placed incredible challenges and pitfalls in front of us. For example, we’re hearing people talk about void-free copper fill and deposition, but what do they mean? The reality is that there is no such thing as “void-free”; we need to know what’s statistically acceptable to achieve this designation. It is not enough just to make decisions about what accelerants and suppressants to use and hope to achieve a “void-free” copper fill. We need to ask ourselves many other important questions as well. What aspect ratios are involved, and at what design rules? What are the defect density requirements? Can we have one bad via
Yield Management S O L U T I O N S
EDITOR-IN-CHIEF Uma Subramaniam MANAGING EDITOR Siiri Hage CONTRIBUTING EDITORS Aparjot Dehal Indira Rangarajan
per thousand vias, or only one per trillion? It’s not enough to just have a hypothesis. We need a basis from which we can accurately and rapidly measure the success in improving our copper processes, so that we can say with 95-percent certainty that the copper fill is statistically healthy or robust enough to meet our manufacturing requirements. No longer can we wait until BEOL—we now need to conduct root-cause analysis at FEOL or else place our investments at risk, stall our efforts to advance our processes from development to maturity, and fail to achieve manufacturing success. With this perspective in mind, I think our YMS Magazine readers will truly enjoy the articles featured in this issue, including our cover story on µLoop, which represents a fundamental change in how one can statistically evaluate the meaning of “void-free” copper fill. As you go through these articles in your quest to successfully face the “Brave New World” of copper/low-κ, remember that technology sets high goals for us that we may not always achieve, but will always strive to reach. And, in the end, we become all the wiser because of it. We’ve set ourselves on this path, and having done so, we’re loath to stray and risk losing the advancements and benefits we’ve come to take for granted.
ART DIRECTOR AND PRODUCTION MANAGER Carlos Hueso D E S I G N C O N S U LTA N T Michael Garnica COPY EDITOR Dave Hattorimanabe C I R C U L AT I O N E D I T O R Nancy Williams
KLA-Tencor Worldwide C O R P O R AT E H E A D Q U A R T E R S
KLA-Tencor Corporation 160 Rio Robles San Jose, California 95134 408.875.3000 I N T E R N AT I O N A L O F F I C E S
KLA-Tencor France SARL Evry Cedex, France 33 16 936 6969 KLA-Tencor GmbH Munich, Germany 49 89 8902 170
Peter D. Nunan Vice President Yield Technology Solutions Group
KLA-Tencor (Israel) Corporation Migdal Ha’Emek, Israel 972 6 6449449 KLA-Tencor Japan Ltd. Yokohama, Japan 81 45 335 8200
Peter Nunan graduated from Lehigh University with a B.S. in Engineering Physics and a M.S. in Electrical Engineering. He began his career in 1979 working on DRAM process development at AT&T (currently Lucent Technologies). He has been involved in all aspects of process integration during his career while working at Siemens (currently Infineon), Sematech, and ST Microelectronics. He came to KLA-Tencor in 1998 to direct strategic alliance activities focused on copper and low-κ. Peter is currently vice president of the Yield Technology Solutions group at KLA-Tencor.
KLA-Tencor Korea Inc. Seoul, Korea 822 41 50552 KLA-Tencor (Malaysia) Sdn. Bhd. Johor Bahru, Malaysia 607 557 1946 KLA-Tencor (Singapore) Pte. Ltd. Singapore 65 782 6788 KLA-Tencor Taiwan Branch Hsinchu Hsien, Taiwan 886 3 552 6125 KLA-Tencor Limited Wokingham, United Kingdom 44 118 936 5700
Winter 2002
Yield Management Solutions
5