Ijctt v7p149

International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014

Performance Enhancement of a Novel Interleaved Boost Converter by using a Soft-Switching Technique 1

2 3 M. Penchala Prasad Ch. Jayavardhana Rao M.Tech Dr. Venu gopal . N M.E PhD., P.G Scholar, Associate Professor, Professor 1, 2, 3 Kuppam Engineering College, Kuppam, Chittoor Dist, A.P, India

Keywords: Interleaved Boost Converter(IBC), Zero-

ABSTRACT In this paper a novel Interleaved Boost Converter (IBC) with soft-switching techniques is

Voltage Switching (ZVS) & Zero-Current Switching (ZCS)

proposed. Through the zero-voltage switching (ZVS) and zero-current switching (ZCS) reduces the current

I.INTRODUCTION

stress of the main circuit components, in addition to

A basic boost converter converts a DC

this it can also reduces the ripple of the input current

voltage to a higher DC voltage. Interleaving adds

and output voltage. In this approach, it can be faster

additional benefits such as reduced ripple currents in

switching, reduce the size and cost with suitable

both the input and output circuits. Higher efficiency

impedance matching is achieved with reduction in

is realized by splitting the output current into two

auxiliary circuit reactance that has contributed much

paths, substantially reducing losses and inductor AC

increase in the overall performance. Coupled inductor

losses

in the boosting stage helps higher current sharing

In the field of power electronics, application

between the switches. The overall ripple and Total

of interleaving technique can be traced back to very

harmonics distortions are reduced in this technique

early days, especially in high power applications. In

without sacrificing the performance and efficiency of

high power applications, the voltage and current

the converter. The driving circuit can automatically

stress can easily go beyond the range that one power

detect operational conditions depending on the

device can handle. Multiple power devices connected

situation of the duty cycle whether the driving signals

in parallel and/or series could be one solution.

of the main switches are more than 50% or not and

However, voltage sharing and/or current sharing are

get the driving signal of the auxiliary switch.

still the concerns. Instead of paralleling power

Auxiliary circuit acts as support circuit to both main

devices, paralleling power converters is another

switches(two conditions) and reduce the total losses

solution which could be more beneficial. Benefits

and improve efficiency& power factor for large

like harmonic cancellation, better efficiency, better

loads. The operational principle, theoretical analysis,

thermal performance, and high power density.

and design method of the proposed converter are

An interleaved boost converter usually

presented. The entire proposed system will be tested

combines more than two conventional topologies,

using MATLAB/SIMULINK and the simulation

and the current in the element of the interleaved boost

results are also presented.

converter is half of the conventional topology in the same power condition. The single boost converter can use the zero-voltage switching (ZVS) and/or

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 zero-current switching (ZCS) to reduce the switching

In high-power applications, interleaving of

loss of the high-frequency switching. However, they

two boost converters is very often employed to

are considered for the single topology.

improve performance and reduce size of the PFC

The major challenge of designing a boost

front end. Namely, because interleaving effectively

converter for high power application is how to handle

doubles the switching frequency and also partially

the high current at the input and high voltage at the

cancels the input and output ripples, the size of the

output . An interleaved boost dc-dc converter is a

energy storage inductors and differential-mode

suitable candidate for current sharing and stepping up

electromagnetic

the voltage on high power application. In the

interleaved implementations can be reduced

interference

(EMI)

filter

in

interleaved boost converter topology, one important

A new active soft switching circuit based on

operating parameter is called the duty cycle D.For the

interleaving two boost converters and adding two

boost converter, the ideal duty cycle is the ratio of

simple auxiliary commutation circuits is proposed in

voltage output and input difference with output

this paper. Compared to the conventional interleaved

voltage.

boost converters, the main switches are ZCS at turnThe

PWM

converters,

the

resonant

on transition and ZVS at turn-off transition. The

converters are widely employed for high voltage

added auxiliary switches do not cause extra voltages

applications because they can easily achieve ZVS or

on the main switches and the auxiliary switches are

ZCS soft-switching operation during the whole

zero-voltage transmission (ZVT) during the whole

switching transition. However, the series resonant

switching transition. Compared to the previous

converter has the poor voltage regulation at very light

published soft switching interleaved boost converters,

load conditions. The parallel resonant converter is

no extra inductor is needed in the auxiliary unit, so

hard to regulate the output voltage at short-circuit

the auxiliary unit is simple.

conditions. The LCC (one resonant inductor, one

Several soft-switching techniques, gaining

parallel capacitor and one series capacitor) resonant

the features of zero-voltage switching (ZVS) or zero-

converter and the LLC (one resonant inductor, one

current switching (ZCS) for dc/dc converters, have

magnetizing inductor and one series capacitor)

been proposed to substantially reduce switching

resonant converter have good voltage regulation at

losses, and hence, attain high efficiency at increased

light-load and short-circuit conditions. Also, the

frequencies. The main problem with these kinds of

output diode reverse-recovery problem is alleviated

converters is that the voltage stresses on the power

because of its natural commutation of the rectifier

switches are too high in the resonant converters,

current. However, the current through the series

especially for the high-input dc-voltage applications

is very large, which needs more bulky

Converters with interleaved operation are

capacitors in parallel to reduce the equivalent series

fascinating techniques nowadays. Interleaved boost

resistance (ESR). Meanwhile, the conduction losses

converters are applied as power-factor-correction

are greater than the pulse width modulated (PWM)

front ends. An interleaved converter with a coupled

converters because of its resonant operation mode.

winding is proposed to a provide a lossless clamp.

capacitor

Additional active switches are also appended to

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 provide

soft-switching

characteristics

.These

converters are able to provide higher output power

soft-switching interleaved converter can further reduce the size and cost.

and lower output ripple In ZVT and ZCT converters, an auxiliary

II. ANALYSIS OF OPERATION

circuit containing resonant elements and an auxiliary switch is used that provide soft switching at

Fig: 1 shows the proposed circuit. It uses the

switching instances and is usually incapable of

interleaved boost topology and applies the common

transferring energy from an input source to output. In

soft-switching circuit. The resonant circuit consists of

some of these converters or some members of

the resonant inductor

converter family, the auxiliary circuit can boost the

parasitic capacitors

, resonant capacitor and

,

, and auxiliary switch

effective duty cycle, but the amount of energy that is

to become a resonant way to reach ZVS and ZCS

transferred through the auxiliary circuit cannot be

functions. Fig: 2 shows the two operating modes of

controlled once the converter is designed. In the ZVT

this circuit, depending on whether the duty cycle of

converter family introduced in, the output current can

the main switch is more than 50% or not.

be shared between main and auxiliary switches even though the authors did not have the intention of

Operational Analysis of D <50% Mode

current sharing for these converters. In ZCT converters introduced in, the output current is shared

The operating principle of the proposed

between the switches; however, the switches do not

topology is described in this section. There are 24

turn off under soft-switching condition.

operational modes in the complete cycle. Only the 12

The main intension of the paper is to

modes related to the main switch Sa are analyzed,

develop the zero voltage switching and zero current

because the interleaved topology is symmetrical. Fig:

switching actions in boost converter by using

3 shows the related waveforms when the duty cycle

interleaved approach to mainly reduce the sudden

of the main switch is less than 50%. There are some

voltage and current changes(on & off).Auxiliary

assumptions to simplify the circuit analysis.

circuits acts as support circuit to both main switches

1) All switches and diodes are assumed ideal.

(two conditions) and reduce the total losses and

2) Idealizing the input and output reactance.

improve efficiency& power factor for large loads.

3) The two boost inductors are equal.

The voltage stresses of the main switches and

4) The duty cycles (D1 = D2) for the main switches

auxiliary switch are equal to the output voltage and

and

.

the duty cycle of the proposed topology can be increased to more than 50%. The proposed converter

Mode 1 [

is the parallel of two boost converters and their

circuit. In this mode, the main switches

driving signals stagger 180◦ and this makes the

turned OFF, the auxiliary switch

operation assumed symmetrical.

diodes

and

diode

is turned OFF. The voltages across the

Moreover,

by

establishing the common soft-switching module, the

]: Fig: 4 (a) shows the equivalent

parasitic capacitors

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and

are

and the rectifier

are turned ON, and the clamped

and

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of the main switches

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 and the resonant capacitor Cr are all equal to the

and

output voltage; i.e.

occurs among

and

diodes

( ) can be turned ON

=

=

=

in the

previous mode.

decrease to zero, because the resonance

( ) and

. Then, the body

as shown in Fig: 4(b) The resonant inductor current up until it reaches inductor current

at t = is equal to

linearly ramps

. When the resonant , the mode 1 will

end. Then, the rectifier diodes are turned OFF. The interval time

The resonant time current

and resonant inductor

( ) are

is (

√

)

(

(1)

( ) √(

Mode 2 [

)

)

where

]: In mode 2, the resonant

And

peak value, and the main switch voltages

(

√

inductor current continues to increase to the √

)

(

)

Fig: 1 A novel interleaved boost converter with characteristics of zero-voltage switching and zero-current switching

Fig: 2 Switching waveforms of the main switches And auxiliary switch

and

Fig:3 Related waveforms (D < 50%).

.(a)D < 50% mode

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 Mode 3 [ –

]: Fig: 4(c) shows the equivalent

the auxiliary switch Sr needs to be more than

circuit of this mode. At the end of mode 2, the main switch voltage diode

of

decreases to zero, so the body is turned ON at

+

The interval time

√

(

(4)

of

Fig. 4 Equivalent circuits of different modes (D < 50%). (a) Mode 1 [ ]. (e) Mode 5 [

is

. At this time,

the main switch can achieve ZVS. The on-time

Mode 4 [

to achieve the function of ZVS.

].(f) Mode 6 [

– ] (g) Mode 7 [

–

]. (b) Mode 2 [ – ]. (h-a) Mode 8 [

]. (c) Mode 3 [ –

]. (h-b) Mode 8 [

]. (d) –

(h-c) Detailed waveform of the Mode 8.

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].

International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014

Fig. 4 (Continued.) Equivalent circuits of different modes (D <50%). (i) Mode 9 [ – ]. (j) Mode 10 [ –

]. (l) Mode 12 [

Mode 4 [

–

]: Fig: 4 (d) shows the equivalent

is turned OFF, and the clamped diode

is

turned ON. During this interval, the energy stored in the resonant inductor

when the voltage across the main switch at t =

√

is transferred to the output

(

)

√

(

The resonant inductor current to zero and the clamped diode

( ) is

The resonant inductor current ( )

reaches

.

load.

√

)

( )

decreases

is turned OFF at

. The energy discharge time of the resonant

The resonant time

inductor is

is √

(

Mode 5 [

]. (k) Mode 11 [

].

circuit of this mode. In this mode, the auxiliary switch

–

√ ⁄(

)

)

( )

Where,

]: In this mode, the clamped diode

is turned OFF. The energy of the boost_L2 is

Mode 6 [

]: Fig : 4(f) shows the equivalent

circuit. The parasitic capacitor

transferred to Cr and

and the energy stored in the

switch is linearly charged by

parasitic capacitor

of the auxiliary switch is

clamped diode

transferred to the inductor

and resonant capacitor

at this time. The rectifier diode

( )

The interval time

is turned ON at

of the auxiliary −

to . Then, the .

is

is turned ON ( )

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014

Mode 7 [

]: Fig: 4(g) shows the equivalent

circuit. In this mode, the clamped diode

is turned

ON. The energy stored in the resonant inductor

is

transferred to the output load by the clamped diode .At

, the clamped diode

because the auxiliary switch

be greater than and

( ) must

. Then the main switch currents

are less than or equal to zero, so the main

switch

is turned OFF under the ZCS condition.

is turned OFF

The interval time

is (

is turned ON.

The interval time

)

And, the zero-current switching conditions

and the resonant are

inductor current are ( ( )

( )

OFF under the ZCS condition,

)

( )

( )

(

( )

( )

( )

√ ⁄(

) (

)

)

and the duty time of ZCS is longer than the Mode 8 [

]: In the interval [

resonant inductor current reaches

], the

(

T>

).

increases linearly until it Mode 10 [

and the rectifier diode current

decreases to zero at t =

interval time

, so the rectifier diode

is

]: When the main switch

the auxiliary switch

are turned OFF, the energy

turned OFF. Fig: 4(h-a) shows the equivalent circuit.

stored in the resonant inductor

The interval time

output load by the clamped diode

is (

)

resonant inductor current the clamped diode

As for 4[

the interval time [

].Fig:

].The resonant inductor current continues to

capacitors

decreases to zero because of the

resonance among diode

of

, and

. At t =

√ (

, and

voltages of

and

are ( )

(

(

(12)

(

)

)

(

]: In this mode, the resonant inductor is equivalent to a constant current

source.Fig :4(i) shows the equivalent circuit. In order to meet the demand that the main switch Sa is turned

ISSN: 2231-2803

√

)

⁄(

(

)

)

(

)

(

)

)

(13) ]: The capacitors

are linearly charged by current

( )

)

( )]

[

∫

Mode 11 [ Mode 9 [

as

and capacitor

(

)

,

are charged by

The interval time

, the body

is √ (

decreases to zero at

is )

. When the

is turned OFF. Then, the

is turned ON.

The interval time

Then,

,

is transferred to the

shown in Fig: 4(j).

increase to the peak value and the main switch voltage

,

and

diodes

and

to

,

, and

, and the rectifier

are turned ON at

. as shown in

Fig: 4(k).

This charged time (

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is ) (

(

))

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(

)

International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014

Mode 12 [

]: In this mode, the operation of

(

∑

the interleaved boost topology is identical to that of

(

the conventional boost converter. The ending time is equal to the starting time

of another cycle,

because the operation of the interleaved topology is

(

)

)

(

)

inductor current is (

∑

)

(

)

is )

(

)

(

)

[

(

)]

Voltage Ratio of D < 50% Mode Fig: 5 shows the equivalent circuits about the operation for the boost inductor Boost_

(

And when the switch is turned OFF, the boost

symmetrical. As shown in Fig :4(l) The interval time

)

. The inductor Boost_

Then, the voltage conversion ratio can be derived to be

has the

similar results. So, when the switch is turned ON, the

(

(

)

)

boost inductor current can be derived to be

Fig.5 Equivalent circuits for the boost inductor (D < 50%) (a) Boost_

in the stage (b) Boost_

in the stage with output

capacitor

circuit. The proposed Interleaved Boost Converter

IV. SIMULATION RESULTS

with both ZVS and ZCS characteristics was built.

A .Simulation Circuit From Operational Analysis Of D <50% Mode Fig: 8 show the simulink model of proposed Fig: 6 show the simulink model of proposed diagram from D<50% . Fig: 7 show the simulation results. They verify the operation of the proposed

diagram from D>50% .Fig:9 show the simulation results. They verify the operation of the proposed circuit. The proposed Interleaved Boost Converter with both ZVS and ZCS characteristics was built

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International Journal of Computer Trends and Technology (IJCTT) â&#x20AC;&#x201C; volume 7 number 4â&#x20AC;&#x201C; Jan 2014

Fig: 6 Simulink Model of Proposed diagram from D<50%

(a)

(b)

(b)

(d)

(e) Fig:7 simulation waveforms of the main switches

(f) and

(D<50% and load current 1.5A) (a)Mosfet1 Current & Voltage,

(b)Mosfet2 Current & Voltage,(c)Diode1 & Mosfet1 Voltage,(d)Diode2 & Mosfet2 Voltage,(e) Output Current,(f) Output Voltage

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 B.Simulation Circuit From Operational Analysis Of D >50% Mode

Fig: 8 Simulink Model of Proposed diagram from D>50%

(a)

(b)

(c)

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(d)

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014

(e)

(f)

Fig:9 simulation waveforms of the main switches

and

(D>50% and load current 1.5A) (a) Mosfet1 Current & Voltage ,

(b) Mosfet2 Current & Voltage , (c) Diode1 & Mosfet1 Voltage, (d) Diode2 & Mosfet2 Voltage, (e) Output Current, (f) Output Voltage

V.CONCLUSION

REFERENCES [1] G. C. Hua, W. A. Tabisz, C. S. Leu, N. Dai, R.

High

efficiency

of

step-up

DC/DC

converters can be achieved by decreasing duty cycle (lower conduction losses) and reducing voltage stress on switches (cheaper and lower RDS−on switches) applying soft switching technique (minimizing switching losses). and

can achieve

both ZVS and ZCS. The voltage stress of all switches is equal to the output voltage. It has the smaller current stress of elements. It uses the resonant

capacitors

, resonant capacitor and

, parasitic

, and auxiliary switch

to

become a common resonant way to reach ZVS and ZCS of the main switches

and

.The driving

circuit can automatically detect whether the driving signals of the main

distributed power system,” in Proc. IEEE 9th Annu.

Appl. Power Electron. Conf. Expo., Feb. 1994, vol. 2, pp. 763–769.

[2] C. M. Wang, “A new single-phase ZCS-PWM boost rectifier with high power factor and low

The main switches

inductor

Watson, and F. C. Lee,“Development of a DC

switches are more than 50% or

not and get the driving signal of the auxiliary switch.

The users can only apply the ZVS or ZCS function just by the adjustment of the

driving circuit. The

efficiency is 94.6% with output power of 600W and input voltage of 150V and it is 95.5% with output power of 400W and input voltage of 250V

ISSN: 2231-2803

conduction losses,” IEEE Trans. Ind. Electron., vol.

53, no. 2, pp. 500–510, Apr. 2006.

[3] H. M. Suryawanshi, M. R. Ramteke, K. L. Thakre, and V. B. Borghate, “Unity-power-factor operation of three-phase AC–DC soft switched converter based on boost active clamp topology in modular approach,” IEEE Trans. Power Electron., vol. 23, no. 1, pp. 229–236, Jan. 2008.

[4] C. J. Tseng andC. L.Chen, “A passive lossless snubber

cell

for

nonisolated

PWM

DC/DC

converters,” IEEE Trans. Ind. Electron., vol. 45, no.

4, pp. 593–601, Aug. 1998.

[5] Y.-C. Hsieh, T.-C. Hsueh, and H.-C. Yen, “An interleaved

boost

converter

with

zero-voltage

transition,” IEEE Trans. Power Electron., vol. 24, no.

4, pp. 973–978, Apr. 2009.

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International Journal of Computer Trends and Technology (IJCTT) – volume 7 number 4– Jan 2014 [6] C. M. de Oliveira Stein, J. R. Pinheiro, and H. L.

conduction mode,” IEEE Trans. Power Electron., vol.

Hey, “A ZCT auxiliarycommutation circuit for

17, no. 6, pp. 954–962, Nov. 2002.

interleaved boost converters operating in critical

M. Penchala Prasad

M.Tech

Student from Kuppam

Ch. Jayavardhana Rao

M.Tech

working as Associate

Engineering College at Kuppam (JNTU A). I was

Professor, he was awarded M.Tech from University

awarded B.Tech from P.B.R Visvodaya Institute of

college of Engineering Kakinada (JNTU K) in 2009,

Technology&

he was awarded B.Tech from JNTU Hyderabad in

Science

(JNTU

A)

in

2011.

2002. He has 5 years of Industrial experience at RINL and he has 5 years of

teaching experience.

His area of interest is Power systems, High Voltage Engineering

Dr.Venugopal

ME, Ph.D.,

&

Power

Electronics

working as Professor, he was

awarded Ph.D(video processing) from Dr. MGR University, Chennai, in 2011, he was awarded M.E (Power electronics) from University Visveshwaraya College of Engineering, Bangalore, in 1998, he was awarded

B.E

(EEE)

from

R.V.

College

of

Engineering, Bangalore, in 1995. He has 16 years of teaching experience and he is currently working as Director (Research & Development) in Kuppam engineering college, kuppam. His research area interested in power electronics, vedio processing, power systems & renewable energy sources.

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