Gaut - Selective Milling paper - ASAP-1

Proceedings from the 28th International Symposium for Testing and Failure Analysis, 3-7 November, 2002, Phoenix, Arizona

The Use of Precision Selective Area Milling for Failure Analysis of Flip-Chip Packages George F. Gaut Skyworks Systems, Inc.

Abstract

Milling

Access to the solder bump and under-fill material of flip-chip devices has presented a new problem for failure analysts. The under-fill and solder bumps have also added a new source for failure causes. A new tool has become available that can reduce the time required to analyze this area of a flip-chip package. By using precision selective area milling it is possible to remove material (die or PCB) that will allow other tools to expose the source of the failure.

Until recently, the primary milling tools have been in the form of sophisticated CNC machines1 and as simple as a Dremel tool. The primary use has been for backside sample preparation or to improve device decapsulation2. By using a new tool that can be manually adjusted as to depth and opening dimensions it is possible to visually determine where the tool has milled. With a large variety of milling and grinding tips it is possible to stop within the passivation of the die or to stop in the last layer of copper of the PCB. Due to variations in die and PCB thickness this becomes somewhat impractical for a CNC machine.

Introduction When an open or short is found on a flip-chip device the challenge becomes deciding from the available tools the best method to isolate the failure cause.

The decision is often dependent on the number of available devices exhibiting the same failure mode.

If only one device exists the analyst must do everything possible with non-destructive tools to isolate the failure site. This would include the use of C-SAM, X-ray, TDR, etc. Once the failure site has been narrowed a decision must then be made as to the type of destructive analysis tool that will be used to proceed further.

These can include crosssectioning, parallel lapping, wet and dry deprocessing, etc.

New Milling Tool The tool used in the following examples is the Automated Selective Area Polisher (ASAP) from Ultra Tec. This tool was primarily developed to do backside sample preparation, but observing that the manual vertical adjustment could be controlled with a significant degree of precision the tool is now also used to selectively remove mold compounds, die, etc.

The vertical adjustment dial indicates it’s smallest divisions to be 5 microns. This sounds a bit coarse, but with practice and good observation skills this can be much smaller. The ASAP is also designed such that the sample is mounted to a table that oscillates in the X and Y directions. The table travel is manually adjustable such that openings from 1mm to greater than 30mm can be obtained. The sample holder allows for easy removal for inspection under a microscope. The table also has a tilt adjustment so that minor variations in planarity can be corrected.

In the case where there are many of the same type of failure, one may sacrifice some samples to shorten the cycle time of the overall analysis.

What is being presented here is an addition to the analysts’ destructive physical analysis (DPA) tool set. The idea is to selectively remove sections of the die or the printed circuit board (PCB) to expose the under-fill and solder bumps. This makes it possible to isolate other nodes that can be directly tested to further isolate the cause of the failure.

Silicon Removal Procedure It is important to have an estimate of the silicon thickness. This can be obtained several ways including cross-section, process specification, micrometer measurement, etc. An estimate of the under-fill thickness would also help, but it is not mandatory.

The basic operation for selective area milling will be presented. Two examples using this technique will also be presented.

Once an area is determined for removal (based on other analysis tools) the milling tool is centered over Copyright© 2002 ASM International®

683

the area and the table is adjusted to the dimensions to be removed. A coarse diamond tool is used for bulk silicon removal. Several drops of water are used for lubrication and to prevent silicon dust. The table is set in motion and the grinding tool is lowered on to the sample. The speed of silicon removal is at the users discretion. Fifty-micron steps have been found to work without damage to the die. When roughly 50 microns of the die is left, the fine diamond tool is used to proceed to the desired interface. A mark is placed in the bottom of the milling hole such that one can observe when the new tool contacts the surface at the bottom of the hole. Again water is used for lubricant, allowing visual observation of the area being milled. From here to the desired interface, small increments are made with frequent changes of water so that the surface being ground can be observed. To prevent damage to the under-fill and solder bumps, the grinding should stop as soon as metal traces become visible. At this point, an inspection under an optical microscope can verify the status of the grind. If more material needs to be removed, the steps above can be repeated, with care to highlight the bottom surface of the hole so that initial contact can be visually confirmed.

are set to a moderate setting. The milling tool is lowered until contact is observed. To make sure the milling tool cuts through the layers and does not splinter the PCB, it is recommended that increments of 25 microns or less be used. As the mineral oil fills with copper and glass fiber debris it needs to be removed and replaced on a regular basis. Cotton swabs work very well to remove the dirty oil. Plots of each PCB layer can help determine how close the milling tool is to the under-fill. With practice it is possible to stop in the copper layer just under the solder bumps and under-fill. The mineral oil is removable with acetone or alcohol.

Limitations This technique requires a high degree of observation skills using both sight and hearing. It also requires a good deal of patience, but with practice sample preparation can take less than 45 minutes.

Case History 1 A new flip-chip die and package were being evaluated and the initial yield was low due to continuity failures. The device was built on a sixlayer laminate PCB. The failing continuity path was traced using layer plots. From the tracing, it was possible to access the path from the solder ball to the top of the PCB by removing the top layer of solder mask with an Exact-o knife. This allowed the path to be checked from solder ball to top trace. When this was micro-probed, the path showed no open. This eliminated the solder ball, several traces, four microvias and a plated thru hole as the source of the open.

The remaining possible causes for an open are under the die and include the solder bump interfaces (die and PCB), two copper traces and two micro-vias.

To expose the solder bumps and under-fill, standard wet or dry de-processing tools can be used.

PCB Removal Procedure For a glass/epoxy based PCB, a tungsten carbide milling tool is available that works very well at removing the copper layers of the PCB. The coarse diamond tool will also work on most boards, but if a copper layer is too dense (ground plane) or too thick, the tool can get packed with copper and stop grinding.

For a ceramic-based PCB, the only usable tool is the coarse diamond. The ceramic between copper layers works well to clean the tool after each copper section is removed. The procedure for milling a ceramic PCB is basically the same as described for a silicon die except a smaller grinding step size (<25 microns) should be used and the stopping point should be the top layer of copper.

The procedure for milling a glass/epoxy based PCB uses mineral oil as the lubricant and to trap the debris, while allowing clear visibility of the milling surface. The area to be exposed is estimated using data from other sources. The center of the area to be exposed is marked on the sample and the dimensions to be removed are made to the table travel. Several drops of mineral oil are placed on the sample. The table and the milling tool are turned on. Both speeds

Figure 1: Drawing of Flip-Chip PCB structure.

Both C-SAM and X-ray were used to inspect the remaining area, but no failure cause was observed.

Because multiple samples were available, it was decided to mill away the die and check the interfaces as material was removed. When the die was

684

removed to the solder bump the path could be checked between it and the previously exposed trace.

This path still showed to be open.

Figure 4: Showing the top layer of copper still covered with solder mask after under-fill and the solder bumps are gone.

The path again was still open, eliminating the PCB solder bump interface as the cause. The remaining path consisted of two traces and two micro-vias.

One of these traces is at layer two of the PCB. To access that trace, a new milling tool was used and the sample was repositioned to allow the PCB layer above it to be removed. The cut was made between the micro-vias so each could be checked separately.

Figure 2: Showing the section of the die removed.

Figure 3: Showing the solder bump and the exposed copper traces to be probed.

Figure 5: Showing exposed traces of the second layer of the PCB.

Since the micro-probe penetrated the aluminum/solder-bump interface, that interface was now eliminated as a cause. If at any point in this flow the open had disappeared due to the grinding, a new sample would have been selected and a technique to interrogate that interface would have been used. The sample was now ground further to cut through the solder bumps and under-fill to check the solder bump to PCB interface. The grinding was stopped at the solder mask of the PCB and the failing trace was probed.

Both micro-vias were checked and the one under the die was found to be open. This was confirmed with a cross-section of the micro-via showing that the micro-via was poorly formed during board manufacture.

685

solder bumps, but no obvious defects were observed.

This was particularly true of the X-ray, where the density of the copper layers in the PCB obscured the space between solder bumps. The first site was ground down to the inter-metal layers of the die.

10:1 HF was used to remove the oxide layers and the aluminum traces. A plasma etch was used to remove the nitride.

Top view

Cross-section view Figure 6: Showing the results of the cross-section of the micro-vias.

Case History 2

Figure 8: Shows the surface of the opening prepared for probing.

A high-density flip-chip device experiencing low yield due to pin-to-pin shorts is the next example for using this tool. The device was built using a thirteenlayer ceramic PCB. Only two devices with three failure sites were provided for analysis. The PCB was traced to map the solder bumps associated with the failing solder balls. In each case, adjacent solder bumps were found.

The under-bump metal of the adjacent solder bumps was probed and confirmed a short still existed.

Figure 9: Shows the under-bump metal being probed.

This eliminated the die as a possible source for the short. To expose the solder bumps, under-fill was dissolved using Uresolve from Dynaloy. The sample was given an ultra-sonic clean as a final step. The exposed solder bumps and PCB showed no signs of defects.

Figure 7: Solder bump pattern on the PCB surface showing the failing pairs.

The hypothesis was that some type of defect had occurred within the under-fill and had caused the solder bumps to be shorted. Both C-SAM and X-ray were used to evaluate the area associated with the 686

Figure 12: Optical image of the solder-bump short.

Figure 10: Shows solder bumps after under-fill removal.

Probing the adjacent solder bumps revealed that the short was now gone. This confirmed that the short was within the under-fill, but had been removed by the stripping process. Another sample was selected and the die was again removed as described above.

Again the solder bumps were probed and the short was confirmed. More care was taken removing the under-fill. In this case, a polyimide plasma etch recipe was used, taking off small layers each time.

After each etch step, the sample was simply rinsed to remove the remaining glass fill. With care, a metal bridge between solder bumps was exposed. The protrusions were found to be very fragile and could not hold up to the action of the ultra-sonic clean.

Figure 13: SEM photo showing solder-bump short.

Conclusions In conclusion, it has been shown that precision milling can be effectively used to assist in identifying the failure cause on flip-chip devices. Without this tool, more time consuming tools are often required to investigate a possible failure site.

References

Figure 11: Failing solder bump pair showing metal bridge.

687

1.

P. Perdu, R. Desplats, F. Beaudoin, Comparative Study of Sample Preparation Techniques for Backside Analysis, Proceedings ISTFA 2000

2.

D. Thomsai, Plasma Decapsulation Techniques, Microelectronics Failure Analysis Desk Reference, 3rd Ed.