ISTFA 2011, Proceedings from the 37th International Symposium for Testing and Failure Analysis, November 13-17, 2011 San Jose, CA, USA
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State of the Art Substrate Manipulation As a Tool for Enhancing Product Performance Michael A. Gonzales, Jose Cabanillas Qualcomm, San Diego, CA, U.S.A. michaelg@qualcomm.com, (858) 651-8605 This method can be incorrectly referred to as a “Package FIB” in reference to the “Focused Ion Beam” based circuit editing that incorporates high vacuum and charged ion beam chemistries for silicon die layout edits. Unlike focused ion beam modifications, substrate modifications can be performed in the open air and use traditional lasers mounted on a microscope as shown in Figure 2.
Abstract Substrate modifications on the Integrated Circuit (IC) package provide opportunities for the Failure Analyst (FA) to troubleshoot a routing failure or allow a design engineer to create new routing possibilities for a prototype device. The results can mean the difference in finding the root cause of the problem and being early or late to market. This paper describes a variety of methods to open sections of the package circuit board to access and cut I/O traces interwoven throughout the package substrate. It also describes the use of conductive epoxies for connecting traces, vias and solders bumps. Restoring the solder mask with an ultraviolet (UV) light curing conformal coating is also discussed. This method was used to characterize ground sensitivities and simulate inductance effects on the package. The flexibility and fast turnaround time this method enables has already enhanced product performance.
Introduction Microcircuit analysis and repair have a long history in microsurgery technology [1]. There are many references to accessing the chip [2] directly but relatively few on accessing the chip via the package substrate. The package substrate serves as the link between the IC circuitry and the application/phone Printed Circuit Board (PCB). It is here that an opportunity to effect the routing of the circuitry is easiest by virtue of being the most accessible. Multichip Module substrate packages with two or more die lying in the same plane also provide access to the substrate circuitry between the dice.
Figure 1: An example of a modification on the package substrate involving the cutting of two signal lines. The exposed area will be insulated to prevent reshorting during mounting and testing.
The good news is: Package substrates do not follow Moore’s law [3]. Package board geometries have not scaled down proportionally with the transistors in the die. It is in the relatively large substrate package where there is still access to make cuts, jumpers or combinations of both cuts and jumpers, as well as providing locations for probe access. [Figure 1.] Despite recent developments in throughsilicon-stacking which will introduce thousands of inter-die connections, the board-to-package connections are still relatively abundant. Typical trace geometries are tens of microns wide while metal interconnects in the silicon die can be tens of nanometers wide.
Figure 2: Laser mounted microscope with controls for wavelength, power and navigation. 35