Embedded Computing Design Spring 2023 with Embedded World Profiles

Page 1

Development Kit Selector http://embeddedcomputing.com/designs/iot_dev_kits/ EMBEDDED WORLD PROFILES 2023 PG 26 SPRING 2023 | VOLUME 21 | 1 | EMBEDDEDCOMPUTING.COM RISC-V on the Final Frontier PG 22 Free COM Express! PG 5 SYNAPTICS INC. Resonate™ embeds audio and haptics with displays PG 28 VECOW Edge AI Solution Services for SDGs PG 27 SEALEVEL SYSTEMS, INC. HazPAC® 10 Rugged Panel PC PG 34
Get your free ticket now! embedded-world.com/voucher Use the voucher code GG4ew23 JOIN THE EMBEDDED COMMUNITY 14–16.3.2023 Media partners

EMBEDDED COMPUTING BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com

EDITOR-IN-CHIEF Brandon Lewis brandon.lewis@opensysmedia.com

ASSOCIATE EDITOR Tiera Oliver tiera.oliver@opensysmedia.com

ASSOCIATE EDITOR Taryn Engmark taryn.engmark@opensysmedia.com

PRODUCTION EDITOR Chad Cox chad.cox@opensysmedia.com

TECHNOLOGY EDITOR Curt Schwaderer curt.schwaderer@opensysmedia.com

CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com

WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com

EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com

SALES/MARKETING

DIRECTOR OF SALES Tom Varcie tom.varcie@opensysmedia.com (734) 748-9660

DIRECTOR OF SALES ENABLEMENT Barbara Quinlan barbara.quinlan@opensysmedia.com

AND PRODUCT MARKETING (480) 236-8818

DIRECTOR OF MARKETING Eric Henry eric.henry@opensysmedia.com

OPERATIONS & AUDIENCE DEVELOPMENT (541) 760-5361

STRATEGIC ACCOUNT MANAGER Rebecca Barker rebecca.barker@opensysmedia.com (281) 724-8021

STRATEGIC ACCOUNT MANAGER Bill Barron bill.barron@opensysmedia.com

(516) 376-9838

STRATEGIC ACCOUNT MANAGER Kathleen Wackowski kathleen.wackowski@opensysmedia.com

(978) 888-7367

SOUTHERN CAL REGIONAL SALES MANAGER Len Pettek len.pettek@opensysmedia.com (805) 231-9582

STRATEGIC ACCOUNT MANAGER Lesley Harmoning lesley.harmoning@opensysmedia.com

EUROPEAN ACCOUNT MANAGER Jill Thibert jill.thibert@opensysmedia.com

TAIWAN SALES ACCOUNT MANAGER Patty Wu patty.wu@opensysmedia.com

CHINA SALES ACCOUNT MANAGER Judy Wang judywang2000@vip.126.com

INSIDE SALES Amy Russell amy.russell@opensysmedia.com

PRESIDENT Patrick Hopper patrick.hopper@opensysmedia.com

EXECUTIVE VICE PRESIDENT John McHale john.mchale@opensysmedia.com

EXECUTIVE VICE PRESIDENT AND ECD BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com

VITA EDITORIAL DIRECTOR Jerry Gipper jerry.gipper@opensysmedia.com

MES ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com

TECHNOLOGY EDITOR – WASHINGTON BUREAU Dan Taylor dan.taylor@opensysmedia.com

CREATIVE PROJECTS Chris Rassiccia chris.rassiccia@opensysmedia.com

GRAPHIC DESIGNER Kaitlyn Bellerson kaitlyn.bellerson@opensysmedia.com

FINANCIAL ASSISTANT Emily Verhoeks emily.verhoeks@opensysmedia.com

SUBSCRIPTION MANAGER subscriptions@opensysmedia.com

Jack Ganssle, Ganssle Group

Bill Gatliff, Independent Consultant

Andrew Girson, Barr Group

David Kleidermacher, Google

Jean LaBrosse, Independent Consultant

Scot Morrison, Siemens Digital Industries Software

Rob Oshana, NXP

Kamran Shah, Klick Health

OFFICE 1505 N. Hayden Rd. #105 • Scottsdale, AZ 85257 • Tel: (480) 967-5581
MEDIA REPRINT COORDINATOR Kathy Richey
(281) 419-5725 www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 3 1 Digi-Key Corporation –Development Kit Selector PAGE ADVERTISER 1 Digi-Key Corporation –Development Kit Selector 2 Embedded World –embedded world 2022 25 Embedded World –embedded world 2022 21 PICMG –Empowering Embedded Computing 1 Sealevel Systems, Inc. –HazPAC 10 Rugged Panel PC 13 Sealevel Systems, Inc. –Long live Embedded Computing 1 Synaptics Inc. – Resonate embeds audio and haptics with displays 40 Tadiran – IIoT Devices Run Longer on Tadiran Batteries 1 Vecow –Edge AI Solution Services for SDGs embedded world 2023 March 14-16, 2023 Register Now: https://www.embedded-world.de
Power Electronics Conference (APEC) March 19
Orange County Convention Center,
https://apec-conf.org SOCIAL EVENTS AD LIST WWW.OPENSYSMEDIA.COM  Facebook.com/Embedded.Computing.Design  @Embedded_comp  www.linkedin.com/showcase/ embedded-computing-design/  www.youtube.com/c/ EmbeddedComputingDesign
COMPUTING DESIGN ADVISORY BOARD
CORPORATE
REPRINTS WRIGHT’S
clientsuccess@wrightsmedia.com
Applied
- 23, 2023
Orlando, FL
EMBEDDED
Ian Ferguson, Lynx Software Technologies

Today, open-source technology is everywhere. And that includes outer space.

Read how the openness and software ecosystem growing around the RISC-V instruction set helped processors built on the technology win contracts in space-bound systems currently being deployed by the European Space Agency (ESA) and National Aeronautics and Space Administration (NASA). Then discover solutions to build towards your next design win in the 2023 embedded world profiles, which begin on page 26.

WEB EXTRAS

 Zigbee Technology Security: Examination and Possible Solutions

Preyas Soni, eInfochips

Read this: https://embeddedcomputing.com/ technology/security/network-security/zigbeetechnology-security-examination-and-possiblesolutions

 Raspberry Pi Pico CircuitPython MIDI Interface

Jeremy Cook, Contributing Editor

Read Now: https://embeddedcomputing.com/ technology/open-source/development-kits/ raspberry-pi-pico-circuitpython-midi-interface

 Top Technology Trends Accelerating the Future of

Inc.

Read this: https://embeddedcomputing.com/ technology/open-source/risc-v-open-source-ip/ top-technology-trends-accelerating-the-future-ofvehicle-safety-infotainment-and-communication-2

Published by:

2023 OpenSystems Media®

© 2023 Embedded Computing Design

All registered brands and trademarks within Embedded Computing Design magazine are the property of their respective owners.

ISSN: Print 1542-6408

Online: 1542-6459

4 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com Spring 2023 | Volume 21 | Number 1
CONTENTS
FEATURES
COVER
Safety, Infotainment,
Vehicle
and Communication
COLUMNS 5 TRACKING TRENDS Free COM Express!
Brandon Lewis, Editor-in-Chief 6 Engineering for Safety and Economy in Driving Automation
By
10 Why Requirements Traceability Still Matters for Today’s Embedded Systems
14 Top 8 Energy Saving Tips for Constrained IoT Devices By Fabian Kochem, 1NCE 16 Innovating to Drive Massive Cellular IoT Adoption: Where Relationships Matter By Jean-Louis Carrara, Kigen 18 Achieving Unbrickable Remote Firmware Updates on MCUs with a Microvisor Architecture By Jonathan Williams, Twilio 22 Success Story: How RISC-V Is Enabling the Internet of Space By Chad Cox, Production Editor 26 2023 EMBEDDED WORLD PROFILES 22 opsy.st/ECDLinkedIn @Embedded.Computing.Design To unsubscribe, email your name, address, and subscription number as it appears on the label to: subscriptions@opensysmedia.com 10 6 bit.ly/ECDYouTubeChannel @embedded_comp www.instagram.com/embeddedcomputingdesign

Free COM Express!

The first publication I ever worked on was CompactPCI & AdvancedTCA Systems, which covered embedded hardware specifications produced by the electronics industry consortium PICMG. While the magazine no longer exists, PICMG is still alive and growing.

A big reason for PICMG’s sustained success is its development and management of the most popular (by deployment volume) non-PC board standard on the market today – COM Express. Released in 2005, COM Express has grown to include eight different pinouts (five of which are now considered legacy), four form factors, dozens if not hundreds of manufacturers (more on that later), millions of deployed units, and a next-generation derivative called COM-HPC.

The emergence of COM-HPC, whose suffix stands for high-performance computing, doesn’t foreshadow the imminent demise or even gradual erosion of COM Express. COM-HPC builds off the robust adoption and solid technical foundation laid by COM Express to meet the requirements of systems that need serverclass processors and PCI Express 4.0/5.0 interconnect throughput and beyond. But the recent addition of PCI Express Gen 4 to COM Express, despite being the last upgrade of its kind for the spec, will keep it the favorite of mid-range edge computing deployments for the foreseeable future.

So what do you do with an industry-leading technology that’s entrenched in its market niche? I’d argue you double down by making COM Express free.

Consortia and the Cost of COMs

As a nonprofit, PICMG employs a small staff to steward technical working groups, handle administrative duties, market specifications, etc. These activities are paid for by annual membership fees of $1,000-$3,000, as well as the licensing of specifications.

Today, licensing and downloading the COM Express specification costs $750. In exchange, your organization gets access to all the IP it needs to design a COM Expresscompliant processor module. A Carrier Board Design Guide, which details how to build an application-specific interface card that works with COM Express modules, can be downloaded at no cost.

For a nonprofit, $750 per license is not insignificant. So when I say that COM Express should be “free,” meaning there would be no charge to license and download any COM Express specification, an explanation is in order.

PICMG specifications are made available to licensees as .pdf files, so you can imagine how liberally those move around once they’ve been licensed. While it’s not right (or legal), far more companies are building and selling COM Express-based systems than have licensed the specification over the years. In other words, the horse is already out of the barn.

Ecosystem Enablement

Once you accept that fact, the $750 licensing fee becomes a barrier to the proliferation of COM Express and its ecosystem. Yes, $750 may seem trivial, but think about your haggling to get $750 approved by accounting for anything, especially if you have a vendor management system and whoever you’re buying from isn’t in it.

Why not just make licensing the specification free, then try to recoup any lost revenue through member dues from a larger pool of companies who are actively engaged in the COM Express ecosystem?

It’s been proven time and again that the easier a technology is to access, the more it will be used – and the more a technology is used, the faster its ecosystem will grow. Linux, Apache servers, Arduino, and Raspberry Pi are all wildly accessible and foster vibrant, dynamic ecosystems. Yes, most of them are open source (a consideration for COM Express we’ll explore another time), but what COM Express has none of those did at the beginning is a commercially-hardened solution with a large installed base and the infrastructure to scale. The ingredients for accelerated adoption are there.

As for the value of membership if COM Express were to become freely available, it would actually increase. PICMG Associate members and above are able to participate in working groups where they can drive their strengths into a spec’s definition, and that’s worth more in a larger ecosystem. Intimate knowledge of the technology throughout the standard development process also gives you a head start on getting to market once the specification is ratified.

But longer term, free COM Express de-emphasizes the hardware, which is already mature, and prioritizes middleware, application enablement tools, and services. Whether that work is conducted through PICMG or independently, it can be much more profitable for COM Express vendors and add significant value for end users who want as close to a complete solution as possible.

So what do you say? Should PICMG “free” COM Express?

TRACKING TRENDS brandon.lewis@opensysmedia.com
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 5

Engineering for Safety and Economy in Driving Automation

The main goal of autonomous driving is to eliminate accidents caused by human error. In fully autonomous vehicles, reverting to driver control in the event of a system failure is not an option; there is no driver and no manual controls provided to take over. Safety-critical systems must act, instead of using a “human fallback system” as a failsafe. Although this can be achieved through full redundancy of systems, alternative architectures that minimize the duplication of functions and systems are needed to avoid added cost and weight.

Automotive network architectures are adopting a zonal structure to reduce vehicle weight and cost for greater fuel economy, space savings, and affordability.

Domain and Zonal Architectures

Figure 1 compares the typical topologies of domain and zonal vehicle architectures. In the domain-based architecture on the left, sensors and actuators are connected according to the functional domain to which they belong. Each domain has a dedicated processor as part of the domain controller. In the zonal architecture on the right, sensors and actuators are connected according to their physical location in the vehicle. The zonal controllers, central compute module, or a combination of both handle the processing tasks traditionally executed by the domain controllers and central gateway.

High-priority data traffic, such as safetycritical control commands and certain types of sensor data, must reach its

destination and respond within a specific maximum timeframe. For medium-priority traffic, such as in-vehicle entertainment data, acceptable transmission and response time can be maintained by ensuring that, on average, enough transmission bandwidth is available in the communication sub-system. Best-effort data traffic comes with no specific latency requirement. It is adequate that the data arrives eventually and “as fast as possible,” including retransmission of information in case the limits of the communication sub-system have been reached for a certain moment.

Evolution and Functional Safety

Studying an autonomous braking system (Figure 2) helps to explain the effects of domain and zonal architectures on the desired automotive safety integrity level (ASIL) grade, as defined in ISO 26262.

SAFE & SECURE ENGINEERING
CENTRAL COMPUTE ZONAL CONTROL ZONAL CONTROL ZONAL CONTROL ZONAL CONTROL ADAS AND HPC INFOTA NMENT AND IN-VEHICLE EXPERIENCE POWERTRA N AND VEH CLE DYNAMICS BODY AND COMFORT CONNECT VITY SERVICE ORIENTED GATEWAY DOMAIN CONTROLLER DOMA N CONTROLLER DOMAIN CONTROLLER DOMA N CONTROLLER DOMAIN CONTROLLER 6 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
Figure 1 | Typical topologies of domain and zonal vehicle architectures.

The black-marked boxes in Figure 2 are electronic control units (ECU), and the gray-marked boxes represent information exchanged between the ECUs. The radar unit sends radar data to the object detection function, which extracts data about detected objects that is an input for the distance thresholding function. Distance thresholding calculates the deceleration required to keep distance to the vehicle in front and sends the appropriate brake command to the braking ECU in case the distance steps under a pre-defined limit.

The safety goals for this system are defined to avoid unintended braking and to avoid the unavailability of the required braking torque when it is needed. As there is a potential for lifethreatening or fatal injury in the event of a malfunction, both goals should meet the requirement for ASIL D, which is the highest integrity requirement, according to ISO 26262.

The domain and zonal vehicle architectures affect these safety goals differently. Figure 3 shows an example of the relevant part for autonomous braking in a domain-based architecture.

Here, the radar, brake, and domain controller are connected via a single CAN bus. The radar module receives data from the radar front end, executes object

detection, and performs distance thresholding tasks. Brake control commands are sent via the CAN bus to the brake module, which executes the commanded task.

Figure 4 shows how the same function may be implemented in a zonal architecture. The radar and brake units are connected via two separate CAN buses to two separate zone modules. These modules are both connected to a central brain and possibly to other zone modules within the vehicle. The radar module only contains a sensor, and the brake module contains an actuator. Unlike the radar and brake modules in the domain-based architecture, there is no major processing within either of these modules in the zonal architecture. Instead, the central compute module performs object detection and distance thresholding (computing). Hence, this architecture is referred to as a zonal architecture with central processing.

Other approaches may be taken, such as executing the object detection and distance thresholding tasks within the zone module A and/or B. Such variants are known as zonal architectures with local zone processing.

SAFE & SECURE ENGINEERING
YOUTUBE www.youtube.com/channel/ UCNtkvyhGV9oAmCHj8OGILuA NXP SEMICONDUCTORS www.nxp.com TWITTER @NXP LINKEDIN https://www.linkedin.com/ company/nxp-semiconductors/
Radar Radar data Object detection Object data Distance thresholding Brake control Brake
Figure 2 | Data flow scheme in a typical autonomous-braking system.
DOMAIN CONTROLLER RADAR BRAKE CAN bus Br a ke O b je c t d e te c tio n R a d a r D ista n c e th r e sh o ld in g
Figure 3 | Domain-based autonomous braking control.
RADAR BRAKE CAN bus A CAN bus B Rad a ZONE MODULE A ZONE MODULE B CENTRAL COMPUTE MODULE O b ect d etec ion D ista ce th resh old in g B ake www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 7
Figure 4 | Autonomous braking in a zonal architecture with central processing.

Calculating FIT for ASIL-D Compliance

The Probability Metric of Hardware Failure (PMHF), a recognized ISO 26262 safety metric, is the average probability of the violation of a Safety Goal, expressed as failure in time (FIT). ISO 26262 requires a PMHF below 10 FIT (10-8 failure probability per hour) for ASIL D and below 100 FIT (10-7 failure probability per hour) for ASIL C.

A maximum PMHF value is assigned to each Safety Goal based on its ASIL grade and the ISO 26262 standard. This value is divided over the three different component groups distinguished in the example architectures: the sensor fusion and processing, communication, and actuator components.

Each of these individual component groups has its own failure probability PMHFx, where “x” is an ordering number of the components. The overall PMHF value for the application is the sum of the individual components’ PMHFx values. To meet the overall functional safety requirements for the application, the sum should be less than or equal to the maximum PMHF value that relates to the ASIL safety target.

In the transition from a domain to zonal architecture, the architectural changes and related task remapping affect the PMHF value of an application. In zonal architectures, a far greater number of communication and processing components are needed to execute the same application compared to a domain-based architecture.

We have calculated the overall PMHF of the Safety Goals in our example application, thereby comparing the domain-based architecture with the two variations of the zonal architecture that we previously described. The relative contribution of each component group to the overall PMHF was then calculated, and the results are shown in Figure 5. The diagram confirms that the more distributed, zonal architectures cause a significant increase in the in-vehicle network (IVN) communication contribution to the overall application PMHF. It is also found that there is no significant change in the contribution of the processing. This is because the overall amount of processing does not change in the different architectures.

Fail Operational for Autonomous Driving

Fully autonomous driving, when passengers cannot take over in the event of failure, calls for fail-operational systems that ensure full or degraded functionality in case of a failure occurrence. Various architectures can realize this, although each comes with advantages and disadvantages.

Architecture Variant 1

Homogeneous redundancy duplicates the system into two independently parallel implementations (Figure 6). This variant provides fail-operational behavior in the presence of a random failure in one of the two implementations. Only one of the parallel implementations is active at the time, although the standby (redundant) path may be periodically self-tested to detect latent faults. If a failure occurs in the main path, the second path can be selected to ensure availability.

This approach is based on the assumption that a systematic fault is unlikely to affect both implementations at the same time, but the impact of a systematic fault can be minimized by using different components in the two paths. This is referred to as diversification. Disadvantages include double silicon component count and, therefore, increased overall system cost.

Architecture Variant 2

A second variant (Figure 7) uses single CAN buses to connect the sensor fusion, processing, and actuator components. This avoids duplicating the CAN bus structure (i.e., cable) and instead uses a new type of CAN transceiver, allowing operation under a single failure within the network structure. Intra-zone CAN availability is improved while the backbone network remains fully redundant. It saves the expenses associated with redundant transceivers and the weight of cabling while allowing the same availability as a fully redundant architecture.

Architecture Variant 3

A third variant, characterized by not duplicating the processing modules and Ethernet switches, is shown in Figure 8.

A second processor operating in parallel increases the availability of the processing modules. This processor may have a lower performance specification,

SAFE & SECURE ENGINEERING
D o m ai n Z o na lo c al pr o cess n g Z o na ce ntr al p ro ce s si n g P M HF con t r i bu t i o n V N S en so r f us i o n a nd pr o cess i n g A ctu ato rs
Figure 5 | Relative PMHF contribution for each component group and architecture.
8 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
Figure 6 | Full-redundant architecture.

hence obliging a fail-degraded operation mode. This can be acceptable for certain use cases, like safely moving the vehicle aside from the road.

Architecture Variant 4

The fourth variant (Figure 9) combines intra-zone CAN and processing availability improvements with a fully redundant backbone network. This arrangement improves the CAN and processing availability, which enable the cable savings seen in variant 2, with the reduction in the number of controller modules seen in variant 3.

The Future of Vehicle Network Architectures

Higher levels of vehicle autonomy avoid human involvement in the process of driving. At these higher levels, autonomous driving systems must fail into an operational state. Although full redundancy is an impracticable solution to this requirement, the thoughtful adoption of availability-improved communication and processing functionality can allow the same availability at a lower overall system cost.

Vehicle network architectures are moving to zonal architectures, aiming to support greater functionality while minimizing vehicle weight and cost. On the other hand, zonalization calls for careful design to ensure that safety-critical systems, such as autonomous braking, can

reach the required ASIL. We have shown that the average probability of the violation of a Safety Goal due to the contribution of the in-vehicle network increases significantly in zonal networks when compared with traditional vehicle network topologies.

Luc van Dijk is a principal system architect at NXP Semiconductors.

Bart Vermeulen is technical director of in-vehicle architectures at NXP Semiconductors.

Alison Young is a functional safety manager at NXP Semiconductors.

2023 IoT Device Security Conference

November 2nd, 2023

Produced by Embedded Computing Design, the IoT Device Security Conference is a virtual conference that explores all avenues of securing your IoT-connected devices and systems using the latest techniques. The conference will focus on the technologies required for today’s (and tomorrow’s) secure platforms.

Check out 2022’s archived sessions on demand at www.bigmarker.com/series/ iot-device-security-virtual-conference

Figure 7 | CAN and backbone improved availability. Figure 8 | Processor availability improvement and fully redundant networks.
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 9
Figure 9 | Intra-zone CAN and processor availability improvement with redundant backbone.

Why Requirements Traceability Still Matters for Today’s Embedded Systems

As the saying goes, the cost of “failing to build the right product or to build the product right” impacts revenue and reputation. The only way to build the “right product” is to develop requirements that are both effective and traceable down to the software. This enables development teams, quality assurance (QA), and certifying authorities to examine any function in the software to determine its purpose by tracing it back to a requirement.

The challenge lies in understanding how to maintain requirements traceability in the face of rapidly changing software driven by today’s dynamic market conditions and shorter release timelines. Understanding bidirectional traceability and knowing how to maintain it ensures product features are justified and, conversely, that nothing is built without a reason.

The Cost of Failure

There is an inevitable loss of sales if customers perceive the product functionality as compromised and potentially catastrophic revenue or reputational losses if there’s a recall or security breach. For example, Tesla recalled cars earlier this year due to a software error related to windscreen defrosting[1]. Among other

Tesla recalls, many associated with autonomous driving, this exemplifies the complexity of managing all possible scenarios and the need to rapidly identify, fix, and update software to minimize costs and reputational damage.

“Challenges in Requirements Management,” an article by Deepanshu Natani on the Atlassian community, reads[2]:

“Analysts report that as many as 71 percent of software projects that fail do so because of poor requirements management, making it the single biggest reason for project failure – bigger than bad technology, missed deadlines, or change management fiascoes.”

Start by Writing Good Requirements

The foundation of every software project is its requirements. They should be precise and unambiguous, leading software development in a direction that is clear, testable, and traceable back to a specific purpose.

There are several approaches to writing requirements, with textual specifications being the most popular method. Text can be highly effective and include the use of layman’s language for broader understanding to technical jargon that is closer to the specific plans for implementation.

SAFE & SECURE ENGINEERING
10 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

As human language is inherently imprecise and prone to ambiguity, a high degree of rigor is necessary to overcome the likely pitfalls. Applying proven rules to requirements helps avoid issues down the line – the MISRA coding standard offers an example of these rules[3]:

› Use paragraph formatting to distinguish requirements from nonrequirement text

› List only one requirement per paragraph

› Use the verb “shall”

› Avoid “and” in a requirement and consider refactoring as multiple requirements

› Avoid conditions like “unless” or “only if” as they may lead to ambiguous interpretation

Figure 1 lists ten attributes of effective requirements.

Ensure Proper Requirements Traceability

All requirements must be implemented. Equally, the reverse is also true – all source code (and all tests) should be traceable back to the design and ultimately to a requirement (either functional or non-functional).

The challenge comes when requirements start changing. To manage the impact of change quickly and effectively, relevant requirements need to be modified or new requirements added, and it’s important to understand how the change should be reflected in code and the tests necessary to verify the update.

Figure 2 illustrates a typical relationship between requirements and tests[4]. Here,

the system level requirements (SLR) should be traceable to high-level requirements (HLR), which in turn are traceable to low-level requirements (LLR). The HLRs are traceable to high-level tests (HLT) and the LLRs are traceable to low level tests (LLT).

This bidirectional traceability gives teams visibility from requirements specifications through building, testing, changes, and back again (Figure 2).

Managing changes without losing track of traceability means the coupling of requirements and tests must be automated – which also makes it simple to understand the upstream and downstream impacts of changes to tests and requirements.

Verify Requirements Fulfillment

Demonstrating the system fulfils requirements helps quantify the “right system was built.” There are two flavors of this:

› Using unit tests to show that application components meet their respective purposes in isolation

› Using integration tests to show that parts of the application work together as a whole

Automation and automated tools help here by linking unit and integration tests to their appropriate requirements and reporting on fulfillment without needing timeconsuming manual effort. Figure 3 illustrates two scenarios within a requirements management platform[5]:

› HLR_100 – The green dot indicates that the requirement is fulfilled, reflecting the fact that the associated high-level test (TCI_HLT_100) and low-level requirements (LLR_104 to LLR_109) are verified.

› HLR_101 – The red dot indicates that the requirement is unfulfilled, reflecting the fact that low-level requirement LLR_103 is unfulfilled due to the failure of low-level test TCI_LLT_103.

SAFE & SECURE ENGINEERING
YOUTUBE www.youtube.com/user/ldraltd LDRA www. ldra.com TWITTER @ldra_technology LINKEDIN https://www.linkedin.com/company/ldra-limited/
Figure 1 | Ten attributes of effective requirements. (Source: LDRA)
SLR 0% Verified 1 Items 0 Verified 1 Unverified HLR 25% Verified 4 Items 1 Verified 3 Unverified LLR 70% Verified 10 Items 7 Verified 3 Unverified LLT 70% Verified 10 Items 7 Verified 3 Unverified HLT 100% Verified 1 Items 1 Verified 0 Unverified www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 11
Figure 2 | A typical traceability structure between different types of requirements.(Source: LDRA)

In the latter scenario, the failed test has an associated test case file that can be regressed using a unit testing tool and an associated regression report to help understand why the test failed.

Determine Structural Coverage

Structural coverage is an important concept in embedded software because it provides assurance that the whole code base has been exercised to a consistent and adequate extent. As a key guideline in standards like ISO 26262, DO-178B, and IEC 62304, structural coverage helps developers detect and remove dead code while quality assurance (QA) uses it to determine missing test cases. In both scenarios, tracing this coverage back to requirements helps ensure there’s a reason for every implemented component and identify requirements that haven’t been implemented.

Automation helps determine structural coverage, showing which parts of the code are exercised as requirements-based tests are completed[6]. Figure 4 illustrates a test verification report showing the results of different types of coverage metrics:

› Statement – The number of statements exercised in the execution of an application, as a percentage of the total number of statements in that application. 100 percent coverage implies that all statements have been executed at least once during the test.

› Branch/Decision – The number of branches exercised in the execution of an application as a percentage of the total number of statements in that application.

› MC/DC – Modified Condition/ Decision Coverage (MC/DC) measures whether all conditions within decision statements are evaluated to all possible outcomes at least once and that all those conditions independently affect the decision’s outcome.

Figure 5 shows a mapping between these tests and their associated lowlevel requirements to form a traceability matrix. In this example, all requirements (LLR_*) have been verified using a test (TCI_LLT_*). This type of report is only possible through the application of the traceability principles discussed here.

Traceability Ensures the “Right” Product is Built

Teams must never relegate system and software requirements to shelf-ware. As products grow more complex and software updates increase in frequency, requirements traceability remains relevant and necessary to minimize risks.

Knowing how and where a requirement is implemented and tested ensures software is fit for purpose. Maintaining this awareness across software changes guarantees developers know the impacts to code and tests without spending time searching for them.

Automation is the only realistic method to dynamically maintain bidirectional requirements traceability and ensure the product is “built right.” Without it, teams would spend too much time trying to figure it out manually, leading to increased costs and potential issues downstream.

SAFE & SECURE ENGINEERING
Figure 3 | Reporting on requirements fulfillment using an automated tool. (Source: LDRA)
+/65% Statement (%) 0% 52% 100% 0% 60% Branch/Decision (%) 0% 50% 100% 0% 67% MC/DC (%) n/a 33% 100% 0% Test Verification Safe_Utilities main.c safe_compress.c safe_sprintf.c safe_string.c 12 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
Figure 4 | Reporting on structural coverage using an automated tool (Source: LDRA)

Mark Pitchford is a technical specialist at LDRA Software Technology and has over 30 years’ experience in software development for engineering applications. Since 2001, he has helped development teams looking to achieve compliant software

References:

1. Korzeniewski, J. (2022, February 9). Tesla Recalls 27,000 Cars Over Windshield Defrosting Problem. Autoblog. Retrieved February 9, 2023, from https://www.autoblog.com/2022/02/09/tesla-recall-heat-defrost-software-update

2. Natani, D. (2020, September 27). Challenges in Requirements Management. Atlassian Community. Retrieved February 9, 2023, from https://community.atlassian. com/t5/Jira-articles/Challenges-in-Requirements-Management/ba-p/1474790

3. MISRA.org. MISRA. (n.d.). Retrieved February 9, 2023, from https://www.misra.org.uk.

Traceability Matrix TCI_LLT_100 LLR_100 LLR_101 LLR_102 LLR_103 LLR_104 LLR_105 LLR_106 LLR_107 LLR_108LLR_109 X X X X X X X X X X TCI_LLT_101 TCI_LLT_102 TCI_LLT_103 TCI_LLT_104 TCI_LLT_105 TCI_LLT_106 TCI_LLT_107 TCI_LLT_108 TCI_LLT_109 +/Parent Child www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 13
Figure 5 | A traceability matrix showing verification of requirements as mapped to test cases. (Source: LDRA)

Top 8 Energy Saving Tips for Constrained IoT Devices

As IoT matures as an industry, it’s becoming clear that most use cases will involve battery-powered devices.

As much as 70 percent of IoT projects may fall into this category, and their ability to thrive is going to depend entirely on energy-saving strategies to prolong device lifetime.

Energy Saving is a Puzzle

Energy saving requires many odd pieces that must be carefully tweaked individually then orchestrated together to create a whole. It requires an end-to-end approach in planning and developing energy-optimized solutions. From the outset, it’s essential to have a very detailed plan for the use case and develop clear answers to a handful of key questions every developer should ask before starting their design:

› What is the use case?

› How long does the device need to last? A week? A month? A year? A decade?

› How often does data need to be transmitted?

› How big is the payload?

› Can data be lost? Does it need to be retransmitted?

› What is the maximum physical size of the battery?

› Can recharging mechanisms (e.g., solar or manual battery exchanging) be leveraged?

Every use case is unique and there are countless permutations that can be tweaked based on answers to the above questions, but some general recommendations apply to nearly all IoT projects.

Here Are the Top Recommendations:

1. The microcontroller should meet use case requirements almost exactly. Underpowered hardware setups won’t work, but overpowered hardware means higher costs and wasted energy. A couple of good MCUs to start with might be the STM32 or ESP32, but it all depends on the use case.

2. Put the CPU/MCU into deep sleep mode whenever possible. Most modern MCUs support deep sleep modes, but double-check whether your chosen part supports it.

3. It’s important that NB-IoT or LTE-M cellular modems support Release Assistance Indication (RAI), Power Saving Mode (PSM), and Extended Discontinuous Reception (eDRX). Note that these may not be available in all countries or through all carriers, so it’s important to check into every rollout scenario. NB-IoT is often recommended when it comes to energy optimization, but for moving products, LTE-M might be the better choice.

4. Make sure there aren’t any operating system processes or threads running in the background that slowly but surely drain the battery. To find ones that can be disabled, look at the entire list of processes running and research the purpose of each. If it isn’t required, turn it off.

5. Optimize data processing by reviewing sensor values and how often you transmit them, making sure to distinguish between how often sensor data is recorded and how often it is sent to the cloud. Tricks include recording often, buffering locally, and transmiting batches to reduce radio airtime, or only sending averages of the values.

6. Try compressing the message payload before sending. Instead of repeatedly sending verbose and explicit JSON objects, save energy by compressing data into a binary format. A good example is Binary Conversion Language (BCL), which uses a templatizes turning JSON into binary and vice versa.

7. Alternative data transmission protocols can make a big difference when building energy-constrained products: Protobuf instead of JSON, CoAP instead of MQTT, NB-IoT instead of LTE.

8. Measure twice, develop once. Create a scientific test environment and ensure it’s repeatable. Try to set conditions as closely to the real scenario as possible and use the final hardware, if possible, not dev kits.

Clearly, there’s a lot to building energy-optimized IoT products and it takes a certain mindset to prevent it from becoming an afterthought. These optimizations must be factored into the project from the very beginning, on every layer, from hardware to firmware to connectivity to the cloud.

It can be a pain, but the attention paid to energy optimization is a true make-or-break decision for IoT projects.

Fabian Kochem is head of global product strategy at 1NCE.

IOT DESIGN
YOUTUBE www.youtube.com/channel/ UCPU43V8FO5Ml3QWlfQs-eYg 1NCE www.1nce.com TWITTER @1NCE_IoT LINKEDIN https://www.linkedin.com/ company/1nce/ 14 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

BY ENGINEERS, FOR ENGINEERS

In the rapidly changing technology universe, embedded designers might be looking for an elusive component to eliminate noise, or they might want low-cost debugging tools to reduce the hours spent locating that last software bug. Embedded design is all about defining and controlling these details sufficiently to produce the desired result within budget and on schedule.

Embedded Computing Design (ECD) is the go-to, trusted property for information regarding embedded design and development. embedded-computing.com

Innovating to Drive Massive Cellular IoT Adoption: Where Relationships Matter

For cellular IoT to scale faster across all verticals, better relationships are needed across both the semiconductor and cellular ecosystems to simplify the device supply chain while maintaining high security requirements. With this shared objective, Kigen is working with AT&T to bring down barriers, enabling the integrated SIM (iSIM) form factor and much more.

Kigen entered the US market as part of Arm in 2019 as a fabless SIM OS licensor and eSIM service provider. An independent company since 2020, we have contributed to driving the vision of the iSIM, driven by a vision that all SIMs would eventually be integrated into cellular SoCs, starting with low power, wide area networks (LPWANs). This offers a few benefits to start with:

› There would not be any discrete SIMs anymore, soldered or removable

› No more SIM connectors

› Savings in space, energy consumption, and a simplified supply chain

That would mean that all SIMs would become integrated (iSIMs) and embedded SIMs (eSIMs) that can change cellular service providers over the life of the device.

IoT Relationship Dynamics

IoT on energy efficient networks such as those with LPWAN technology require a focus on ease of manufacturing and differentiated cost dynamics. AT&T had already announced work on the integrated SIM in 2018, so it was a natural step for us to approach them for collaboration.

To scale, LTE-M and NB-IoT solutions would need to eliminate discrete SIMs altogether, which would enable new device shapes like the smart label. After all, it didn’t make sense to add a SIM that took the same amount of space as the LPWAN modules and a significant portion of the combined costs.

We were welcomed by AT&T and started working together. It is always a major undertaking for the company to be onboarded as a security service provider and AT&T was helpful in guiding us through their process. A credit to teams on both sides, Kigen met all the stringent security requirements so we could become a fully validated provider in a few months.

As a result, AT&T has enabled Kigen to generate AT&T’s UICC-H connectivity profiles for their PLMN 310-170 IoT Network that works with the AT&T Control Center, where customers can activate, deactivate, suspend data lines, and look at the data consumption of each data line associated with a SIM profile. These profiles are rather compact and low-power-device-friendly. They support Extended Discontinuous Reception (eDRX) and Power Saving Mode (PSM)

IOT DESIGN
16 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

for LPWAN and suspend/resume of the SIM so that it stops consuming power when idle.

Standard SIMs only use up to 200 microA when idling, so power saving may not be essential for all devices. However, such savings may mean an extra year of operation for a battery-powered tracker when we optimize idling power consumption. The same profiles are also compatible with higher data consumption and used in roaming scenarios across the globe.

These profiles can take multiple forms (Figure 1):

› Removable 2FF/3FF/4FF. These mini, micro, or nano plastic cards are triple-cut on a credit card-sized plastic body to allow selection of the appropriate form factor.

› Soldered MFF2 and USON6 (3x2.3 mm) or 8 (2x2 mm).

› Integrated into a cellular SoC such as Sony Alt1250 or Sequans Monarch2. These iSIMs are available within the cellular SoCs of Sony and Sequans in modules from Murata, Quectel, Sequans, Sercomm. These modules are already certified by AT&T, which means IoT devices can be self-certified using AT&T’s Trendi process.

› Encrypted eSIM profiles. These can be downloaded from Remote Subscription Provisioning (RSP) servers like SM-DP or SM-DP+.

• SM-DPs are used for IoT and more suitable for fleet management, with a push process to download the profiles. SM-DPs are part of the GSMA M2M RSP specifications.

• SM-DP+ was designed for devices that have a user interface (UI) that requires a user to scan a QR code that prompts a pulled download of the profile. SM-DP+ are part of the GSMA Consumer RSP specifications.

AT&T’s agreement enables companies purchasing AT&T connectivity profiles to

source from providers like Kigen in any of the SIM form factors listed above. Through this relationship, customers can take advantage of guidance on the process and solution, easing the step for validation and acceptance by AT&T teams.

Sharing Customers is Caring for Customers

Until now, customers needed their own account on the AT&T Control Center to purchase AT&T SIMs. Now, thanks to the AT&T SIM Transfer, companies can purchase AT&T SIMs from Kigen without a Control Center account. Kigen can still generate the AT&T profiles and transfer them later to the Control Center account of the company.

That feature is particularly helpful when a company wants to build devices bundled with the AT&T network for multiple customers. Traditionally, that meant having a stock of AT&T SIMs associated with their customers’ Control Center accounts. With AT&T’s SIM Transfer, they can place their orders for all the profiles and have them transferred later by batch to their customers’ accounts.

Our collaboration with AT&T is an example of how we innovate to reduce complexity for our joint customers while maintaining stringent security requirements.

IoT Innovation Requires Supply Chains That Scale

Kigen is also looking at associating devices to connectivity service providers as a final stage of device provisioning prior to shipping. That is currently done on consumer eSIM devices that support Wi-Fi with a UI to download the profiles from an SM-DP+ server. Still, it is not always possible on IoT devices that require cellular connectivity out of the box, so these devices will be associated with the connectivity profile at the last stage of provisioning rather than at an earlier stage of assembly as the SIM is inserted or affixed.

The IoT device design constraints and supply chains are evolving – our goal is to simplify the cellular service association for your IoT solution.

Jean-Louis Carrara manages the Americas region for Kigen, where he is promoting the migration to iSIM (integrated form factor) and eSIM (subscription management). He was recently VP Europe for SK C&C CorFire, a mobile commerce solutions provider to Vodafone, DTAG, and Shell. Prior to that, he held snior roles at Gemalto where his team helped SoftCard, a joint venture between ATT, Verizon Wireless, and T-Mobile, deploy secure payment services. He has also served on the board of 4G Americas (now 5G Americas). Jean-Louis holds a Master of Sciences in Engineering from ECL, France, and an MBA from NYIT, USA.

IOT DESIGN
KIGEN www.kigen.com TWITTER @Kigen_ltd LINKEDIN https://www.linkedin.com/company/kigen/
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 17
Figure 1 | AT&T’s UICC-H connectivity profiles are available in a variety of form factors, packages, and integration options to meet IoT application requirements. (Source: Kigen)

Achieving

Unbrickable Remote Firmware Updates on MCUs with a Microvisor Architecture

For many years, microcontrollers have been a staple in various products, continuously revolutionizing their feature sets, reliability, and performance. Moore’s Law has brought 16- and 32-bit processing to even the smallest and most affordable consumer products.

The presence of larger memory and CPU power has allowed the use of real-time operating systems (RTOS) where previously developers had to rely on “bare metal” coding. However, as products have evolved to become connected devices in the context of IoT, it has revealed fundamental shortcomings in the traditional methods of software development for microcontrollers.

A microvisor-based approach to IoT architecture promises relief.

Consistent Device Reachability is Key in IoT Projects

Whereas an unconnected product (where ongoing maintenance isn’t necessary because physical access would be required for any attack) might comprise 90 percent application code and 10 percent third-party code, connected products are often 20 percent application code and 80 percent third-party code – all of which has to be maintained to protect the user and manufacturer’s reputation.

Integrating and maintaining external components not only increases the lifetime costs of a product, but, being invisible to end users, it also fails to provide any added value or differentiation in the market. This has led to a significant amount of resources, both in terms of time and money, being wasted on recreating connectivity solutions for every IoT product, rather than focusing on unique features or capabilities.

Additionally, the lack of relevant domain knowledge and the pressures of complexity, budgets, and schedules leads to latent security issues that can compromise the security of a product in the future. To get relief from these burdens, many businesses

resort to IoT platforms, as can be seen from a recent survey by Transforma Insights (Figure 1).

Several key factors impact the viability of any IoT project – especially in the industrial sector:

› Consistent Device Reachability: Maintaining reliable and consistent communication between connected devices and the cloud

› Trustworthy Device-to-Cloud Security: Maintaining the integrity and confidentiality of connected devices at both the hardware and application levels

› Predictable End-to-End Cost: Knowing the cost of long-term security upfront

The convenience of using a pre-built platform for IoT device management to take care of security, over-the-air (OTA)

IOT DESIGN
18 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

firmware update capabilities, and device lifecycle management is highly appreciated by many users. However, these platforms can also be quite restrictive in terms of developer flexibility, limiting choices in programming language, operating system, and development tools. While this level of control may be suitable for end-users who are new to hardware and firmware engineering, it can present a significant obstacle for experienced developers looking to integrate connectivity into their existing devices. Industry analyst Arnal Dayaratna of IDC calls this requirement of openness out in a recent market note on edge application development, saying:

“Prioritize portability: Developing for the edge requires digital solutions to be fundamentally portable and compatible with a multitude of infrastructures.”[2]

The microvisor approach to IoT platforms promises to alleviate those limitations. IoT platforms based on the microvisor architecture may offer the above-mentioned features of remote firmware updates and remote device lifecycle management, but without imposing a vendor’s choice of operating system or programming

language. Furthermore, it can do so with increased levels of security and offer entirely new IoT capabilities, such as live, line-by-line remote debugging of firmware.

What is a Microvisor?

A microvisor is an approach to IoT of using hypervisors for microcontrollers, which enables reliable and secure remote operations (such as failsafe over-the-air firmware updates) on Internet-connected devices.

Architecturally, a microvisor makes use of hardware separation within a microcontroller – such as the STM32U585 from ST – to divide it into two sections at boot time (for example, by leveraging Arm TrustZone)[3, 4].

Devices with Arm’s TrustZone technology have a built-in cost-effective methodology for isolating security critical components in a system by hardware-separating a rich operating system from a much smaller secure operating system. Peripherals are assigned to either the microvisor zone or the customer application zone at boot time and the two sections run code independently of each other. This allows for complete security and complete agnosticism in terms of which operating system or programming language the application zone runs (Figure 2).

The microvisor element runs “alongside” the application code on the same MCU but with different security privileges thanks to the TrustZone split. The microvisor wraps a layer of security and connectivity around the application code space.

A microvisor-based IoT platform does not impose any limitations on which OS or language must be used. It adapts to any approach in embedded development, whether it is:

› A custom bare-metal approach

› Built on top of an “off-the-shelf” operating system like FreeRTOS or Azure RTOS

› Using whatever programming language you choose

One of the key capabilities that a microvisor-based architecture allows is OTA firmware updates that do away with requiring two versions of the firmware on the device in case of failures.

Guaranteeing Device Availability for Firmware Updates

The division of responsibilities in the microvisor architecture ensures reliable and consistent connectivity for IoT devices. The microvisor takes care of maintaining the IP stack as

IOT DESIGN
YOUTUBE www.youtube.com/channel/ UCWh3G9LZmZ3q_xWOyPpn8ag TWILIO IOT www.twilio.com TWITTER @twilio LINKEDIN www.linkedin.com/company/ twilio-inc-
60% 50% 40% 30% 20% 10% 0% Communicationsserviceprovider Device/HWvendorHyperscalercloudproviderIndustrialsoftwarevendorIn-housedevelopmen t Analytics/datacompanyBusinesssoftwarevendor SystemintegratorIoTplatformcompany 3rd 2nd 1st Question: Q18: What type of organization would you generally go to as the lead supplier when considering deploying an IoT project? N=800 www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 19
Figure 1 | A 2022 survey from Transforma Insights reveals that IoT adopters prefer platform companies as the lead supplier on their IoT projects. (Source: Transforma Insights)[1].

well as the firmware and drivers for Wi-Fi and/or cellular modems; in other words, everything your device needs to get connected and stay connected.

This means that even in the event of unexpected application failure, the device remains connected and reachable thanks to the microvisor component remaining connected and reachable. This includes all the components highlighted in Figure 2.

The reliability of the connectivity, which eliminates the risk of “bricking” the device, opens up new opportunities for firmware development. This allows for the decoupling of hardware manufacturing from the firmware development process. With the ability to perform frequent and reliable firmware updates, hardware manufacturers can produce devices even before the firmware has undergone complete testing (it remains to be seen, however, if this level of agility, previously only seen in web and cloud development, will be adopted by device builders).

As with any approach to firmware over-the-air (FOTA) updates, saving bandwidth is critical, especially for cellular-connected devices that incur cost for data usage.

Capacitive Touch Input with the Raspberry Pi RP2040 Pico

Sponsored by Digi-Key and Raspberry Pi

In this class, we’ll explore how the Raspberry Pi RP2040 can detect touch inputs with the addition of a single resistor for each pin. We’ll explore the fundamentals of how capacitive touch works, and show how this can be done with the Pico using the CircuitPython programming language.

Watch the webinar at:

https://www.bigmarker.com/Embedded-Computing-Design/Capacitive-Touch-Input-With-the-Raspberry-Pi-RP2040-Pico

IOT DESIGN
Figure 2 | Pairing a microvisor architecture with Arm TrustZone-enabled devices allows complete development agnosticism and security. (Source: Twilio)
MORE WEBCASTS:
20 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
WATCH
https://www.embeddedcomputing.com/webcasts

The update service must be aware of the device’s current operational manifest, which defines what code/data should be stored in each defined memory area – either within on-die flash or in QSPI flash. Accordingly, when a new package is queued for FOTA, only areas that do not match would be deployed to the device.

A microvisor-based approach is no different, and the microvisor takes care of moving data required to apply an update from the cloud to a staging area in device QSPI storage, where it remains encrypted. Once the device has all the changed parts of the application stored safely in the staging area it applies the upgrade in a fail-safe and restartable way to ensure the upgrade appears atomic from the application’s point of view.

The application can be notified during the upgrade staging process, as it may want to indicate progress to an end user. Once the staging process is complete, the application is notified and can pick a convenient time to perform the upgrade. If required, the customer can force the upgrade to be applied at any time after staging, which may be used if the old code is behaving badly, for example.

How Can I Learn More About Microvisors?

If you’re interested in diving deeper into the microvisor architecture, consider reading the Twilio whitepaper “Architecture and Design Considerations for Modern IoT Infrastructure”, which is organized into two parts[5].

Part 1 addresses a broader audience, such as IoT product managers, project managers, and engineering managers. It lays out a typical device-side IoT architecture and describes the traditional implementation approach. It details the associated challenges and develops an argument for a different approach, now made possible through the hardware advancements described herein.

Part 2 addresses the experienced embedded engineer and explains Twilio’s thinking with regard to how the above-mentioned challenges can be effectively addressed with a new architecture.

Jonathan Williams is a product manager for IoT and wireless at Twilio. Having worked in both the semiconductor industry as well as in cloud video communications, he has a focus on building developer-friendly platforms that solve real-world problems. When not working on bringing IoT products to market, he can be found tinkering with his 1970’s rally car.

References:

1. Mattyhatton. (2022, January 17). Enterprise IOT Adopters Increasingly Favor Platform Companies and Offthe-Shelf Solutions. Transforma Insights. Retrieved February 8, 2023, from https://transformainsights.com/ blog/enterprise-iot-adopters-favour-platform-off-the-shelf

2. Dayaratna, A. (n.d.). Developing for the edge: Notes toward a definition of edge application development. IDC. Retrieved February 8, 2023, from https://www.idc.com/getdoc.jsp?containerId=US47198921

3. Microvisor and STM32U5, the Best Performance-per-Watt MCU, First to Support a New IoT Development Paradigm. ST life.augmented Blog. (2022, January 17). Retrieved February 8, 2023, from https://blog. st.com/stm32u5-microvisor/

4. What is Arm TrustZone Technology? Trustonic. (2021, April 16). Retrieved February 8, 2023, from https:// www.trustonic.com/technical-articles/what-is-trustzone

5. Twilio. (2022, May 27). Twilio Microvisor Architecture and Design Considerations for Modern IoT Infrastructure. Twilio. Retrieved February 8, 2023, from https://interactive.twilio.com/microvisor-modern-iotarchitecture

Open Specifications COM-HPC | COM Express | CompactPCI Serial IIoT | MicroTCA | ModBlox7 Empowering Embedded Computing Join Our Global Community and Experience the Value of Collaboration Visit us at embedded world Hall 3 Booth 3-544 www.picmg.org www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 21

Success Story: How RISC-V Is Enabling the Internet of Space

As objects exit Earth’s atmosphere, radiation levels become increasingly destructive to both organic and inorganic materials. The latter includes electronics, which are susceptible to Gamma rays, X-rays, and other high-energy particles that can cause single event upsets (SEUs, also known as bitflips) in memory, voltage spikes in analog circuitry, and other faults that can crash programs or entire systems.

Space radiation and its effects have been studied extensively over the past several decades. These efforts have resulted in the design and manufacture of radiationhardened (rad-hard) electronics that use special materials, exotic shielding techniques, and undergo exhaustive testing to withstand ionizing forces beyond Earth’s atmosphere for deployable periods of time.

Today, the TRISAT-R nanosatellite – a collaboration between the European Space Agency (ESA), Cobham Advanced Electronic Solutions (CAES), Skylabs, and the University of Maribor in Slovenia – continues that tradition (Figure 1). And it’s doing so on the strength of open-source RISC-V processor technology.

RISC-V is Out of this World

The TRISAT-R CubeSat is a scientific and educational mission led by the University of Maribor to map ionizing radiation in medium Earth orbit (MEO), a 6000 km-high band around Earth where various positioning, defunct radio, and future communications satellites reside. Roughly the size of a shoebox, the 3U, 10 cm x 10 cm x 30 cm satellite is built around the NANOhpm-obc onboard computer from Slovenian space technology company SkyLabs (Figure 2).

OPEN SOURCE EVERYWHERE
Designed into a 95 mm x 91 mm x 11 mm PC/104-compliant form factor, the Figure 1 | The TRISAT-R is a research nanosatellite measuring the effects of ionizing radiation on commercial electronics in midearth orbit. (Source: SkyLabs)
22 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

NANOhpm-obc is built around Cobham Gaisler’s fault-tolerant 32-bit NOEL-V RISC-V processor IP core implemented alongside a single-precision floatingpoint unit in a Microchip PolarFire FPGA. The onboard computer integrates 2 GB of ECC-protected DDR3 memory and 2 GB of NVM flash in an EDAC-protected 1 GB redundant configuration for telemetry data, logs, and the like.

On top of that hardware, SkyLabs layered its NANOsky CMM Firmware

framework that provides the foundation for mission-specific applications and software functions.

To the knowledge of those involved in the project, when the NOEL-V processor onboard the NANOhpm-obc was launched into orbit on the ESA’s Vega-C rocket this summer, it marked the first time fault-tolerant RISC-V processor technology has been deployed in space.

The TRISAT-R is also outfitted with radiation detection instruments from SkyLabs, CERN, the European Council for Nuclear Research, and the European Space Agency (ESA) that measure the total ionization dose from high-energy particles as well as the effects of single ionizing events on electronics. These particles are analyzed locally on the nanosat using AI models, then radiation mitigation techniques are applied that show promise in extending the life of space bound COTS electronics. Communication between the nanosatellite’s various subsystems occurs over a redundant differential CAN bus for telemetry and telecommand (TMTC) data and LVDS for high-speed transfers.

The NANOhpm-obc’s 100 MIPS is leveraged for scintillation analysis of signals from an open GNSS receiver and to manage a software-defined radio (SDR) and 1.5 W VHF/ UHF transmitter that relay radiation effect data to ground control stations.

Radiation Hardening is RISC-y Business

“We are striking quite a lot of energetic particles and the solution here was to design solar panels that are able to operate at that radiation,” says Iztok Kramberger, PhD, leader of the TRISAT project and member of the Electrical Engineering and Computer Science (FERI) faculty at the University of Maribor. “We increased the thickness of the cover glass for the solar panels by adding a serum to the cover glass and we added specific conductive transparent material to guard against electrostatic discharges.”

The irony here is that while the TRISAT-R is measuring radiation, it’s also being destroyed by it. In MEO, the Earth’s magnetic field is 6x weaker than in low Earth orbits (LEO) just a few thousand km below. It’s also a frigid -19-26 ºC. And since there are no service calls to replace defective CubeSat components in space, the TRISAT-R’s onboard electronics must survive long enough on their own to make the program worthwhile.

The aerospace industry has historically met such requirements with rad-hard electronics proven to work every single time over many years. This has led to significant technology reuse – understandable given that a single chip like the PowerPC-based RAD750 from BAE Systems controlling the Perseverance Rover costs hundreds of thousands of dollars per unit.

But as use cases evolve, so do platform requirements, and the need for higher fidelity sensors, more sensitive instrumentation, and increasingly sophisticated algorithms has surpassed the abilities of 32-bit, 200 MHz processors like the RAD750. But just as important, if not more so for the reliability-centric aerospace industry, software support for RISC architectures with long spaceflight heritages like PowerPC and SPARC is quickly evaporating.

“We have been using SPARC very successfully for more than 20 years. LEON 1 and 2 processor development was started at the European Space Agency,” says Roland Weigand, a VLSI and ASIC engineer at the ESA. “Now SPARC is of course a very old, almost obsolete standard. We’re still using products based on SPARC, but we are aware that, long-term, the software support, the maintenance, the improvement of compilers will stop or has already stopped.

OPEN SOURCE EVERYWHERE
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 23
Figure 2 | SkyLabs NANOhpm-obc is the TRISAT-R’s onboard computer that equips a 32-bit Gaisler RISC-V processor for GNSS scintillation analysis and other tasks. (Source: SkyLabs)

“It’s been a couple years since the last commercial users, Fujitsu and Oracle, stopped supporting SPARC,” he adds.

These aren’t the only indicators that legacy technologies have run their course. For instance, features like delay slots built into SPARC processors that offset branch latency and allow one instruction to complete before a second enters the pipeline are now more of a programming nuisance than benefit. Similarly, register windows that facilitate “deep calling stacks in software is an obsolete feature,” Weigand explains.

Comparatively, Sandi Habinc, General Manager of Gaisler, believes that RISC-V offers “a simpler architecture” with “much more computing power per cycle.” The architectural optimizations of RISC-V mean that processors like the NOEL-V soft core can run at higher frequencies, which is critical in harsh environments like space because even if you use an advanced process node like 7 nm, so much radiation hardening is required around the processor core that it ends up being “10x slower than anything in the commercial world.”

“For us, every MHz we can bring to the table is important,” Habinc explains. “So definitely the simplicity of it is a huge advantage. The other one is of course implicitly built-in 16-bit support and the fact that we can now do microcontrollers and still use the same tools.”

“What did we do on the controllers with LEON? We had to invent our own compressions, reduce instruction set, which is not really a smart way to do it. It’s great if you’re Arm and you have 10,000 engineers, but for us that was a painful exercise to go through that,” Habinc continues. “On SPARC, we never went beyond 32 bits because that would change the whole software environment and too much effort because we need to maintain quite a lot of software.

“With RISC-V, we can even scale down the cores we have today, reduce the number of pipeline stages, and really do a very thin single-stage, dual-stage microcontroller that we can fit everywhere,” the Gaisler GM goes on (Figure 3). “With RISC-V we can do the 32-bit microcontroller, we did a 64-bit version. Why not? It gives us the choice to target different uses in space.”

To ease the transition for aerospace engineering organizations, Habinc and his team are working on a multicore processor that integrates both SPARC and RISC-V cores.

“We qualify one chip but there’s basically a pin saying you want to boot SPARC or RISC-V, and this gives a tremendous advantage,” he adds.

The Internet of Space

Gaisler has already developed different variants of the NOEL-V processor, some of which include extensions like vector processing that will further accelerate workloads in space. For researchers like Kramberger, the increase in processing power onboard spacecraft reduces management overhead and creates new opportunities for studying the final frontier.

“One advantage is that the spacecraft can be more autonomous, which means that you don’t have to manage 600 or 700 satellites. You can’t have people do that. It has to be more or less autonomous,” he explains. “The second thing is that we are improving the data transfer between the satellite and the ground because you’re able to do more processing at the edge.

OPEN SOURCE EVERYWHERE
24 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
Figure 3 | Gaisler has developed multiple iterations of the NOEL-V RISC-V processor IP, in 32- or 64-bit flavors with dual- or single-issue pipelines that support various RISC-V instruction set extensions. (Source: CAES)

“Then of course you can reduce the data downstream towards the Earth,” he continues. “So, for example, a typical remote sensing application still today, there is a camera recording, and this data is transferred to the Earth and on Earth we do things with the data. The resolution requires higher and higher data downlink bandwidth. But doing AI at the edge provides capabilities to take the interesting data within the orbit and transfer only the results, meaning much lower requirements on bandwidth.

“That is quite similar to the Internet of Things on Earth,” Kramberger progresses. “We could call it the ‘Internet of Space Assets’ that gives us the ability to do more sensing of our environment, which is not only the planet but the Solar System as such.”

For now, the TRISAT-R nanosatellite is fully operational in an elliptical orbit, “drifting between 18 and 23 degrees,” says Dejan Gačnik, CTO of SkyLabs. “All essential equipment has been commissioned … all parameters are nominal.”

Unfortunately for the TRISAT-R, the end is already near. Space radiation will eventually take its toll on the tiny satellite at which point it will have to be decommissioned. But given that its primary mission is to measure and analyze the effects of ionizing radiation on spacecraft electronics, Gačnik believes the mission will be a success if TRISAT-R can endure for at least six months. It has already been in orbit for almost four.

But for RISC-V, the TRISAT-R is just the beginning. Gaisler and the ESA continue to develop new generations of space processors based on the technology. Microchip, who has RISC-V technology deployed on the International Space Station, continues to advance it’s PolarFire FPGA portfolio with radiation-tolerant versions that include a SiFive soft CPU core for running user applications.

For organizations like ESA and NASA, RISC-V is the obvious choice as they continue to build space exploration programs on open, high-performance, and flexible commercial electronics.

“Going from one open standard to another open standard like RISC-V is the most logical choice,” Weigand says. “It’s simply an advance of technology, which helps improve the performance and the software development flow.”

“For us, it’s a logical step forward.”

Editor’s note: “RISC-V in Space” workshops were held at the 2022 RISC-V Summit and

Media partners Get your free ticket now! embedded-world.com/voucher Use the voucher code GG4ew23 JOIN THE EMBEDDED COMMUNITY 14–16.3.2023 EW-23_Ad_Visitors_185x130mm_EN_3mm.indd 1 30.11.22 08:32
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 25

The 2023 Embedded Computing Design embedded world issue showcases embedded tools and solutions for those designing in the areas of industrial control, edge computing, autonomous machines, and more.

Development & Evaluation Kits

All-in-one, super-portable, multi-protocol Type-C analyzer with voltage tracking, integrated logic analysis, and Alternate Mode support.

Pocket-sized and bus-powered, the Ellisys Type-C Tracker delivers comprehensive support for a multitude of protocols and electrical signaling that operate over the USB Type-C connection standard.

Detailed decoding of packets, transactions, and other communications is provided in a flexible and easy to understand manner over the field proven and ubiquitous Ellisys software application. The Tracker provides a variety of error detections, precision timing tools, and performance measurement tools.

Designed with ease-of-use in mind, the Type-C Tracker is the ideal companion for a wide variety of tasks associated with Type-C product development.

FEATURES

Ą All-in-One: Precisely synchronized and concurrent capture of USB Power Delivery protocol (including ALT modes), Type-C voltages, USB 2.0 protocol and classes, Thunderbolt™ 3 and USB 4 sideband, I2C, Type-C Port Controller Interface, UART, GPIO/Logic, SWD, SPI, and DisplayPort™ auxiliary (AUX) signaling.

Ą Bus-Powered: Just attach to your computer’s USB port and go, no bricks to carry around.

Ą Super Portability: Pocket-sized at 63.5 x 63.5 x 12 mm (2.5" x 2.5" x 0.47")

Ą Real-Time Display: Visualize captured traffic in real time with the efficiency of 5th generation Ellisys protocol analysis software

Ą Professional Software: Use the acclaimed, widely adopted and highly flexible Ellisys multi-protocol analysis software.

https://ellisys.com/products/ctr1

2023 EMBEDDED
DEVELOPMENT & EVALUATION KITS Ellisys 26 EDGE AI & MACHINE LEARNING Vecow 27 EMBEDDED HARDWARE Synaptics 28 congatec 29-30 Real-Time Systems 30 embeddedTS 31-32 iBASE Technology Inc. 32 Lattice Semiconductor Corporation 33 Mactron Group 34 Sealevel Systems, Inc. 34 EMBEDDED PROCESSING SECO USA 35 INDUSTRIAL AUTOMATION & CONTROL PEAK-System Technik GmbH 36-38 IOT Synaptics 39 WIRELESS Ellisys 38 Embedded Computing Design
WORLD
Ellisys www.ellisys.com  sales.usa@ellisys.com  866-724-9185  @Ellisys1  www.linkedin.com/company/ellisys
Ellisys Type-C® Tracker™
26 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

One-Stop Edge AI Solution Services

Vecow is a team of global embedded experts. We commit to designing, developing, producing, and selling industrial-grade computer products. All of our products are leading in performance, trusted in reliability, exhibit advanced technology and innovative concepts. Vecow offers One-Stop Edge AI Solution Services, AI Inference Systems, High-performance Fanless Systems, In-Vehicle Computing Systems, Expandable Computing Systems, Ultra-compact Fanless Systems, Single Board Computers (SBC), Industrial Motherboards, Multi-Touch Computers & Displays, Ethernet Switches, Frame Grabbers, Embedded Peripherals and Design & Manufacturing Services with leading performance, trusted reliability, advanced technology, and innovative concepts.

Vecow aims to be your trusted embedded business partner. Our experienced service team is dedicated to creating and maintaining strong partnerships and one-stop integrated solutions. Our services are specific and consider each partner’s unique needs in regards to: Machine Vision, Autonomous Vehicles, Robotic Control, Digital Rail, Public Security, Transportation & V2X, Smart Factory, and any Edge AI applications.

FEATURES

VHub ESG Solutions: Smart Digital Factory Accelerator

Vecow VHub ESG is an one-stop AIoT solution service to accelerate digitalization and management tasks in the factory. Vecow delivers both hardware and software integrated turnkey solutions to facilitate the requirements of Sustainable Development Goals (SDGs), including Carbon Intensity, Facility Management, Optimized Productivity, and Workforce Management.

https://reurl.cc/zraxzN

ECX-3000: Workstation-grade Fanless System

The latest 13th Gen Intel® Core™ i9/i7/i5/i3 Processor with Intel® 600 Series chipset, supports max 24 cores and 32 threads with advanced performance hybrid architecture; Max 8 2.5GigE LAN w/4 IEEE 802.3at PoE+, dual 10GigE LAN, 6 USB 3.2 Gen 2, DC 9V to 50V, Software Ignition Control; Intel® vPro, TCC, TSN, TPM 2.0; Optional VHub AIoT Solution Service accelerates Edge AI applications.

https://reurl.cc/7j85yd

https://reurl.cc/VRbWdQ

ECX-3000 PEG: Workstation-grade AI Inference System

The latest 24-core 13th Gen Intel® Core™ i9/i7/i5/i3 Processor with Intel® 600 Series chipset, up to 65W TDP CPU; Supports outstanding AI computing productivity by independent NVIDIA®/ AMD graphics cards or AI accelerate cards, up to 200W power budget; 6 GigE LAN w/4 IEEE 802.3at PoE+, DC 12V to 50V, Software Ignition Control; Intel® vPro, TCC, TSN, TPM 2.0; Optional VHub Solution Service accelerates Edge AI applications.

https://reurl.cc/4XzZ33

EAC-5000: Expandable Edge AI Computing System

Advanced NVIDIA® Jetson AGX Orin™ Platform supports up to 275 TOPS AI performance; the latest NVIDIA® Ampere™ architecture, max 2048 NVIDIA® CUDA® cores and 64 Tensor cores; 2 GigE LAN, 5 USB, 2 Isolated CAN FD, 8 Fakra-Z for GMSL 2/1 automotive cameras, PCIe 4.0 x8 supports optional multiple 10GigE/PoE LAN/USB, multiple 5G/4G/LTE/WiFi/BT/GPS, DC 9V to 50V, Fanless -20°C to 70°C operation.

https://reurl.cc/4XzZ43

Embedded Computing Design
www.vecow.com  sales@vecow.com  +886 2 22685658  @VecowCo  www.linkedin.com/company/vecow-co.-ltd Edge AI & Machine Learning
Vecow
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 27

Synaptics Resonate™ Revolutionizes Audio and Haptic Feedback for Embedded Displays

Synaptics Resonate is a game-changing solution that adds audio and haptic feedback to the rear of embedded displays, directing audio outward, directly from the glass surface. The innovative design saves space, lowers cost, and reduces power consumption, while also improving system reliability by enabling water and dust ingress prevention. Combined with high-quality audio and a more immersive viewing and interactive experience, the technology has applications ranging from industrial, automotive, and manufacturing, to portable media players, consumer electronics, toys, and gaming platforms.

Resonate uses piezoelectric transducers attached to the back of the display panel. These are driven by a Synaptics proprietary amplifier such that they vibrate the display glass to produce the required audio waves and haptic feedback. With direct line of sight from the sound source to the user, the result is a more immersive viewing experience. The removal of traditional speakers and associated vents means the product casing can be fully sealed, enabling dust and waterproof designs, making Resonate ideal for challenging embedded environments.

Other features include high sound pressure levels (SPLs), an efficiency improvement of up to 80%, fewer components for lower BOM, a smaller footprint, higher reliability, less weight – particularly with the removal of linear resonant actuators (LRAs) for haptics – and the opportunity for a more elegant industrial design that is protected from environmental hazards.

Haptic feedback is also enhanced, as it correlates directly with the displayed content. This capability is particularly important in emergency situations where both haptic and audio alerts can be used. In consumer applications, such as gaming, the user can see, hear, and now feel exactly what’s happening on the display in real-time.

The nature of piezoelectric transducers is such that the reverse is also true: users can apply pressure to the screen, causing the piezoelectric transducers to produce a corresponding electrical signal that can be detected by the system to, for example, control acceleration. This adds a third axis (z) of user control.

Resonate is available now.

To find out more, go to www.synaptics.com/resonate.

FEATURES

Ą Embeds audio and haptic feedback with displays

Ą Up to 80% improvement in energy efficiency

Ą Enables dust and waterproof displays with audio

Ą Lower cost, smaller footprint

Ą Immersive user experience: direct line of sight from audio source to ears

Ą Adds third axis (z) of user control to displays with force sensing

Ą High-quality audio

Ą High sound pressure levels

Embedded Computing Design
Embedded Hardware www.synaptics.com/resonate Synaptics Incorporated www.synaptics.com  sales@synaptics.com  www.synaptics.com/contact  www.linkedin.com/company/synaptics  @ SynaCorp
28 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

Micro-ATX carrier board eco-system for COM-HPC

The new conga-HPC/uATX industrial-grade COM-HPC carrier board in Micro-ATX form factor is designed for embedded longterm availability of at least seven years, which eliminates the design risks, revision requirements and supply chain uncertainties of standard or semi-industrial-grade motherboards that are usually only deliverable for three to five years. As it is processor socket and vendor independent, the board can be equipped with any high-end Computer-on-Module available in COM-HPC Client Size A, B or C, making OEM designs even more flexible and sustainable. Impressive scalability across the entire range of 12th Generation Intel Core processor-based COM-HPC modules. Performance options for the new conga-HPC/uATX carrier board range from the conga-HPC/cALS COM-HPC Client Size C modules, offering the currently highest embedded client performance with 16-core Intel Core i9 processor, to the masters of price/ performance optimization – the conga-HPC/cALP COM-HPC

Client Size A modules with Intel Celeron 7305E processor.

The combination of application-ready industrial-grade COMs & carrier boards with tailored cooling solutions and comprehensive BSPs for all leading RTOSes and the real-time hypervisor from Real-Time Systems is perfect for fastest time-to-market, produces lowest non-recurring engineering costs, enables customers to react very quickly to changing market requirements and reduces the effort to scale the performance of Micro-ATX based systems to a minimum. It allows customers to create a full product portfolio based on one single carrier concept.

The carrier board offers the latest interface enhancements such as PCIe Gen4 and USB 4 and is a perfect fit for system designs with congatec’s latest high-end COM-HPC Client modules based on the 12th generation Intel Core i9/7/5/3 desktop processors (formerly code-named Alder Lake-S). Most impressive is the fact that engineers can now leverage Intel’s innovative performance hybrid architecture. Offering of up to 16 cores/24 threads, 12th Gen Intel Core processors provide a quantum leap in multitasking and scalability levels.

Next-gen IoT and edge applications benefit from up to 8 optimized Performance-cores (P-cores) plus up to 8 low power Efficient-cores (E-cores) and DDR5 memory support to accelerate multithreaded applications and execute background tasks more

efficiently. Optimized for highest embedded client performance, the graphics of the LGA processor based modules delivers now up to 94% faster performance and its image classification inference performance has nearly tripled with up to 181% higher throughput. In addition, the modules offer massive bandwidth to connect discrete GPUs for maximum graphics and GPGPU based AI performance.

FEATURES

Ą Application Carrier Board for COM-HPC Client Type Modules (Sizes A, B, C) in Micro-ATX form factor. Size 244 x 244 mm2

Ą Besides highest bandwidth and performance, the new flagship COM-HPC Client modules impress with dedicated AI engines supporting Windows ML, Intel Distribution of OpenVINO toolkit and Chrome Cross ML

Ą Different AI workloads can seamlessly be delegated to the P-cores, E-cores, as well as the GPU execution units to process even the most intensive edge AI workloads

Ą The built-in Intel Deep Learning boost technology leverages different cores via Vector Neural Network Instructions (VNNI), and the integrated graphics supports AI accelerated DP4a GPU instructions that can even be scaled to dedicated GPUs

Ą Intel’s lowest power built-in AI accelerator, the Intel Gaussian & Neural Accelerator 3.0 (Intel GNA 3.0), enables dynamic noise suppression and speech recognition and can even run while the processor is in low power states for wake-up voice commands.

Embedded Computing Design
Embedded Hardware www.congatec.com congatec www.congatec.com  sales-us@congatec.com  858-457-2600  www.linkedin.com/company/congatec/  @ congatecAG
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 29

congatec i.MX 8M Plus Starter Set

congatec extends its i.MX 8 ecosystem with a new starter set for AI accelerated intelligent embedded vision applications. Based on a SMARC Computer-onModule with i.MX 8M Plus processor, the starter set’s sweet spot is the utilization of the new processor integrated NXP Neural Processing Unit (NPU). Delivering up to 2.3 TOPS of performance for deep learning based artificial intelligence, it can run inference engines and libraries such as Arm Neural Network (NN) and TensorFlow Lite. It also integrates seamlessly with Basler embedded vision software to give OEMs an application ready solution platform for the development of nextgeneration AI accelerated embedded vision systems.

Typical applications are wide ranging, from price sensitive automated checkout terminals in retail to building safety, and from in-vehicle vision for navigation to surveillance systems in busses. Industrial use cases include HMIs with vision based user identification and gesture based machine operation as well as vision supported robotics and industrial quality inspection systems.

FEATURES

Ą 4 powerful Arm Cortex®-A53 cores, 1x Arm Cortex®-M72 controller and the NXP NPU to accelerate deep learning algorithms at the edge and comes with passive cooling.

Ą 3.5 inch carrier board conga-SMC1/SMARC-ARM directly connects the 13 MP Basler dart daA420030mci BCON for MIPI camera with an F1.8 f4mm lens via MIPI CSI-2.0 without any additional converter modules. Next to MIPI CSI-2.0, USB and GigE vision cameras are also supported.

Ą On the software side, congatec provides a bootable SD card with preconfigured boot loader, Yocto OS image, matching BSPs, and processor-optimized Basler embedded vision software enabling immediate AI inference training on the basis of captured images and video sequences.

The Real-Time Systems Hypervisor splits the hardware into individual partitions containing one or more processor cores, some memory and PCI devices. Different partitions may run different operating systems or multiple instances of the same OS. Two different OS Execution Modes that may run on different processor cores in parallel:

• With the Privileged Mode you have direct hardware access, therefore, no added latencies and additional (latency-free and hardware-assisted) protection, which is configurable like Virtual MMU, restricted I/O, IOMMU.

• With the Virtualized Mode you have pass-through access to assigned devices, you can run unmodified operating systems and update them at any time, or processor cores running GPOS’s like Windows or standard Linux distributions.

The RTS Hypervisor sits in-between the hardware and the OS to ensure proper isolation. You have complete isolation of OS in memory, no inter-dependence, reboot of any system is possible at any time and it is definable in the boot sequence.

FEATURES

Ą Configuration of RTS Hypervisor is performed through a simple text file

Ą Works out-of-the-box without customization

Ą Runs on any PC from low-power modules to multi-socket servers

Ą Secure design with no unessential interfaces or backdoors

Ą Rapid inter-system communication and synchronization

Ą All popular OS supported

Embedded Computing Design
Embedded Hardware Real-Time Systems GmbH www.real-time-systems.com/  info@real-time-systems.com  +49 (0) 751 359 558 – 0  www.linkedin.com/company/real-time-systems-gmbh  +1 425-802-0240
REAL-TIME Hypervisor
Embedded Hardware
congatec www.congatec.us  sales-us@congatec.com  858-457-2600  www.linkedin.com/company/congatec  twitter.com/congatecAG 30 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

TS-4900

The TS-4900 is a high-performance TS-SOCKET System on Module based on the NXP i.MX6 CPU, which implements the Arm® Cortex®-A9 architecture clocked at 1 GHz (Single or Quad Core) and paired with 1GB or 2GB of DDR3 RAM.

Several industry-standard interfaces and connections such as Gigabit Ethernet, WiFi and Bluetooth, USB, SATA II, PCI Express, and more make the TS-4900 a great fit for nearly any embedded systems application, especially those needing wireless connections like industrial internet of things gateway.

FEATURES

Ą 1 GHz Single or Quad Core Cortex-A9 Arm CPU

Ą Up to 2 GB DDR3 RAM

Ą 4GB MLC eMMC flash storage

Ą Bluetooth and WiFi onboard radios

Ą Up to 70x DIO, 2x I2C, 1x I2S, 2x SPI, 2x CAN

Ą Industrial temperature range (-40°C to 85°C)

Embedded

TS-7100-Z

Time and again at customer visits, embeddedTS heard the same thing, “We love your single board computers, but make them smaller! They have to go inside this cabinet, and we need room for everything!” We listened. embeddedTS is proud to introduce the TS-7100-Z, our smallest single board computer in an optional DIN-mountable enclosure that measures 2.4" by 3.6" by 1.7", powered by the Arm® Cortex®-A7 based iMX6 UltraLite CPU. It ships with industry-standard interfaces, including Ethernet, USB, RS-232, RS-485, and CAN. For wireless connectivity, the TS-7100-Z comes with WiFi and Bluetooth module, as well as a NimbeLink/Digi cellular modem and mesh network socket.

With all of these features packed into a smaller footprint, not only will the TS-7100-Z fit in your cabinet, but it can also help to replace other peripherals and modules to free up even more space and get more done. Combining all of these components into one small DIN mounted unit, we provide the ability to promote hot swapping in the field, limiting costly technician time and troubleshooting.

FEATURES

Ą NXP i.MX 6UltraLite 696 MHz Arm® Cortex®-A7 based SPC with FPU

Ą 4 GB eMMC Flash Storage

Ą 2 KB FRAM Storage

Ą 512 MB RAM

Ą 2x 10/100 Ethernet Ports, 2x USB Host Ports, 2x Serial Ports, RS-485 Ports, CAN Port

Ą Industrial Temperature Range (-40 °C to 85 °C)

embeddedTS www.embeddedts.com  sales@embeddedts.com  480-837-5200  @ts_embedded https://www.embeddedts.com/products/ts-4900 Embedded Hardware www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 31

Embedded Computing Design
embeddedTS
www.embeddedts.com  sales@embeddedts.com  480-837-5200  @ts_embedded
https://www.embeddedts.com/products/ts-7100-z Hardware
A wide variety of software platforms are available, including Linux, Ubuntu Core, Android, and QNX for flexibility in matching your embedded system requirements.

Powered by the Marvell Armada 385 Dual Core 1.3 GHz Arm® Cortex®-A9based CPU, the TS-7800-V2 industrial Single Board Computer (SBC) stands out from the crowd with its high-performance components, connectivity options, and an unbelievable feature set packaged into a small footprint in both size and power. It's a general-purpose, low-power SBC ready to tackle demanding applications, including data acquisition, IoT, industrial automation, and anything in between.

Each component on the TS-7800-V2 has been carefully chosen to ensure reliable operation in the field. Data is reliably stored in the onboard eMMC flash. With the included heat sink, the fanless design of the TS-7800-V2 is able to withstand high vibration, and even with two CPU cores running at 1GHz and tasked to their max the system can operate at a wide temperature range of -40 °C to 85 °C.

FEATURES

Ą Marvell Armada 385 Dual Core 1.3 GHz Arm-based CPU

Ą 1 DDR3 RAM

Ą 4 GB MLC eMMC Flash

Ą 20k LUT Cyclone FPGA (145 Various I/O Pins)

Ą 5x RS-232, 4x TTL UART, 2x RS-485 and CAN Bus

Ą 6x PWM Channels

MBB-1000

The MBB-1000 is a 13th/12th Gen Intel® Core™ processors (formerly Alder Lake) powered ATX motherboard. It is built with long-term reliability for graphics-intensive applications such as AIoT, digital signage, medical imaging, video surveillance and interactive kiosks.

The MBB-1000 supports four 4K independent displays with 1x HDMI (2.0b), 1x DVI-D, and 2x DisplayPort 1.4a (DP++). It features 5G/4G/LTE connectivity with a 5G-compatible M.2 B3052 socket and discrete WiFi 6E with the new frequency band ranging from 5.925 to 7.125 GHz. The board comes with four high-speed DDR4-3200 RAM sockets with a total capacity of 128GB and extensive I/O interfaces with 2x Intel® 2.5G LAN, 10x USB ports, 4x SATA III, 4x serial ports, and multiple expansion slots including 1x PCI-E(x16), 2x PCI-E(x4), 1x PCI-E(x1), 2x PCI, and 4x M.2 slots.

The industrial platform will be available with three different Intel chipsets (R680E/Q670E/W680) and Win10 (64-bit), Linux Ubuntu (64-bit), and Windows Server 2022 OS support. For more details, please visit www.ibase.com.tw.

FEATURES

Ą 13th/12th Gen Intel® Core™ i9/i7/i5/i3 / Pentium® / Celeron® processors

Ą 4x DDR4 DIMM, Max.128GB

Ą Intel® processor integrated graphics supports HDMI (2.0b), DVI-D, and DisplayPort (1.4) (DP++)

Ą Dual Intel® 2.5G LAN

Ą 8x USB 3.1, 2x USB 2.0, 4x SATA 3.0, 4x COM, 4x M.2 (B-Key, E-Key/ 2x M-Key)

Ą 1x PCI-E(x16) (Gen5.0), 2x PCI-E(x4) (Gen4.0), 1x PCI-E(x1) (Gen3.0), 2x PCI

Ą Watchdog timer, Digital I/O, iAMT (16.0), TPM (2.0)

https://www.ibase.com.tw/en/product/category/Embedded_Computing/Motherboard/ATX_Motherboard/MBB-1000

Embedded Computing Design
IBASE Technology Inc ibase.com.tw  sales@ibase.com.tw  +886-2-26557588  @iBaseTech  www.linkedin.com/company/ibase-technology-inc-/
Embedded Hardware
embeddedTS www.embeddedts.com  sales@embeddedts.com  480-837-5200  @ts_embedded https://www.embeddedts.com/products/TS-7800-V2
Hardware 32 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
TS-7800-V2
Embedded

Companies today are challenged by a fast-evolving technology landscape, a seemingly insatiable hunger for more connectedness and intelligence, and an explosion of data generated at the Edge. Moreso than ever before, system designers and developers need efficient and flexible processing solutions that can keep pace with this accelerated demand for innovation.

These customer needs are what inspired Lattice Semiconductor to create the Lattice Avant™ platform, extending the company’s low power leadership to span the small and mid-size density FPGA portions of the market.

Advancing FPGA Innovation

Architected from the ground up, Lattice Avant will enable designers with the power efficiency, performance, and small size leadership they know and expect from Lattice, with advanced connectivity and optimized compute capabilities at higher capacities than previous Lattice devices. This enables Lattice to address a broader set of customer applications than ever before.

A Closer Look at Lattice Avant

The Lattice Avant platform is designed at every level to deliver power efficiency, advanced connectivity, and optimized compute capabilities not previously available in mid-range FPGAs. While there is a lot of innovation worked into the platform, key architectural highlights include 25G SERDES and parallel I/O standards that address a wide variety of interface, and external memory interface support including DDR4, DDR5, and LPDDR4 along with legacy standards.

Addressing Key Customer Needs

Lattice Avant was born out of customer demand for compelling mid-range FPGA solutions for Communications, Computing, Industrial, and Automotive applications. When discussing their needs, it became clear that they were increasingly concerned with three key things: power efficiency, performance, and form factor – which aligned perfectly with what Lattice does best. As compared to existing FPGAs serving the mid-range FPGA segment, Lattice Avant features:

• Market-leading power efficiency with up to 2.5X lower power helping system and application engineers achieve power and thermal design efficiencies, improve operating costs, and enhance reliability

• Best-in-class performance delivering up to 2X faster throughput providing increased bandwidth and enabling reduced number of SERDES links, system cost and size.

• Industry leading form factor offering up to 6X smaller package sizes to enable size efficient system designs

Lattice Avant will leverage existing Lattice software solutions and application-specific solution stacks they already know and understand. This familiarity will help reduce adoption time and accelerate development.

The Lattice Avant platform is architected for scalability that will enable the rapid development of multiple new device families, available today with the Lattice Avant™-E FPGA family. Lattice Avant-E FPGAs are designed to solve key customer challenges at the Edge by combining class-leading power efficiency, size and performance with an optimized feature set tailored to the needs of Edge applications like data processing and AI.

To learn more about the Lattice Avant platform, visit the platform page: www.latticesemi.com/AvantPlatform

FEATURES

Ą High bandwidth SERDES

Ą Low power FPGA fabric

Ą External memory support

Ą Best-in-class security

Ą Fast and flexible programmable I/O

Ą Small form factor

Embedded Computing Design
Embedded Hardware www.latticesemi com/AvantPlatform Lattice Semiconductor www.latticesemi.com  503-268-8000  @ latticesemi  www.linkedin.com/company/lattice-semiconductor/
Lattice Avant™ FPGA Platform
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 33

6 Various Applications of 21.5" Touch Panel PC

MACTRON GROUP – MTG from Taiwan targets Touch Embedded Systems as the goal. Its business concept – “TRANSFORMER” means to approach various markets through the diversity of its hardware abilities. At Embedded World, you will visit their 6 types of main 21.5 inches Touch Panel PCs for the global markets among Medical, Automation, and Commercial. And they will release more new products than those. Its popular Aluminum Die-Casting Touch Panel PCs – WCP and WMP series will further be equipped with the powerful 12th Gen Intel Core i series with the Iris GPU. To achieve Touch Science furtherly, they are also on the road of AIoT and Big Data to achieve convenience and intuition in people’s daily lives. Besides pioneering the markets, expanding the testing and assembling plant in 2023 is what they're planning as well to maximize the buffer capacity. Go check their booth out for more information.

 sales@mactrongroup.com

www.mactrongroup.com

HazPAC® 10 Rugged Panel PC

The HazPAC® 10 Rugged Panel PC is certified by ATEX, IECEx, and for Class I, Division 2 (Groups A, B, C, D, T4). Designed for Windows 10® IoT Embedded, the HazPAC 10 system delivers powerful Intel® processing combined with a bright, LCD, five-wire resistive touchscreen. The fanless industrial computer features a wide -40°C to 60°C operating temperature making it perfect for a wide variety of embedded and HMI applications. The touchscreen integrates a glass surface that is waterproof, and impervious to flames, chemicals, solvents, and stylus use for maximum abrasion and scratch resistance. The HazPAC 10’s aluminum front bezel maintains NEMA 4/IP64 protection from sprayed liquids including rain, snow, splashes, hose downs and other pressurized water streams. For further protection, the bezel is sealed against dust and dirt. With its Class I, Division 2 rating, the HazPAC 10 is also approved for locations where flammable liquids or gases are handled and processed. Powered by an Intel® Atom® E3845 quad-core processor, the system has 8GB of DDR3 RAM and a 64GB CFast SSD port for maximum performance in embedded systems. Standard I/O includes Ethernet, serial, USB and digital interfaces, as well as an mPCIe expansion slot.

FEATURES

Ą WMP – Medical Premium

Ą WCP – Commercial Premium

Ą WAM – Panel Mount

Ą WAP – Waterproof Design

Ą WCA – Commercial Android

Ą WCS – Commercial Windows

 +8862 2795 1668

@MactronGroup

Embedded

FEATURES

Ą Available in 8.4" or 15" touchscreen models

Ą Certified by ATEX, IECEx, and for Class I, Division 2 (Groups A, B, C, D, T4)

Ą Durable five-wire resistive touchscreen

Ą Future-proof COM Express design

Ą Ethernet, serial, USB, and digital interfaces

Ą mPCIe expansion slot

Ą Wide -40°C to 60°C operating temperature range

Embedded Computing Design
Sealevel Systems, Inc. www.sealevel.com  sales@sealevel.com  864-843-4343  @SealevelSystems  www.linkedin.com/company/sealevel-systems-inc/
https://www.sealevel.com/product/h1400811-hazpac-10-rugged-panel-pc-touchscreen/ Hardware
MACTRON GROUP CO., LTD.
Embedded Hardware 34 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com
 www.linkedin.com/company/13437871/admin/

SECO Electronics Technology: From Edge to AI

Leveraging decades of expertise in turnkey embedded computing design, manufacturing, and Internet of Things (IoT) and Artificial Intelligence (AI) solutions, SECO enables businesses with smart solutions that accelerate digital transformation.

Edge Computing

SECO edge platforms feature state-of-the-art processing technologies, based on x86, Arm®, and FPGA architectures. Products are available as computer-on-module (COM) and single board computer (SBC) embedded boards, mountable human-machine interface (HMI) assemblies, and fully packaged devices – off-the-shelf or customized.

SECO HMI panel PCs are available with various processor, installation, and display size options from 5.0” to 21.5”. The TANARO 7.0 series, featuring NXP’s i.MX 8M Mini processor, is designed for rear or panel mounting.

Off-the-shelf COM and SBC products feature leading processing technologies (NXP, Intel®, AMD) compliant with major standards (SMARC, QSeven®, COM-HPC®, COM Express®, Pico-ITX, eNuc) or application-optimized. Latest SECO solutions include: COM-HPC®

Client ORION with 12th Gen Intel® Core™ processors (for automation, sensor fusion, and AI at-the-edge); COM Express® CALLISTO with 13th Gen Intel® Core™ processors (for AI and IoT end devices); SMARC FINLAY with Intel® Atom® processors x7000E Series or Intel® Core™ i3 processors (for power-efficient deep learning inference and UHD media processing); Arm®-based SMARC MAURY with NXP i.MX93 (for low-power, headless, or simple display handheld devices) and SMARC WILK with MediaTek Genio 7000 (for AI-accelerated and rich graphics applications); Qseven® ATLAS and PicoITX ICARUS with Intel® Atom™ x6000E Series (for AIoT applications).

System integration-ready boxed fanless embedded computers, communication gateways, and payment systems complete SECO’s off-the-shelf edge platforms. SECO offers custom design and integration of electronic devices, built for reliability and robustness.

Intelligent Platform Solutions

SECO makes the implementation of IoT infrastructure and business-enhancing AI applications easy with CLEA, an edge and cloud AI-IoT platform. With instances running on edge devices managed by a cloud-based software hub, CLEA can be deployed with minimal configuration, while also easily expandable. CLEA facilitates real time device monitoring, analytics, infrastructure management, predictive maintenance, secure remote software updates, and more. The platform enhances intelligence, with easy aggregation and visualization of data from multiple sources for intuitive big-picture analysis and optimization.

FEATURES

Ą Off-the-shelf embedded products: COM, SBC, mountable HMI devices, and payment systems compliant with widely used standards that reduce time-to-market.

Ą Operating systems for edge devices: Linux, Android, Windows, RTOS.

Ą Customized computing platforms: custom-designed circuitry, software, and devices that meet unique product requirements.

Ą CLEA edge and cloud AI-IoT platform: software solution that easily deploys intelligence where devices and data become actionable value.

Ą Embedded AI: algorithms that autonomously analyze and optimize operation on the edge device.

Ą Product development: design and production of rugged high reliability electronic devices, including rugged tablets, devices, and industrial equipment.

Ą World-class electronics manufacturing: ISO 9001 and 13485 certified.

Embedded Computing Design
SECO www.seco.com  +1-240-558-2014  sales.us@seco.com  www.linkedin.com/company/seco-spa/ Embedded Processing www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 35

FEATURES:

Ą Form factor PC/104

Ą Multiple PC/104 cards can be operated in parallel (interrupt sharing)

Ą 14 port and 8 interrupt addresses are available for configuration using jumpers

Ą 1 or 2 High-speed CAN channels (ISO 11898-2)

Ą Bit rates from 5 kbit/s up to 1 Mbit/s

Ą Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID)

Ą Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1)

Ą NXP SJA1000 CAN controller, 16 MHz clock frequency

Ą NXP PCA82C251 CAN transceiver

Ą 5 V supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter

Ą Optionally available with galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel

Ą Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

CAN Interface for PC/104

The PCAN-PC/104 card enables the connection of one or two CAN networks to a PC/104 system. Multiple PCAN-PC/104 cards can easily be operated using interrupt sharing.

The card is available as a single- or dual-channel version. The opto-decoupled versions also guarantee galvanic isolation of up to 500 V between the PC and the CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

PCAN-PC/104-Plus

FEATURES:

Ą Form factor PC/104

Ą Use of the 120-pin connection for the PCI bus

Ą Up to four cards can be used in one system

Ą 1 or 2 High-speed CAN channels (ISO 11898-2)

Ą Bit rates from 5 kbit/s up to 1 Mbit/s

Ą Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID)

Ą Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1)

Ą NXP SJA1000 CAN controller, 16 MHz clock frequency

Ą NXP PCA82C251 CAN transceiver

Ą 5 V supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter

Ą Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

Ą Optionally available with galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel

Ą PC/104-ISA stack-through connector

CAN Interface for PC/104-Plus

The PCAN-PC/104-Plus card enables the connection of one or two CAN networks to a PC/104-Plus system. Up to four cards can be operated, with each piggy-backing off the next. The CAN bus is connected using a 9-pin D-Sub plug on the slot bracket supplied.

The card is available as a single or dual-channel version. The opto-decoupled versions also guarantee galvanic isolation of up to 500 V between the PC and the CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

Embedded Computing Design
Industrial Automation & Control PEAK-System Technik GmbH www.peak-system.com/quick/PC104-2  info@peak-system.com  +49 (0) 6151-8173-20  www.linkedin.com/company/peak-system  @PEAK_System
Industrial Automation & Control
PCAN-PC/104
GmbH
 info@peak-system.com  +49 (0) 6151-8173-20  www.linkedin.com/company/peak-system  @PEAK_System
PEAK-System Technik
www.peak-system.com/quick/PC104-1
36 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

Ą Form factor PC/104

Ą Use of the 120-pin connection for the PCI bus

Ą Up to four cards can be used in one system

Ą 4 High-speed CAN channels (ISO 11898-2)

Ą Bit rates from 5 kbit/s up to 1 Mbit/s

Ą Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID)

Ą Connection to CAN bus through D-Sub slot brackets, 9-pin (in accordance with CiA® 303-1)

Ą FPGA implementation of the CAN controller (SJA1000 compatible)

Ą NXP PCA82C251 CAN transceiver

Ą Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel

Ą 5 V supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter

Ą Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

Technik

PCAN-PCI/104-Express

FEATURES:

Ą PCI/104-Express card, 1 lane (x1)

Ą Form factor PC/104

Ą Up to four cards can be used in one system

Ą 1 or 2 High-speed CAN channels (ISO 11898-2)

Ą Bit rates from 5 kbit/s up to 1 Mbit/s

Ą Compliant with CAN specifications 2.0A (11-bit ID) and 2.0B (29-bit ID)

Ą Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1)

Ą FPGA implementation of the CAN controller (SJA1000 compatible)

Ą NXP PCA82C251 CAN transceiver

Ą Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel

Ą Supplied only via the 5 V line

Ą 5 V supply to the CAN connection can be connected through a solder jumper, e.g., for external bus converter

Ą Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

Ą Optionally available: PCI-104 stack-through connector

Four-Channel CAN Interface for PC/104-Plus

The PCAN-PC/104-Plus Quad card enables the connection of four CAN networks to a PC/104-Plus system. Up to four cards can be operated, with each piggy-backing off the next. The CAN bus is connected using a 9-pin D-Sub plug on the slot brackets supplied. There is galvanic isolation of up to 500 V between the computer and CAN sides.

The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic.

Industrial Automation & Control PEAK-System

CAN Interface for PCI/104-Express

The PCAN-PCI/104-Express card enables the connection of one or two CAN buses to a PCI/104-Express system. Up to four cards can be stacked together. The CAN bus is connected using a 9-pin D-Sub plug on the slot brackets supplied. There is galvanic isolation of up to 500 V between the computer and CAN sides.

www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 37

Embedded Computing Design
The package is also supplied with the CAN monitor PCAN-View for Windows and the programming interface PCAN-Basic. Industrial Automation & Control PEAK-System Technik GmbH www.peak-system.com/quick/PC104-4  info@peak-system.com  +49 (0) 6151-8173-20  www.linkedin.com/company/peak-system  @PEAK_System
GmbH
 info@peak-system.com  +49 (0) 6151-8173-20  www.linkedin.com/company/peak-system  @PEAK_System
PCAN-PC/104-Plus Quad
www.peak-system.com/quick/PC104-3
FEATURES:
Ą Optionally available: PC/104-ISA stack-through connector

PCAN-PCI/104-Express FD

FEATURES:

Ą PCI/104-Express card, 1 lane (x1)

Ą Form factor PC/104

Ą Up to four cards can be used in one system

Ą 1, 2, or 4 High-speed CAN channels (ISO 11898-2)

Ą Complies with CAN specifications 2.0 A/B and FD (ISO and Non-ISO)

Ą CAN FD bit rates for the data field (64 bytes max.) from 20 kbit/s up to 12 Mbit/s

Ą CAN bit rates from 20 kbit/s up to 1 Mbit/s

Ą Connection to CAN bus through D-Sub slot bracket, 9-pin (in accordance with CiA® 303-1)

Ą FPGA implementation of the CAN FD controller

Ą Microchip CAN transceiver MCP2558FD

Ą Galvanic isolation on the CAN connection up to 500 V, separate for each CAN channel

Ą CAN termination and 5 V supply to the CAN connection can be activated through a solder jumper

Ą Extended operating temperature range from -40 to 85 °C (-40 to 185 °F)

Ą Optionally available: PCI-104 stack-through connector

PEAK-System Technik GmbH

www.peak-system.com/quick/PC104-5

CAN FD Interface for PCI/104-Express

The PCAN-PCI/104-Express FD allows the connection of PCI/104Express systems to CAN and CAN FD buses. Up to four cards can be stacked together. The CAN bus is connected via 9-pin D-Sub connectors to the supplied slot brackets. There is a galvanic isolation between the computer and the CAN side up to 500 V. The card is available in single-, dual-, or four-channel versions. The monitor software PCAN-View and the programming interface PCAN-Basic are included in the scope of supply and support the new standard CAN FD.

Advanced Wireless Protocol Analysis System

Advanced Wireless Protocol Analysis System The most advanced, most comprehensive Bluetooth protocol analyzer ever made. Building on a legacy of innovation, the Bluetooth Vanguard All-In-One Wireless Protocol Analysis System delivers new advances designed to ease the increasingly complex tasks of Bluetooth developers.

With its revolutionary wideband Digital Radio and integrated Allin-One hardware approach, Ellisys has changed the way Bluetooth protocol capture and analysis is done, by radically overcoming the drawbacks of legacy approaches. The Ellisys wideband capture approach robustly records any packet, at any time, from any neighboring piconet, with zero-configuration and without being intrusive. Vanguard provides synchronized capture and analysis of BR/EDR, Bluetooth Low Energy, Wi-Fi 802.11 a/b/g/n/ac (3x3), WPAN 802.15.4 (all 16 2.4 GHz channels), raw 2.4 GHz RF spectrum analysis, HCI (USB, UART, SPI), generic SPI/UART/I2C/SWD communications, WCI-2, logic signals, and Audio I2S.

FEATURES

Ą All-in-One: Fully hardware-integrated, time-synchronized, and truly one-click concurrent capture of BR/EDR, Bluetooth Low Energy, Wi-Fi, WPAN (IEEE 802.15.4), raw RF spectrum, HCI, logic/GPIO, generic I2C, UART, SWD, and SPI, Audio I2S, and WCI-2

Ą Bluetooth Wideband Capture: Easy and rock-solid capture of any traffic on all channels

Ą Wi-Fi 802.11 a/b/g/n/ac (3x3) Capture: Extremely accurate and perfectly synchronized Wi-Fi capture accelerated by Ellisys hardware

Ą WPAN 802.15.4 Wideband Capture: Concurrent capture of all 16 WPAN 2.4 GHz channels for an unmatched coexistence analysis capability

Ą Connection / Power Flexibility: Connect, control, and power the system locally or remotely via networkable GbE or USB 3.1 over Type-C™

Ą Advanced Features for Bluetooth LE Audio

https://ellisys.com/products/bv1

Embedded Computing Design
Industrial Automation & Control
 info@peak-system.com  +49 (0) 6151-8173-20  www.linkedin.com/company/peak-system  @PEAK_System
Ellisys www.ellisys.com  sales.usa@ellisys.com  866-724-9185  @Ellisys1
www.linkedin.com/company/ellisys
Ellisys Bluetooth® Vanguard™
Wireless
38 Embedded Computing Design EMBEDDED WORLD | Spring 2023 www.embeddedcomputing.com

SYN4778: Lowest Power, Smallest, Most Accurate GNSS IC for IoT Devices

The SYN4778 is the smallest, lowest power, most accurate Global Navigation Satellite System (GNSS) IC for the Internet of Things (IoT). The chip draws 80% less power and comes in a package that is 30% smaller than comparable devices while providing a 50% improvement in accuracy. It extends battery life, reduces product size, and enhances the performance of advanced location-based services (LBSs) for IoT devices such as wearables, as well as mobile accessories, asset tags, tracking systems, drones, and navigation systems.

The GNSS receiver typically consumes an out-sized portion of available power in battery-powered IoT devices. The SYN4778’s advanced 7-nm semiconductor process and on-chip power management greatly reduce this power draw. In addition, the chip uses both the L1 and L5 satellite bands to reduce the time to first fix (TTFF) by 35% and the power consumed for first fix by 72%. Fast, low-power TTFF greatly improves the end-user experience, while lower overall power and smaller footprint give product developers the ability to extend battery life and shrink the overall product size.

Alternatively, developers can add more device functionality and features – such as biometrics, movement, or ambient sensors – for a given product power budget and form factor. To enhance location accuracy, the SYN4778 uses a proprietary satellite tracking database.

FEATURES

Ą The SYN4778’s advanced 7-nm semiconductor process and on-chip power management greatly reduce power consumption

Ą Uses both the L1 and L5 satellite bands to reduce the time to first fix (TTFF) by 35% and the power consumed for first fix by 72%

Ą Uses proprietary satellite tracking database to enhance accuracy

Ą Measures 2.4 x 2.7 mm (40-ball FCBGA package)

Ą Option to add more device functionality and features – such as biometrics, movement, or ambient sensors – for a given product power budget and form factor

Ą Advanced multipath interference mitigation using L5 band signals from GPS, Galileo, BeiDou, NAVIC, SBAS, and Quasi Zenith Satellite Systems (QZSS)

Ą LTE jamming and signal filtering, and continuous – highly parallel – search and track of the complete GNSS channels (including the L5 band) for greater positioning accuracy for LBS applications, particularly in urban environments

Ą Support for multiple operating systems (such as Android, Linux, and FreeRTOS) and third-party software to enable a broader range of application-optimized IoT devices

Ą Low-noise, high-linearity RF front end makes an external LNA and second SAW filter optional to reduce BOM and increase layout flexibility

Embedded Computing Design
IoT
Synaptics Incorporated www.synaptics.com  sales@synaptics.com  www.synaptics.com/contact  www.linkedin.com/company/synaptics  @ SynaCorp
www.synaptics.com
www.embeddedcomputing.com Embedded Computing Design EMBEDDED WORLD | Spring 2023 39

Our batteries offer a winning combination: a patented hybrid layer capacitor (HLC) that delivers the high pulses required for two-way wireless communications; the widest temperature range of all; and the lowest self-discharge rate (0.7% per year), enabling our cells to last up to 4 times longer than the competition.

Looking to have your remote wireless device complete a 40-year marathon? Then team up with Tadiran batteries that last a lifetime.

Tadiran Batteries 2001 Marcus Ave. Suite 125E Lake Success, NY 11042 1-800-537-1368 516-621-4980 www.tadiranbat.com PROVEN 40 YEAR OPERATING LIFE *
Remote wireless devices connected to the Industrial Internet of Things (IIoT) run on Tadiran bobbin-type LiSOCl2 batteries.
* Tadiran LiSOCL2 batteries feature the lowest annual self-discharge rate of any competitive battery, less than 1% per year, enabling these batteries to operate over 40 years depending on device operating usage. However, this is not an expressed or implied warranty, as each application differs in terms of annual energy consumption and/or operating environment.
run longer on Tadiran batteries. ANNUAL SELF-DISCHARGE TADIRAN 0.7% Up to 3% COMPETITORS
IIoT devices

Turn static files into dynamic content formats.

Create a flipbook
Issuu converts static files into: digital portfolios, online yearbooks, online catalogs, digital photo albums and more. Sign up and create your flipbook.