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University Update
Tuning into terahertz for comms www.MilitaryEmbedded.com
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Virtual ETT: Familiar faces, SOSA, VPX
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Jan/Feb 2021 | Volume 17 | Number 1
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TABLE OF CONTENTS 28
January/February 2021 Volume 17 | Number 1
36
COLUMNS Editor’s Perspective 8 Virtual ETT: Familiar faces, SOSA, VPX By John McHale
University Update 10 Unlocking the terahertz band to aid military communications By Lisa Daigle
Mil Tech Insider 12 SOSA Technical Standard will benefit systems of all kinds By Andrew McCoubrey
THE LATEST
FEATURES SPECIAL REPORT: Radar for missile/hypersonic defense 16 Hypersonics: Making MACH 5 and beyond detectable and defendable By Emma Helfrich, Technical Editor 20 Redefining sensor-edge processing By Tom Smelker, Mercury Systems
MIL TECH TRENDS: Leveraging SOSA for radar applications
Defense Tech Wire 14 By Emma Helfrich Editor’s Choice Products 44 By Mil Embedded Staff Connecting with Mil Embedded 46 By Mil Embedded Staff 10
24 Versatility is key as OpenVPX enclosure requirements continue to evolve By Justin Moll, Pixus Technologies 28 Sensor Open Systems Architecture (SOSA): Enabling the next generation of
flexible and adaptable radar systems
By Denis Smetana, Curtiss-Wright Defense Solutions
INDUSTRY SPOTLIGHT: RF and microwave in electronic warfare systems 32 Emerging threats drive RF and microwave component design trends for
electronic warfare
By Sally Cole, Senior Editor 36 The path to 5G for military use By Reza Mohammedi, Per Vices 40 Cloud-computing models provide an edge on the connected battlefield By Mike Epley, Red Hat 16
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WHITE PAPER
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EDITOR’S PERSPECTIVE
Virtual ETT: Familiar faces, SOSA, VPX By John McHale, Editorial Director
John.McHale@opensysmedia.com
Shared perspectives from embedded COTS suppliers at the annual Embedded Tech Trends (ETT) conference and networking event typically flavor my January column each year. Back-to-back twenty-minute press briefings in threehour periods not only provide column fodder but also help us plan editorial contributions for the coming year.
Lipkin added that while VNX, ShortVPX, and others are being considered by the subcommittee, they have not yet downselected to a particular standard.
Not in 2021, for obvious reasons, but Jerry Gipper – who runs ETT while also serving as executive director of VITA – unlike some other event directors, decided against canceling and put on not so much a virtual conference or exhibition, but a virtual networking event. Even so, he managed to maintain the essential nature of the event: to educate the industry media on how open standards and open architectures are proliferating not just in defense and aerospace applications, but also in industrial, transportation, automotive, space, and IoT.
He ended by challenging the connector community to develop next-generation VITA connectors in four years or less.
Presenters from four standards organizations provided that educational component – Gipper of VITA; Dr. Ilya Lipkin of the Sensor Open Systems Architecture (SOSA) Consortium; Jessica Isquith, President of PICMG; Doug Sandy, CTO of PICMG; and Christian Eder, President of SGET. They also made news on small form factors, connectors, CompactPCI Serial, VPX data rates, and several other fronts. SOSA news Responding to my question on which small-form-factor standards are being considered for SOSA adoption, Lipkin replied that the Small Form Factor subcommittee is looking at not only VNX (VITA 74) but also at ShortVPX. According to VITA, ShortVPX is a 100-mm-depth version of VPX that is still being developed within the VITA Standards Organization (VSO), with the concept having been brought up only at the end of 2020. Much discussion as well as work remains.
8 January/February 2021
Regarding VITA, Lipkin also noted that a new connector interface standard is needed, as the current one is getting dated. “Through SOSA activities it became apparent we need a new, more capable connector that will provide more” contacts (copper digital, coax for RF [radio frequency], optical); bandwidth; interoperability; and room to grow. Lipkin also speculated whether the time is right for optical backplanes for high-bandwidth data transfers with other signals over copper.
CompactPCI Serial While the presentation from PICMG’s Isquith mostly focused on applications outside the defense and aerospace arena, she did note that the Space Avionics Open Interface Architecture (SAVOIR) working group at the European Space Agency (ESA) selected CompactPCI Serial Space for multiple data-handling systems. VITA, VPX, and 40 years of VME During his presentation, Gipper highlighted VITA’s work with SOSA and announced higher data rates for VPX with the ratification of two standards: ANSI/VITA 46.30-2020 Higher Data Rate VPX Standard by ANSI and VITA, and the VITA 46.31-2020-VDSTU Higher Data Rate, Solder Tail VPX Standard by VITA. According to VITA, these standards define VPX connectors that support higher data rates, to at least 25 Gbaud – for protocols such as 100GBASE-KR4 Ethernet and PCIe Gen 4. Connectors compliant to VITA 46.30 or VITA 46.31 are intermateable to legacy VITA 46.0 connectors and follow the same form factor. Gipper also plugged the upcoming 40th anniversary of the VME standard this fall and said he will soon be announcing celebration plans with fun retrospectives on the authors of the VME standard. Our sister publication, VITA Technologies, will also be highlighting the anniversary with content in its fall 2021 issue. Please contact our assistant managing editor Lisa Daigle at lisa.daigle@opensysmedia.com for ways to participate. While the news and updates were beneficial, the best part was seeing colleagues and old friends we’d normally see throughout the year at various events. The networking nature of the live event was preserved with the interaction among the panelists – which included presenters, media, analysts, and ETT organizers – and the audience through games and conversation. “My primary goal was to save it and keep it on the calendar,” says Valerie Andrew, VP of Marketing for PICMG, Co-Chair of the SOSA Committee, and Strategic Marketing Architect for Elma Electronic. “[The virtual ETT] kept it alive and introduced some new people who hadn’t participated before.” It was fun, but I miss seeing everybody in person. I can’t help thinking about a sign featuring astronaut Neil Armstrong I saw at a business aviation show about a decade ago. The first man on the moon was quoted about the importance of air travel in the sign’s text: “Webinars and concalls are great, but nothing beats being there. Trust me.”
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UNIVERSITY UPDATE
Unlocking the terahertz band to aid military communications By Lisa Daigle, Assistant Managing Editor The clamor for more bandwidth for military use grows louder all the time, especially as 5G [fifth-generation wireless] networks promise to boost access to mission-critical communications, improve virtual reality/augmented reality tools for troops, and better support autonomous vehicles. In fact, the U.S. Department of Defense (DoD), in its May 2020 report outlining the government’s 5G strategy, called 5G broadband a “critical strategic technology” that the U.S. telecommunications industry must master so as to gain “long-term economic and military advantage.” One of the numerous projects aimed at dramatically boosting military data throughput is underway at Princeton University’s electrical engineering (EE) department, where researchers – supported in part by the Office of Naval Research (ONR), the Air Force Office of Scientific Research, and the Army Research Office – are working with the terahertz band of the electromagnetic spectrum to control, focus, and increase transmissions.
Figure 1 | The so-called metasurface is a programmable surface that enables engineers to control and focus transmissions in the terahertz band of the electromagnetic spectrum. Image courtesy Princeton University/Sengupta et al.
The research team assembled large-scale programmable metasurfaces using arrays of complementary metal oxide semiconductor (CMOS)-based chip tiles. In a study published in the December 2020 Nature Electronics journal, the researchers reported creation of a key component toward unlocking a communications band that promises to dramatically increase the amount of data wireless systems can transmit.
to their geometry at a speed of several billions of times per second – programmable, based on desired application and can split a single incoming terahertz beam up into several dynamic, directable terahertz beams that can maintain line of sight with receivers.
The programmable surface, termed a metasurface, enables engineers to control and focus transmissions in the terahertz band of the electromagnetic spectrum. The terahertz band is a frequency range located between microwaves and infrared light; if used in communications devices, use of the terahertz band would mean the ability to transmit far greater amounts of data than currently used radio-based wireless systems, according to information on the Princeton EE department website. The Princeton researchers – including Suresh Venkatesh, a postdoctoral research associate; Kaushik Sengupta, associate professor of electrical engineering; and Hooman Saeidi, a graduate student – have developed a device that focuses and directs terahertz waves that could enhance high-speed communications. The programmable metasurface device is the key: Unlike radio waves, which easily pass through obstructions including walls, waves in the terahertz band work best with a relatively clear line of sight for transmission. The metasurface device, as it directs and focuses the incoming terahertz waves, is able to beam the transmissions in any desired direction. This ability, say the researchers, not only could enable dynamically reconfigurable wireless networks, but it could also open up whole new high-rate, high-resolution data applications. The military could employ these capabilities for drone swarms, real-time sensor readings, and precision robotics, they add. Additionally, because the metasurface is assembled using the same materials used to make standard silicon chips, the cost is fairly low and can be mass-produced and placed in line-of-sight formation where needed. (Figure 1.) The Nature Electronics article described the design of the metasurface as featuring hundreds of programmable terahertz elements, each less than 100 micrometers in diameter and just 3.4 micrometers tall, consisting of layers of copper and paired with active electronics that collectively resonate with the structure. The electronics enable adjustments
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MILITARY EMBEDDED SYSTEMS
As a proof of concept, the Princeton researchers commissioned a silicon-chip foundry to fabricate the metasurface as tiles onto standard silicon chips. “The tiles are like Lego blocks and are all programmable,” Sengupta says. ONR program officer Kim Pavlovic said of the research: “The work being done by Dr. Sengupta and his colleagues is truly groundbreaking. The ability to work fluidly within the terahertz band of the electromagnetic spectrum will be a pivotal step forward for increased transmission capabilities across all segments of society, including our naval forces.” Looking ahead, Sengupta says that the programmable metasurfaces will need to be further developed before they can be used as components in innovative, next-generation networks. “There are so many things that people would like to do that are not possible with current wireless technology,” he continues. “With these new metasurfaces for terahertz frequencies, we’re getting a lot closer to making those things happen.” www.militaryembedded.com
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MIL TECH INSIDER
SOSA Technical Standard will benefit systems of all kinds By Andrew McCoubrey An industry perspective from Curtiss-Wright Defense Solutions The standards currently being defined by the Sensor Open Systems Architecture (SOSA) Consortium will deliver many clear benefits to system integrators designing embedded sensor-processing systems. The SOSA Technical Standard (SOSA Snapshot 3 is currently available to the public at https://publications.opengroup.org/ s201). It will define common pinouts that foster and ease interoperability. Greater system flexibility will come from the ability to place a variety of module types into the same system slot, while convergence on common interconnect technologies (such as backplane Ethernet) will ease the integration of modular systems. Integrators will benefit from having greater choice – even if only some of the cards in the chassis are aligned to the SOSA Technical Standard. Systems that require specialized cards not defined in the SOSA Technical Standard can use those products alongside SOSA cards, thereby benefiting from the economic and technical benefits of standardization on the slots that are aligned to the standard. The benefits of the SOSA Technical Standard go far beyond its standardized pinout. The reliability of systems deployed in harsh conditions will be improved by its use of the ANSI/VITA 47 standard, which defines requirements for environments, design and construction, safety, and quality. The SOSA Technical Standard also provides a novel approach to serial console ports (using 3.3 V rather than RS-232 levels), making it easier to multiplex ports from several cards onto a single physical interface outside the box. This standard also standardizes functionality required from Intelligent Platform Management Interface (IPMI). While IPMI has long be used to provide basic monitoring of card temperatures, voltages, and various vendor-specific readings, SOSA requires support for VITA 46.11 with HOST Tier 2 extensions to ensure all cards provide a consistent set of sensor monitoring and management commands. What the SOSA Technical Standard isn’t, though, is a panacea. System integrators will still need to ensure that vendors provide more than just compliance against the technical specification. While the standard will help drive interoperability and commonality, modular products are not becoming a commodity. Different products can deliver different functionality and levels of performance; not all vendors are equal. Interoperability only gets you part way home. Capabilities that support configuration management and mitigate obsolescence, processes that ensure the integrity of the component supply chain, and conformance to quality management systems such as ISO 900x, will remain critical differences between vendors of SOSA-aligned boards. Because of its origins as a standard for sensor-processing systems (the first “S” in the acronym = “sensor), the SOSA Technical Standard may not meet the needs of all modular systems. Mission systems that connect to a variety of devices and buses throughout a platform, for example, may still need types of cards that are not defined by the standard. While the SOSA Technical Standard does define backplane Ethernet switches ideal for connecting between processing elements within a chassis, a media conversion card (or a different switch entirely) will be needed if your system needs 10 ports of 1000BASE-T Ethernet to connect to cameras, radios, crew stations, or sensor-processing systems. The good news is that systems can support a mix of SOSA-aligned processing and mission processing. Imagine a 6-slot mission system: Three slots can host a SOSA-aligned processor card, while the other three can host 1553, storage, and an Ethernet switch that aren’t designed to align with SOSA. The beauty of the SOSA Technical Standard is that its benefits can flow to every type of system, enabling a system designer to take
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MILITARY EMBEDDED SYSTEMS
Figure 1 | Curtiss-Wright VPX3-687, a 10G/40G backplane Ethernet switch now available in a SOSA-aligned configuration.
advantage of its ecosystem even if they aren’t designing or deploying a SOSAaligned sensor-processing system. Another concern for some integrators will be that the SOSA Technical Standard and its ecosystem are new. Fortunately, not all SOSA-aligned board products will be brand new, from-the-ground-up designs. Some vendors will offer variants of proven and popular cards. The availability of widely deployed solutions in a SOSA-aligned variant will eliminate the need for designers to make a tradeoff between using a SOSA-aligned module and mature technologies. An example that will be available in both traditional and SOSA-aligned versions is Curtiss-Wright’s VPX3-687 backplane Ethernet switch, a 3U OpenVPX module with switching throughput up to 320 Gbits/sec and full-line-rate forwarding on up to 32 x 10 GbE/8 x 40 GbE interfaces. (Figure 1.) The SOSA version, which aligns with the SLT-3-SWH-6F1U7U14.4.14 profile, is orderable now (early 2021), meaning that designers can start developing SOSA-aligned solutions now using a proven product that will be available later in a SOSA-aligned variant. Andrew McCoubrey is the product marketing manager, switching and routing solutions, for Curtiss-Wright Defense Solutions. Curtiss-Wright Defense Solutions https://www.curtisswrightds.com/ www.militaryembedded.com
DEFENSE TECH WIRE NEWS | TRENDS | DOD SPENDS | CONTRACTS | TECHNOLOGY UPDATES
By Emma Helfrich, Associate Editor
BLOS high frequency comms demoed by GA-ASI without SATCOM
General Atomics Aeronautical Systems, Inc. (GA-ASI) completed the first beyond-line-of-sight (BLOS) high-frequency (HF) command and control (C2) demonstration for an unmanned aircraft system (UAS). According to officials, the HF C2 capability does not require a satellite-communications (SATCOM) link and is capable of providing BLOS connectivity as far as 8,000 miles, depending on transmit power and link geometry. For the demo, GA-ASI integrated the U.S. government’s Collaborative Operations in Denied Environment (CODE) autonomy software into the Open Operational Flight Profile (OFP) of an MQ-9A Block 5 Remotely Piloted Aircraft (RPA) and flew the MQ-9 using improved diagonal tails with conformal HF antennas integrated into the leading edges. The company claims that GA-ASI’s MQ-9 housed a FlexRadio Systems FLEX-6600 HF software-defined radio (SDR) and associated hardware to translate and execute an autonomous mission plan. GA-ASI created a specialized HF software adapter to manage the latency and throughput constraints of the HF waveform. Figure 1 | The MQ-9 Reaper shown on the flight line at Creech Air Force Base, Nevada. Air Force photo by Senior Airman Haley Stevens.
AI algorithm achieves first flight as copilot during USAF test
The U.S. Air Force conducted test flights with artificial intelligence (AI) as a working aircrew member on board a military aircraft for the first time. The AI algorithm, known as ARTUµ, flew with the pilot on a U-2 Dragon Lady assigned to the 9th Reconnaissance Wing at Beale Air Force Base. According to the Air Force, Air Combat Command’s U-2 Federal Laboratory researchers developed ARTUµ and trained it to execute specific inflight tasks that otherwise would be done by the pilot. During this flight, ARTUµ was responsible for sensor employment and tactical navigation while the pilot flew the aircraft and coordinated with the AI on sensor operation. Together, they flew a reconnaissance mission during a simulated missile strike, with the algorithm’s primary responsibility that of finding enemy launchers.
F-22 IFF capability receives DoD certification
BAE Systems received certification for its Identification Friend or Foe (IFF) transponder for the F-22 Raptor from the U.S. Department of Defense (DoD) AIMS program office, the organization that certifies the interoperability and technical performance of radar and IFF systems. According to BAE Systems, the IFF transponder waveform integration is part of a U.S. Navy contract to upgrade the Multifunctional Information Distribution System Joint Tactical Radio System (MIDS JTRS) terminal for the U.S. Air Force. BAE Systems’ F-22 IFF transponder is integrated with a multichannel subsystem, which is compliant with the new Mode 5 cryptographic standard and programmable with software rather than hardware. It is also designed to be compatible with the aircraft’s avionics equipment, which uses Link 16 and tactical air navigation system waveforms. Company officials state that certifying Mode 5 Level 2 capability in this transponder is a necessary step on the path to platform-level AIMS and Federal Aviation Administration certification.
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Figure 2 | F-22 Raptors taxi on the runway during a routine training schedule at Honolulu International Airport, Hawaii. U.S. Air National Guard photo by Senior Airman John Linzmeier.
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Portable tactical SATCOM system released by Elbit Systems
Elbit Systems has launched E-LynX-Sat, a compact SATCOM add-on system. The new system utilizes a lightweight terminal that interfaces with Elbit Systems’ E-LynX SDR solution. E-LynX-Sat is designed to enable infantry and maneuvering forces to maintain secure and portable voice and data communication services over significant ranges. The operational benefits of the launched E-LynX-Sat system were demonstrated during the British Army’s recent Warfighting Experiment 2020.
Figure 3 | A mock-up of the E-LynX SDR solution that is aimed at overcoming challenges in military networking, including size and weight reduction plus automatic tracking. Elbit Systems photo.
E-LynX-Sat integrates miniature phased-array antennas, a SATCOM modem, beam steering, and error-correction software as well as datacompression protocols. Using standard Ka- and Ku-band geostationary satellites, it features automatic electronic satellite tracking and direct sequence spread spectrum, intended to enable continuous over-thehorizon operations on-the-walk and on-the-move. The company says that the E-LynX-Sat is comprised of compact portable terminals and a Hub base station.
DARPA completes third test-flight series of Gremlins drones
Dynetics, a Leidos subsidiary, completed a third test-flight series in which the Gremlins Air Vehicle (GAV) and Gremlins Recovery System flew three more times. The most recent test took place at Dugway Proving Ground in Utah for the Defense Advanced Research Projects Agency (DARPA). The recently completed series demonstrated safe operation of the X-61A GAV on the range in close formation with the manned C-130 recovery aircraft. After the second test in July, the Dynetics Gremlins team continued its progress towards multiple aerial docking attempts with the Gremlins Autonomous Docking System (GADS). The team reported that it achieved the program’s first-ever aerial docking attempts, nine attempts in total, with each attempt coming within inches of capture. Similar to July’s test flight, the three GAVs were recovered on the ground using the parachute system. All four GAVs will embark on the next series of flights in early 2021.
AI and ML performance to be boosted with ruggedized storage devices
L3Harris Trenton Systems, Inc., is partnering with NGD Systems for ruggedized, high-capacity computational storage drives (CSDs) intended to offer a performance boost to real-time artificial intelligence (AI) and machine learning (ML) systems at the edge. According to the company, NGD’s 32TB U.2. NVMe solid-state drives (SSDs) manage data locally by bringing compute resources to the drives themselves, which aims to reduce the data movement and processing complications of a host server’s or workstation’s memory and CPUs. NGD’s CSDs are designed for large-scale AI and ML workloads and are also available in extended temperature ranges for rugged computing solutions like those manufactured by Trenton.
Robot dogs and 3D Virtual Ops Center to supplement Tyndall Air Force Base
Virtual Operations Center for the Air Force Base of the Future. Following its near-destruction during a hurricane in 2018, the U.S. Air Force began to modernize Tyndall Air Force Base (located in the Florida Panhandle), installing wireless connectivity on the flight line, multipurpose facilities, and building-health sensors. Immersive Wisdom’s software is intended to enable Air Force personnel to collaborate and act in real time in a 3D Virtual Ops Center containing maps, real-time video streams, and sensor feeds. According to the company, Tyndall will be one of the first Air Force bases to implement semi-autonomous robot dogs (“Q-UGVs”) into its patrolling regimen, integrated with Immersive Wisdom’s 3D Virtual Ops Center. The company also claims that this effort builds on its successes at the Air Force’s Advanced Battle Management System (ABMS) On-Ramps #1 and #2, where these integrated capabilities were first demonstrated. www.militaryembedded.com
Figure 4 | A Q-UGV seen during a previous Air Force test. U.S. Air Force photo.
MILITARY EMBEDDED SYSTEMS
January/February 2021
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SPECIAL REPORT
Hypersonics: Making MACH 5 and beyond detectable and defendable By Emma Helfrich, Technical Editor
Threats facing the U.S. military are evolving fast – hypersonically fast. At speeds of MACH 5 and greater, hypersonic weapons are becoming increasingly challenging to detect, deter, and destroy. Militarytechnology manufacturers, however, are refusing to let these light-speed advancements become the Achilles heel for the U.S. Department of Defense (DoD). The methods through which companies in the hypersonic sector plan to ensure domestic confidence in this arena are said to be dependent on innovations like early detection, robust sensor systems, and a better understanding of what exactly makes a hypersonic weapon so lethal.
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Radar for missile/hypersonic defense
An artist’s rendering illustrates what a hypersonic missile could look like as it travels along the edge of Earth’s atmosphere. Image courtesy of Raytheon.
The United States isn’t reinventing the wheel with hypersonic technologies or the systems that detect them. Adversaries like North Korea, Russia, and China have had significant stake in these capabilities for just as long, motivating much of the innovations that have taken place on the homefront. This global arms race has essentially boiled down to who can detect what, when they detect it, and for how long. The U.S. military already has the capabilities to recognize and destroy short-range ballistic missiles, but what makes a missile hypersonic is a flight speed of MACH 5 and above, equivalent to 3,836 mph. For perspective, modern-day surface-to-air guided missiles like the MIM-104 Patriot travel at about MACH 4, or 3,069 mph. Missiles like the Patriot are also engineered to follow a predictable flight path, making them easier for radars and sensors to recognize and deter. Hypersonic weapons are designed not only with significant speed advantages, but also with high maneuverability, further complicating the operational challenges that manufacturers face when building the systems that are intended to protect from them. But industry efforts are addressing these points through sensor fusion, high-end signal processing, RF solutions, and more. In spite of the hypersonic hype surrounding these weapons and the sensationalistic nature of a deadly munition traveling faster than the speed of light, these missiles are neither invincible nor invisible. Companies are confident that a shift from the research and development phase of developing counterhypersonic solutions to deploying and fielding them is the necessary next step in cementing the U.S. military’s position when faced with hypersonic threats. Whether or not
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that position is first, second, or tied with adversaries, transformation is nonetheless underway. Sensor fusion is critical for detection The benefits of fusing data coming in from multiple sensors can be easily understood once the characteristics of planet Earth are taken into account. When dealing with a weapon that knows no boundaries, like a hypersonic missile, keeping defense strategies tied to their respective domains could put the U.S. at risk. “The world is round. Christopher Columbus demonstrated that about five centuries ago. And radars and RF energy, with the exception of HF [high frequency], intrinsically operate via line of sight,” Conley says. “With that in mind, it would be possible for someone to write a requirement where some type of terrestrial-based radar would not be capable of doing the mission. At that point, you have to go to the space layer to go ahead and do something useful.” Companies like Raytheon are doing just that: Currently in development are space-based sensors for a proposed satellite constellation to aid in tracking hypersonic missiles from outside the atmosphere. Families of sensors that span domains will become key in achieving multimission detection of hypersonic threats. “A space layer expands the battlespace and our options to respond to future threats as technologies advance,” says Erin Kocourek, senior director, Raytheon Missiles & Defense (Tucson, Arizona) Hypersonics campaign lead. “It would augment the existing missile-defense architecture and offers persistent sensing, as opposed to ground-based sensing which is limited by the curvature of the Earth. Ground sensors are challenged to see threats coming over Earth’s horizon and space allows early warning for persistent tracking from launch to impact.” Kocourek goes on to cite that seaand ground-based sensors are used in Raytheon’s counterhypersonic portfolio; www.militaryembedded.com
Figure 1 | A mock-up of the LTAMDS, a radar designed to defeat advanced and next-generation threats including hypersonic weapons. (Raytheon image.)
examples are the SPY-6 to enable distributed maritime operations and the Lower Tier Air and Missile Defense Sensor (LTAMDS) designed to supplement mobile land-based operations – both with 360-degree sensing capability. (Figure 1.) “Having highly accurate, long-range 360 sensing allows the warfighter to see and defend against advanced threats from all directions.” Kocourek says. “Distributed sensing and integration of systems are also being incorporated as part of an advanced networked architecture to defend against new threats and provide resiliency.” Despite any claims made by adversaries, hypersonic weapons are not undetectable, nor are they undefeatable. The very nature of these hypersonic threats has simply begun to redefine the ways in which military technology companies are innovating these sensor systems. “Early warning from ground and space is key – and cross-domain, campaign-level modeling and simulation is especially critical to advance our missile-defense capabilities.” Kocourek says. “Initial deployments will not meet all requirements – systems will be developed with block upgrades in mind to allow for capability improvements as technology matures. This approach puts us on a path to continue to evolve and outpace the threat.” It is evident that immediacy is the driving force behind not only the hypersonic weapons themselves, but also behind the systems that are designed to counter them. The clock is ticking in virtually every area of hypersonic technology. This need for speed is trickling down into the development process where digitization and autonomy are boosting efficacy. Integrating autonomy and digitization into the loop Establishing the idea that hypersonic weapons are a cross-domain threat means that the countering systems will be required to operate in varying environments. Rather than developing radars and sensors specific to each domain, which would necessitate significant amounts of time and money that aren’t readily available, companies are looking toward integrating intelligence. “Intelligent sensors are needed,” Kocourek says, “ones that evolve with the threat. Raytheon Technologies is creating ‘software-defined apertures,’ a new generation of
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Radar for missile/hypersonic defense
sensors with improved performance that are able to understand their environments, adapt to the mission, and deploy multiple capabilities. A software-defined aperture is like a phone with a thousand apps. From scanning the skies to communicating back to base, radars responding to hypersonics must be able to do much more than just detect and track a single type of threat.” Digitization is another approach being taken when developing counterhypersonic technologies. Companies have decided that digital design coupled with a modular and open systems approach will be a quicker and more affordable way to develop and deploy. “We also have renewed our focus on leaping forward into the future through digital design because it’s the most critical large-scale action we can take to outpace our adversaries,” Kocourek says. “Digital design will take years off the development process, allowing us to deliver solutions that outpace threats sooner.” Intelligent sensors are also being designed with the end user in mind, as a supplemental capability to further bolster momentum and efficiency. Essentially, hypersonic weapons are a threat so powerful and encompassing that human-machine teaming could prove to be more beneficial than ever. “There will always be a place for the human operator, but in the world of hypersonics, where seconds mean miles, we see a near future where human operators collaborate closely with autonomous platforms on hypersonic missions.” Kocourek says. Signal-processing requirements for hypersonic detection It’s a fact: Humans need time to make a decision, especially a decision as critical as determining how to combat an incoming hypersonic threat. The only way to buy time when faced with a weapon traveling at speeds of MACH 5 and beyond is to ensure that the systems in place to detect such weapons can do so at a significant range. This reality requires immense processing power – so much so that traditional radars struggle to maintain such high power transmission. “Detecting and tracking hypersonic missiles will require the integration and processing of data from multiple sensors. That will include data from multiple radar frequencies and IR [infrared] sensors,” says Ray Alderman, executive director of the VITA standards organization. “That can be done by tightly coupling high-speed D/A [digital-to-analog boards that control the frequency-hopping radar transmitters and antennas], high-speed A/D [analog-to-digital] boards that collect the radar returns and IR [infrared] radiation, and high-speed processors like GPUs [general-processing units] that process all that data on a high-speed VPX backplane.” Hypersonic weapons are pushing the envelope for signal processing requirements in a multitude of areas. Added to the need for longer detection ranges that will directly result in a need for greater processing power is also the fact that the amount of data coming in will grow and make it paramount to cut down on or buy the time required to process it all and turn it into actionable intelligence. “There are ever-evolving advancements in speed of munitions and times from launch to planned target impact,” says Rob Cox, director of hypersonic initiatives at Abaco Systems (Huntsville, Alabama). “So the capability needs of military platforms and their respective ability to conduct wide sweeps of airspace via complex sensor arrays, rapidly process that data, feed it back to a response system to assess and position the intercept point of that threat, and then facilitate the operational decision loop is greater than ever before.” (Figure 2.) Today, most radars in production are active electronically scanned arrays (AESAs). These types of radars require manufacturers to put much of the signal-processing
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MILITARY EMBEDDED SYSTEMS
Figure 2 | Abaco Systems photo shows the test firing of a hypersonic munition.
components directly into the array face as opposed to a more controlled embedded environment, making the systems more prone to thermal and environmental challenges. Counterhypersonic systems will demand specific size, weight, and power (SWaP) features different than those used in widely used radars, but defense electronics companies remain confident in future development. “We don’t have to make those macrolevel design trades, but what we do have to worry about is, if you have an electronics module in the phased-array aperture, how do you keep that cool to keep it working?” says Bill Conley, senior vice president and CTO of Mercury Systems (Andover, Massachusetts). “While there’s the overall system-level cooling, there’s also the very specific electronicslevel cooling.” The fact that one exists to ensure the failure of the other notwithstanding, both hypersonic weapons and the systems that deter them have an underlying similarity: too much heat. When trying to design a system that requires as much power as that of a counterhypersonic radar, mitigating these thermal challenges becomes a balancing act. Managing the heat “We’re analyzing how hot something will get and dedicating time to thinking www.militaryembedded.com
about how we can route that heat and get it off of the board and into a conduction or some other sort of cooling mechanism to get the heat away from where it’s being generated,” Conley says. “With that in mind, the power requirements to get in are actually becoming challenging as well to try and make sure that we can actually get the right amount of power into a system. There’s a balance of that cooling and power distribution.” Industry officials say that it all comes down to scale: When electronics are embedded in the array face of the radar, a much larger density of heat is created. Taking this science in conjunction with the majority of military customers asking for the most cutting-edge processor available whether or not the size is germane for that array face means that things are going to heat up. “High-performance embedded computing systems generate significant heat – the enemy of reliable performance,” Cox
says. “What’s needed is a dual-pronged approach: design for minimal heat and innovative cooling architectures. Board layout is critical, as is extensive thermal modeling. The key to success is to use powerful components, especially processors, originally destined for mobile applications in which minimal heat dissipation is a prerequisite, such as laptops.” GaN advantages Even though the microelectronics in these counter-hypersonic systems are being driven down into smaller packages, thermal density continues to rise alongside processing power. To combat these seemingly opposite goals, gallium nitride (GaN) has proven to be a revolutionary technology for thermal management in highpower systems. “With GaN, you’re able to get more power,” Conley says. “GaN has a larger band gap, and with a larger band gap you can put higher voltages across it, and therefore get more power out of it compared to CMOSS. GaN is a more efficient amplification of a signal, and by being more efficient it allows you to take all of that power that you’re generating and get it out the aperture of the radar in RF [radio frequency] energy as opposed to having to just turn it into heat and then deal with it as a cooling problem.” Innovations like the use of GaN in these radar systems are pivotal, because even as the systems are engineered with near-futuristic power, a single ground-based sensor isn’t enough to protect against hypersonic weapons. The fusion of data coming in from multiple sensors strategically placed on land, at sea, and in space is thought to be what’s needed to keep the U.S. military one step ahead of hypersonic threats. MES
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January/February 2021
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SPECIAL REPORT
Redefining sensoredge processing By Tom Smelker Today’s sensor-based systems often fail to perform at their full potential due to loss of fidelity in data processing or discarding data due to analog bandwidth limitations from the performance trade-offs required to meet size, weight, and power (SWaP) constraints. In addition, the most effective radar and electronic warfare (EW) response techniques demand extremely low latency as the signal transitions from analog RF to digital and back to RF. Heterogeneous 2.5D system-in-package (SiP) technology, a new trend in microelectronics that includes multiple die inside the same package, is proving to be an excellent match for sensor-edge processing requirements, as it integrates high-performance chiplets to support direct digitization of wideband RF signals.
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Access to real-time information to make rapid decisions has become increasingly critical in our modern world. From checking commute times or hailing a rideshare to ensuring weather will not disrupt our plans and more, we rely heavily on mobile applications to tell us everything. Similarly, defense applications require processing vast amounts of sensor data in near-real-time to detect and mitigate threats while being implemented in hardware both small and rugged enough to function in a fighter jet or on a satellite. Artificial intelligence (AI) for edge applications continues to drive global innovation, enhancing the requirement for powerful processing technologies to make quick decisions in high-risk scenarios. Traditionally, this processing is only available in a remote data center. However, unlike the commercial sector, defense applications do not always have the convenience of sending the data to a data center in the cloud for processing due to limited connections and security threats. Therefore, these systems must perform processing near the sensor, directly at the tactical edge. To implement edge-processing solutions, embedded system designers traditionally have made tough compromises in the trade-off between processing power and physical size. One common approach to address these challenges is a board-level solution, which integrates a variety of packaged semiconductor devices while dedicating significant space to device interconnections. Over time, these boards have become larger as more functionality has been required. Additionally, as the distance between devices increases, these sensor-based systems are losing performance, speed, and fidelity in data processing due to analog bandwidth limitations.
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Figure 1 | Low-latency edge processing deceiving the targeting radar from enemy attack. Image courtesy Mercury Systems.
the EA system must be capable of performing advanced AI-level processing directly adjacent to the sensor aperture. Hypersonic weapons, moving at speeds of Mach 5 or greater, are the next wave of threats. To counter them, defense systems require powerful levels of lowlatency AI processing on a wide range of platforms. In our current environment, the bandwidth from these sensors would overwhelm the RF front ends and system-level interconnects, forcing substantial data reduction and impossible transmission times before processing.
Another common solution is a custom-designed application-specific integrated circuit (ASIC). While this approach yields maximum size, weight, and power (SWaP) optimization, it lacks the analog bandwidth required in today’s rapidly evolving defense environments and is extremely expensive. Plus, since an ASIC cannot be modified after its initial design, each variant has a five- to seven-year development cycle, making it an ineffective solution. Sensor edge processing challenges Delivering powerful AI-grade processing for suitable operation in defense applications at the tactical edge requires a new approach. The most effective radar and electronic warfare (EW) response techniques demand extremely low latency as the signal transitions from analog RF to digital and back to RF. Implementing this requires that transceivers, directly connected to an antenna, capture broadband data in analog form and move it to analog-to-digital converters (ADCs), where it is transformed into a digital bitstream. From there, it is processed by either a field-programmable gate array (FPGA) or a general-purpose processor before being moved back through digital-to-analog converters (DACs), to the transceiver, and then the antenna. As the complexity of these signals increases, the demand on the RF and digital processing systems increases as well. Radar spoofing is one critical example of this technology, where embedded components as part of an electronic attack (EA) system detect, alter, and then replay radar pulses to create false targets. To successfully deceive the latest radar systems, the latency must be so low that the adversary’s radar system cannot perceive a time lag in the replayed pulse (Figure 1). Additionally, in order to support cognitive capabilities, www.militaryembedded.com
Given all the drawbacks to current solutions, it is not surprising that system designers are looking for a better approach to meet the demands of sensor-edge computing. They need high-performance, SWaP-optimized, chip-scale implementations and tightly integrated analog and digital functions in a highly customizable and low-cost solution for specific application requirements. A new approach to semiconductor design Heterogeneous 2.5D system-in-package (SiP) technology can be a match for sensor-edge processing requirements. In this technology, high-performance chiplets – semiconductor die and chipscale component building blocks – support direct digitization and low-latency AI processing of wideband RF signals. For example, a SiP could include a set of chiplets for RF capture and transmission, ADC/DAC conversion, digital I/O, and FPGA-based digital signal processing. With each of these chiplets performing a specific function, the SiP can be easily optimized for multiple applications.
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Radar for missile/hypersonic defense
As mission-critical applications at the tactical edge drive the demand for low-latency processing in ever-shrinking form factors, high-performance SiP devices accelerate edge computing deployment. These high-performance signal-processing solutions are small enough to fit in the palm of a hand while also rugged enough to withstand shock, vibration, and temperature extremes present in defense environments. In addition, the commercial semiconductor industry is regularly bringing new chiplets to market, and a SiP fosters the ability to replace chiplets instead of modifying external components, thus shortening development time. Working at chipscale, the new 2.5D capability enables designers the ability to combine multiple complex semiconductor dies into a single component while maintaining trust and security. Implementing 2.5D SiP solutions To develop an application-specific SiP solution, chiplets are mounted onto a custom piece of silicon called the interposer, which includes high-density, through-silicon
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via (TSV) technology for routing signals between the chiplets and out of the package. This design reduces both latency and physical size. Small-size, low-weight, and minimal-power 2.5D SiP designs can replicate the functionality of a 6U OpenVPX board in a form factor smaller than a business card. (Figure 2.) With the interposer, a variety of highfrequency signals are routed between chiplets in a small space, minimizing crosstalk and other threats to signal integrity – but as the electrical behavior of these signal connections over a broad range is difficult to model, SiP manufacturing requires specialized expertise and fabrication equipment. However, because it consists of only interconnects and no logic, an interposer can be laid out and fabricated in up to half the time it would take for a monolithic ASIC. Additionally, the same interposer design can be easily customized to support multiple applications and programs. With faster time to market and lower total cost, 2.5D SiP is preferred for many commercial applications. Mixed-signal designs for radar and EW map well into combinations of chiplets, since they can flexibly incorporate a variety of CPUs, GPUs, and FPGAs to a specific application and then combine them with transceivers and ADC/DAC components that match the targeted RF band. This level of customization enables advancements in custom silicon to be quickly and easily applied, providing added value without added expense or program disruption. A new sensor-edge processing project can design, fabricate, test, and deploy a customized, 2.5D SiP solution in two or three years, compared to the five- or seven-year time frame of a custom ASIC. Such an approach can also include patented chiplets, giving potential users a straightforward way to build differentiating capabilities into a solution offering. Enabling new solutions SiP integration can be used to implement new types of solutions that are not possible with traditional RF and digital processing technology. For example, most existing active electronically scanned www.militaryembedded.com
With faster time to market and lower total cost, 2.5D SiP is preferred for many commercial applications. Mixedsignal designs for radar and EW map well into combinations of chiplets, since they can flexibly incorporate a variety of CPUs, GPUs, and FPGAs to
Tom Smelker is vice president and general manager of custom microelectronic solutions at Mercury Systems Custom Microelectronic Solutions in Phoenix, Arizona. He is responsible for the management of multidisciplined teams developing advanced solutions in semiconductor technologies at the system and subsystem levels for applications in embedded defense computing and systems security technologies. Prior to joining Mercury, Smelker spent nearly 20 years as a Senior Engineering Fellow and systems design program manager at Raytheon Missile Systems. Smelker began his career as an Undergraduate and Graduate Fellow at the U.S. Army Research Laboratory. He has a master’s degree in mechanical engineering (non-linear controls) from New Mexico State University and a bachelor’s degree in mechanical engineering with a minor in mathematics, also from New Mexico State University. Mercury Systems https://www.mrcy.com/
a specific application and then combine them with transceivers and ADC/DAC components that match the targeted RF band. array (AESA) radar systems are optimized for specific applications, such as surveillance radar or electronic warfare. This results in a single platform, such as a naval vessel, requiring multiple radar arrays. By using broadband 2.5D SiP technology, digitization and signal-processing functions can be integrated into a single AESA that can perform multiple functions, such as identifying and using a portion of an array to mitigate a missile threat, while also targeting a weapon on a different part of the array – all while continuing to scan for new threats. (Figure 3.) Since these different applications operate over different frequency ranges, achieving this flexibility requires broadband RF and powerful digital processing at each antenna array element, which can be supported by 2.5D SiP integration. As part of the leadership in the SOSA [Sensor Open Systems Architecture] community, Mercury’s 2.5D SiP enables SOSA-aligned solutions at the module level. At the chip level Mercury is leveraging open systems architecture for faster adoption of advanced chiplets for defense applications. MES www.militaryembedded.com
Figure 2 | Demonstration of space-saving capability of SiP technology.
Figure 3 | Example of SWaP-constrained airborne AESA radar system. U.S. Air Force photo.
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January/February 2021
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Versatility is key as OpenVPX enclosure requirements continue to evolve By Justin Moll
Despite the fact that OpenVPX is an open standard architecture, there is a significant amount of variation of system platforms. The application needs for OpenVPX systems continue to evolve rapidly. New challenges brought by the SOSA [Sensor Open Systems Architecture] Consortium’s efforts; new complementary VITA [VMEbus International Trade Association] standards; size, weight, and power (SWaP) concerns; the expanding number of backplane profiles; and SpaceVPX implementations are requiring a versatile approach by the backplane/enclosure developers.
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Leveraging SOSA for radar applications
Being an OpenVPX backplane developer can be maddening: Even with established VITA 65 profiles, there are so many variations that it can be very challenging to develop a standard backplane. Once upon a time, backplane design was largely a factor of the architecture and its form factor (3U or 6U) and the number of slots. With OpenVPX, in contrast, there are dozens of VITA 65 routing profiles that all have their own signal definitions. In recent years, the ability to add optical (VITA 66.x) and RF (VITA 67.x) housings on the backplanes creates a wide variety of new configurations to the list of profiles. There are various subsets of the VITA 66 (.1, .2, .3, .4, .5) and VITA 67 housings (.1, .2, .3a, .3b, .3c, .3d) as of this writing, most of which require differences in the backplane design. Complicating all of this is that fact of the possibility of different slot pitches. The 1.0-inch is typical for a backplane, but 0.8 inch is not unheard of, and wider than 1.0-inch pitch is no longer a rarity. The SOSA [Sensor Open Systems Architecture] Consortium’s efforts have brought timing/clocking protocols to the backplane, which adds another factor of differentiation to designs. Of course, the backplane speed requirement can change the stack-up of your routing, back-drilling, and PCB [printed circuit board] materials that you use. Therefore, the speed of the backplane is yet another factor that can prevent standardization. With speeds hitting PCIe Gen4 (~16 Gb/sec) and 100 GbE (4 lanes of ~25 Gb/sec), the performance challenges are increasing. Housings or cutouts for the VITA 66/67 contacts limits space for routing, particularly when the design is a 3U and a larger slot count. So, you can imagine the number of options for an OpenVPX backplane design. There are slots (approximately 10 common slot sizes), profile options (average of about three for each common slot size), 3U or 6U, VITA 66/67 options (about five common versions between them), speeds (three common speed tiers), how many slots have VITA 66/67 cutouts/housings (15 common configurations), and
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version with four VPX slots, two VITA 67.3 slots, and dual VITA 62 PSU slots offers further versatility. Figure 1 shows a variation of these VITA 66/67 configurations.
SOSA-based systems typically use high-power boards along with VITA 66 for optical and/or VITA 67 for RF contacts. It is common for multiple slots to be more than 100 watts each. Chassis mechanicals – even more options There exist so many possible iterations of OpenVPX backplane options, plus the many chassis options don’t make things any easier. However, there are more ways to enable modularity in the enclosure. First, the application will help dictate the type of enclosure. One example: Is a commercial rackmount or desktop required or is it a deployed unit? Some OpenVPX applications are used in a benign environment, often in a data center or ground communications hub. The advantage of the 19-inch rackmount is that it’s ideal for prototyping/development and can often be used in the applications that do not require military-level ruggedization. A designer can also start with a commercial-grade version for development and go to a rugged rackmount in deployment. As seen with the backplanes, there are a lot of options: various slot pitches (0.8, 1.0, 1.2 inch, etc.), 3U versus 6U boards, various cooling methods, and more.
more. This would require 10/3/2/5/3/15 backplane designs just to get some common designs laid out, not even accounting for any custom routing, specialty I/O requirements, VITA 62 PSU [power supply unit] slots, specialty slot pitches, etc. With the increased use of VITA 66/67 housings, there are a few configurations that can help make the options more manageable. This first is an 8-slot 3U OpenVPX backplane with 4x VPX power and ground-only slots and 4x VITA 67.3/VITA 66.5 cutouts. (Thankfully, the VITA 66.5 folks devised a way to use the same VITA 67.3 cutouts on the backplane.) With SOSA clocking, the backplane provides versatility for development systems. Single-slot power and ground backplanes with either VITA 66 or VITA 67 also provide flexibility in design; these can be added to a standard backplane profile configuration to expand the options. In some development systems, it is desirable to have VITA 62 slots. These can be offered in standalone single-slot power interface boards or as part of an overall backplane. For development, a www.militaryembedded.com
SOSA-based systems typically use high-power boards along with VITA 66 for optical and/or VITA 67 for RF contacts. It is common for multiple slots to be more than 100 watts each. High slot counts can create the need for a system that can dissipate a high amount of heat. Larger chassis can implement high-CFM fans that pull the air from below the card cage and blow the heat 90 degrees out the rear of the system. This setup enables rear-transition modules (RTMs) to be plugged in all of the slots in the rear of the enclosure, maximizing density for testing or deployment. The capability to handle the RF/optical cabling and any RTM or VPX cabling interfaces in this type of front-to-rear cooled chassis is important for SOSA systems. The chassis can cool at least 2000 W in the 6U size (for 3U OpenVPX boards), but with a taller enclosure can cool even more. 6U OpenVPX boards can also be placed in a 9U tall chassis, even possibly with a divider plate to split the enclosure into two rows of 3U slots. Alternatively, the designer can employ a hybrid solution with a mix of 3U slots and 6U slots. Rather than using a chassis where the boards are mounted vertically, horizontally plugged-in boards can save rack space. Usually these systems only use between two and eight slots.
Figure 1 | Development backplanes can offer versatile configuration options to address the various OpenVPX, VITA 66 (optical), and VITA 67 (RF) implementations.
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MIL TECH TRENDS
Leveraging SOSA for radar applications
To maximize versatility in any of these designs, it is important to have flexibility in the type of card guides and their position. As noted, the pitch of some slots may be wider than others. Therefore, having the ability to space the slots as needed with specialized card guides is a huge benefit. This situation might include the use of card guides for conduction-cooled boards, which may be used alongside card guides for air-cooled boards. SOSA is also shifting the chassis power to 12 V heavy systems. A modular fixed PSU enables users to select the submodules of 3.3 V, 5 V, 12 V, and AUX voltages that may be required for all types of OpenVPX applications. With the RF/optical options, there is typically the need to provide more I/O and cabling options to the rear of the chassis. Using an enclosure with fans above the card cage allows for plenty of space for the rear I/O cabling or RTMs in the system. Further, SOSA is leveraging the use of VITA 46.11 system management, which means that the chassis is able to monitor the slots, voltages, and fans. Worlds colliding SpaceVPX brings new challenges as it supports the use of both 160 mm and 220 mm deep boards. Further, the pitch of the modules is often wider, at a 1.2 inch board width. To enable more versatility for SpaceVPX, a dual-depth OpenVPX test/development chassis can be utilized. (Figure 2.) To support the various types, the enclosure needs to support both the 160 mm and 220 mm depth boards, a 1.0 and 1.2 inch pitch, etc. Special card guides for the 1.2 inch pitch needed to be created in both the depths for conduction-cooled boards. One of the benefits in working with the special form factor requirements for SpaceVPX is the smoother transition to supporting extra-deep modules and/or wider boards. Engineers at several of the RF-centric defense contractors are packing more punch into each module. As a result, in some applications the boards are getting longer or wider. These hybrid OpenVPX systems require enclosure card cages that can support these sizes and properly cool them. Figure 3 shows a military-spec rugged 19-inch rackmount chassis platform for customized OpenVPX supporting wider and deeper boards. To support the heavier cards, an extra-rugged milled card-guide tray and other elements ensure that the unit can meet the shock and vibration requirements of the application. Although this design had nothing to do with SpaceVPX, having that experience and the specialty components helped leverage a solution for another OpenVPX application. Other space-saving options It is certainly possible to use a horizontal-mount enclosure to save rack space and weight. Typically, these enclosures would be for smaller systems, namely six or fewer slots or less for 6U boards and eight or fewer slots for 3U boards. With the boards mounted side by side, a 6U board will fit next to a 3U board in the same slot row. Therefore, it is easy to mix and match both 6U and 3U boards. The 3U option also includes the possibility of using pluggable VITA 62 PSUs. Alternatively, there are modular fixed PSUs that can go above the card cage. For example, a 3U tall horizontal-mount enclosure can support five OpenVPX boards in the 6U height and four 3U OpenVPX boards along with a pluggable VITA 62 PSU (all at one-inch pitch). It is possible to have various levels of ruggedization for these types of enclosures. ATRs and cooling options SOSA and VITA 66/67 implementations in ATR format require adequate spacing beneath or behind the backplane for the cabling bend radii. Therefore, many of the legacy ATRs in the market cannot support those requirements without some redesign. One solution that gets around that issue is a front- or rear-loaded ATR. With the cards sliding in horizontally into the rear of the enclosure, there is space
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Figure 2 | SpaceVPX uses both 160 mm and 220 mm depth OpenVPX boards as well as wider spacing options. A dual-depth chassis provides the ability to test the various card sizes/pitches in the same enclosure.
Figure 3 | Designers can leverage the OpenVPX standard for specialty designs. This military-spec rugged enclosure shows an example with extra-deep 6U boards and a wider pitch.
behind the backplane to cable around to the front of the chassis or to the back panel. Figure 4 is an example version with three OpenVPX slots and one VITA 62 PSU slot. For a top-loaded ATR, there can be a standoff for the VITA 66/67 contacts to allow for the cabling to go through. As SOSA-based systems tend to have very high power, there are now cooling conventions to achieve the heat dissipation needed for 125 watt to 185 watt OpenVPX boards in the wedgelock format. Cooling a 185 watt board is achievable with air in the air-cooled board format (without wedge-lock casings). Enough airflow can be directed to have the airflow pass directly over the www.militaryembedded.com
Justin Moll is vice president, sales and marketing, at Pixus Technologies. He has been a sales and marketing management consultant and senior-level manager for embedded computing companies for more than 20 years. Justin has led various committees in the open standards community and is a regular guest speaker at several industry events. He holds a degree in business administration from University of California, Riverside. Readers may reach the author at justin.moll@pixustechnologies.com. Pixus Technologies https://pixustechnologies.com
Figure 4 | A front-or rear loaded 1/2 ATR for 3U OpenVPX can easily allow both standard OpenVPX modules or versions with VITA 66/67 interfaces in a compact design.
chip sets. When the card is encased in a conduction-cooled format with wedgelocks, the air can pass over the board, but much of the airflow is blocked by the structure of the card. The size and shape of a typical conduction-cooled board acts as a giant airflow blocker. With optimized spacing between the modules and using airflow baffle to optimize the air paths, simulation has shown that these boards can be cooled in a commercial forced-air enclosure. For a system requiring military-specified fans, this aspect becomes extremely difficult. The VITA 48.7 standard has the potential to resolve this issue for many of the high-wattage boards in the market, as the specification provides channels on the conduction-cooled modules for the air to flow directly over and through the heat sink fins. This approach will certainly help improve the cooling for those modules For the hottest level of boards, a liquid-cooled enclosure would be required. A versatile world Designers of military and aerospace solutions can look to OpenVPX for a rich and diverse ecosystem for leading-edge C5ISR [command, control, communications, computers, combat systems, intelligence, surveillance, and reconnaissance] applications. As the requirements get more complex, providing versatile designs that can be used in a wide range of applications is a key to success. MES www.militaryembedded.com
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Leveraging SOSA for radar applications
caption
Title By John McHale, Editorial Director
Sensor Open Systems abstract Architecture (SOSA): Enabling the next generation of flexible and adaptable radar systems By Denis Smetana In order to keep up with the continued The acceleration of new technology and to be able to protect the warfighter from the latest threats, it is essential that we can turn our deployed platforms into adaptable entities that can evolve over time and are not static. The SOSA [Sensor Open Systems Architecture] Technical Standard is the next major step in realizing this goal.
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The global military radar market is approximately a $10 billion per year business and spans a wide range of airborne, ground, and naval platforms. Radar platforms consist of surveillance, air defense, fire control, search and rescue, and other types of radar systems. These systems can range from very large active electronically scanned array (AESA) radars, which contain thousands of sensors, to very small radars with only a couple of sensors that can fit on small drones. While the most visible part of a radar system is the large sensor array or antennae, behind each of these sensor arrays is a set of processing hardware that receives the sensor data, filters the data to identify the meaningful portions, generates metadata to characterize the received data, and then interprets that data to make useful decisions. This processing chain requires multiple interactions between different hardware entities as well as software functions. One of the key challenges faced by radar system designers is the expense and effort required to keep the technology up to date with the latest innovations as they become available in the market. Additionally, there exists the desire to be able to introduce new algorithms quickly (i.e., quick-reaction capability [QRC]) and to be able to port specific mission capabilities easily between multiple systems. There also is a strong push to move from single-function systems to multiINT [multiple intelligence] or multimission systems, which can be repurposed for different functions based on alternate firmware or software loads. Furthermore, if the processing module slots within a system are compatible with a range of different processing modules, the benefits of repurposing can cover an even
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CMOSS defined the following layers: › Hardware Layer – OpenVPX with specific plug-in-card profiles › Software Layer – Future Airborne Capability Environment (FACE), which was developed by NAVAIR PMA-209 for avionics applications; REDHAWK for a software-defined radio (SDR) framework; and Software Communications Architecture (SCA) for communications applications › Network Layer – Vehicular Integration for C4ISR/EW Interoperability (VICTORY) › RF – Modular Open RF Architecture (MORA) In 2014, the Naval Air Systems Command (NAVAIR) initiated the Hardware Open Systems Technologies (HOST) initiative; HOST had similar objectives as CMOSS but was targeted at avionics processing and focused heavily on system-management architecture. The Air Force also had its Open Mission Systems (OMS) initiative, launched started in 2015, which leveraged FACE and focused on standardizing messages and middleware for airborne platforms. However, as all these initiatives had similar objectives, the U.S. Department of Defense (DoD) pushed for a single initiative across all the military branches: With that, the Sensor Open System Architecture (SOSA) Consortium was born. The SOSA Consortium has adopted many of the CMOSS standard initiatives, but is focused on the overall architectures for sensor processing. Today there is much overlap between the CMOSS, HOST, and SOSA initiatives – with most of the new work being done within the SOSA Consortium, which is currently working toward its first official version of its standard. To help ensure that the resulting SOSA Technical Standard focuses on the challenges listed previously, the SOSA Consortium has defined 10 quality attributes that are used to guide the work being undertaken. These quality attributes are:
wider range of applications. Over the past few decades, the use of standard interfaces and the adoption of commercial off-the-shelf (COTS) hardware for reusable functions have helped to address some of these challenges. But more can be done. Standards push In 2013, the U.S. Army’s CERDEC group kicked off an initiative called C5ISR [Command, Control, Computers, Communications, Cyber, Intelligence, Surveillance, and Reconnaissance]/EW Modular Open Suite of Standards (CMOSS) that focused on tackling many of the radar system integration problems head-on by defining a suite of standards leveraging other industry open standards initiatives. CMOSS tried to address the integration challenge holistically not only by targeting hardware modules, but also by looking at software, networking, and front-end RF modules. www.militaryembedded.com
› › › › › › › › › ›
Interoperability Securability Modularity Compatibility Portability Plug-and-Playability Upgradeability Scalability – Sensor multiplicity Scalability – Platform size Resiliency
One of the significant challenges that the SOSA Consortium, as well as other similar initiatives, have had to face is that of balancing these frequently competing objectives. For instance, while fully defined backplane interfaces enable high levels of portability, overconstraining interconnects can lead to lack of flexibility and potentially add extra cost. Striking the right balance will prove key to the ultimate success of the SOSA Consortium. While radar processing is one of the target applications for SOSA, it is also focused on communications, electronic warfare (EW), electro-optical/infra-red (EO/IR) and signal intelligence (SIGINT) applications, as well multi-INT sensor systems which combine two or more of these sensor types. In order to facilitate modularity and portability, the SOSA Technical Standard defines modules more generically than just hardware entities. While a hardware card may be a “module,” it can also apply to a software function, or a combination of cards and software. The key is that the module has well-defined boundaries, is severable, and has well-defined functionality. The use of modules is essential to enabling systems to be more easily upgradeable either for new technology or alternate functions. In order to accommodate the multiple use-cases, a generic, high-level SOSA sensor system is defined as shown in Figure 1.
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MIL TECH TRENDS While not every system will use all of these services, these services will be the main building blocks and are further detailed within the SOSA specification. Zoom in Taking a closer look at the layers, multiple standards are being used and refined as part of the definition of the Sensor Open Systems Architecture. At the hardware module level, CMOSS and SOSA both adopted OpenVPX but defined a subset of plug-in card profiles to limit the number of unique configurations. This was done by defining all user-I/O pins, rather than leaving them “user-defined” as in standard VPX. Furthermore, the profiles prioritize backplane coax and fiber capability in lieu of other I/O. Utilizing backplane rather than front-panel I/O for optical and RF is key to easing card replacement, avoiding complex cable management, and promoting higher levels of reliability and density. Another key item is the use of Ethernet as the only fabric protocol for both 3U- and 6U-based systems. For 3U VPX systems this is a bit of a change, as PCIe was the more dominant fabric previously. PCIe is still used on the expansion plane to facilitate high-bandwidth connections between processor and FPGA [field-programmable gate array] or GPGPU
Figure 1 | Illustration of a high-level SOSA sensor system.
Leveraging SOSA for radar applications [general-purpose graphics processing unit] plug-in cards. While these capabilities are driving changes across the COTS ecosystem, they will provide a much better-defined path for future upgrades. At the hardware module level, there are four primary plug-in card profile types: › I/O-Intensive Profile – for singleboard computers with external I/O support. For a sensor system, these modules support XMC (VITA 42) mezzanine expansion cards and are intended for command-and-control functionality as well as being the only modules that handle external I/O. › Payload Profile – This is the primary workhorse profile and contains the modules that handle the sensor interfaces and the bulk of the sensor processing. This profile can support FPGA modules with RF or optical interfaces, but can also support compute-intensive processor modules or GPGPU modules. › Switch Profile – This is the profile for the network switches within the system and is key for scaling to larger systems. › Timing Card Profile – Timing distribution is a key function within a sensor system and this profile standardizes the I/O of the timing module. At the software layer, work is ongoing to standardize the run-time environment, but several options will likely be supported. The goal is to leverage the FACE Technical Standard, OMS, MORA, and REDHAWK, as well as the Common Open Architecture Radar Program Specification (COARPS), which is targeted for multiple large radar systems. The diagram in Figure 2 shows how a subset of the FACE architecture is expected to be utilized.
Figure 2 | Illustration of how a subset of the FACE architecture is used.
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Software portability and modularization will be key as this is where new radar modes, new waveforms, new countermeasures, or other similar functions can be upgraded or replaced. For true Multi-INT functionality, alignment will be needed at the module boundaries. www.militaryembedded.com
The goal is to leverage the FACE Technical Standard, OMS, MORA, and REDHAWK, as well as the Common Open Architecture Radar Program Specification (COARPS), which is
Figure 3 | An example of a sensor-processing system from Curtiss-Wright using a family of SOSA-aligned modules.
targeted for multiple large radar systems. Putting all this together, the SOSA initiative is striving hard to enable a welldefined architecture of building blocks that will facilitate modularized radar, SIGINT, EW, EO/IR, and comms systems, leveraging an ecosystem of modules provided by the COTS marketplace. If successful, the industry’s ability to keep sensor-processing systems current and easily upgradeable will be markedly improved. An example of such a system is shown in Figure 3. From a COTS perspective, SOSA will enable easier substitution of competitors’ products, but there will still be the opportunity to differentiate in the areas of ruggedization, longevity of supply, enhanced security, and other capabilities that go beyond what is defined by the architecture. MES Denis Smetana is a senior product manager for FPGA and DSP products for Curtiss-Wright Defense Solutions, based out of Ashburn, Virginia. He has more than 30 years of experience with ASIC and FPGA product development and management in both the telecom and defense industry and over 15 years of experience with COTS ISR products. He has a BSEE in electrical engineering from Virginia Tech. Curtiss-Wright Defense Solutions https://www.curtisswrightds.com/ www.militaryembedded.com
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INDUSTRY SPOTLIGHT
Emerging threats drive RF and microwave component design trends for electronic warfare By Sally Cole, Senior Editor To address emerging electronic warfare (EW) threats, which are becoming increasingly more agile and moving up the spectrum, radio frequency (RF) and microwave component designs are also evolving. Adversarial electronic warfare (EW) threats have become quite complex and the U.S. Department of Defense (DoD) has made countering them a funding priority. These countermeasure and detection systems are depending heavily on radio frequency (RF) and microwave technology that also must meet stringent size, weight, and power (SWaP) requirements. “The U.S. and allied nations’ defense market will be trending up considerably for RF/microwave electronic warfare components, subsystems, and
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caption
full products,” says Sean D’Arcy, director of Aerospace and Defense for Analog Devices. “Mature and emerging adversaries have become extremely sophisticated during the past 20 years and present novel threats that need to be rapidly addressed with point solutions.” As D’Arcy points out, EW is no longer spectral domination purely on the battlefield or even at the theatre level – EW has expanded to worldwide anti-terrorism efforts and even into space. “This requires greater resources to address and mitigate while maintaining U.S. and allied spectral superiority and operations,” he says. The EW market for RF components has remained fairly steady since the COVID-19 pandemic began. “Last year, there was a dip based on market trends across the board but we’ve seen interest and opportunities turn back on,” says Gavin Smith, marketing manager of the Radio Power Business Line for NXP (Chandler, Arizona). “Like the rest of the market, end customers and design houses paused a bit during the first few months of the pandemic and have now continued designing and working on next-gen solutions. We’re seeing increased interest in L-band as well as wideband communications.” Design trends Threats are becoming more agile and moving higher within the spectrum, according to D’Arcy, thereby putting pressure on designers crafting RF and microwave solutions for EW systems. “Frequency-hopping is now more complex, and adversaries are moving as high as 130+ GHz for use in military terrestrial and on-orbit systems,”
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D’Arcy explains. “Furthermore, there is a need to incorporate more sophisticated digital methods into electronic attack or defense systems, which will require greater speed and efficiency when moving the signal of interest from analog to digital and back.” Analog Devices’ customers are driving design shifts within three major areas. “The first is the continued drive toward creating high-performance RF and microwave products that have wider bandwidth and support much higher regions of the spectrum with increased efficiency,” D’Arcy says. “This requires advances in gallium nitride (GaN) amplifiers, up- and down-converters, filters, drivers, and exciters.” (Figure 1.) The second area experiencing a shift is a need for higher-speed converters with more bits. “For both high-speed analogto-digital (ADC) and digital-to-analog (DAC) converters (digitizers), the push is to enable direct sampling by exceeding 20 Gsamples/sec and above with an increasing number of output and input bits,” D’Arcy says. “Of equal importance, due to the ability to defeat systems with measurable processing delay, is the requirement to reduce latency at the converter and the FPGA [field-programmable gate array] that is induced prior to data reaching the digital backbone. Bent pipe or digitally controlled analog still have significant use due to their minimal latency.” To drive this reduction in latency and manage the scale of the greater data, “more processing fabric is being incorporated into the digitizers,” he adds. “This allows for extensive digital decimation and loopback control to be done closer to the antenna for the ADC signal chain. Conversely, fabric to enable digital data expansion and beamforming are being incorporated into the DAC for its related signal chain.” Another design trend emerging is increasing demand from the DoD for trusted RF and microwave solutions, coming as adversaries develop new electronic capabilities. “It’s no longer acceptable to develop a single system that can be www.militaryembedded.com
Figure 1 | The Analog Devices ADAR1000 Evaluation Board is based on the ADAR1000 4-channel beamformer core chip. Image courtesy of Analog Devices.
fielded for 10 years without regular modernization,” says Ken Hermanny, senior director and general manager of Mercury’s West Caldwell, New Jersey, facility. “We leverage open standards from chip scale to system scale to incorporate the most advanced technologies and make them accessible to our aerospace and defense customers.” Yet another trend is dual-purpose solutions. “In the past, we offered banded-solution approaches leveraging our cellular infrastructure devices,” Smith states. “As a key component supplier within the cellular infrastructure market, many of the same devices used for communications also had a dual purpose for electronic warfare. Similarly, in both spaces we’ve seen more demand for integration within the package, saving space and complexity of overall system designs. Along with further integration, many customers want more power and wider operating bandwidth to cover multiple bands with a single device.” As new electronics threats extend into higher frequency bands and increase in complexity, end users are requesting microwave EW hardware that operates over a wide range of frequencies while also being small enough to support multiple channels within a single compact system. “To rapidly deploy these advanced capabilities, our customers are increasingly requesting products compliant to open architecture standards, such as OpenVPX and SOSA,” Hermanny says. Open architecture initiatives like SOSA – Sensor Open Systems Architecture – “are helpful in driving alignment and it’s one of the considerations along with programs like DARPA CHiPs,” D’Arcy says. (The Defense Advanced Research Projects Agency [DARPA] launched the Common Heterogeneous Integration and IP Reuse Strategies [CHiPS] in 2017 to help lower the design costs associated with advanced systems-on-chip.) “At present, the challenge is to move the end users and primes toward the standard.” Ongoing initiatives and trends like SOSA are helping the “push for more commercial off-the-shelf devices that aren’t subject to certain restrictions,” Smith notes. “As the industry turns toward standards like SOSA, there is a need to develop SOSAaligned RF and microwave hardware,” Hermanny notes. “The adoption of these standards has the opportunity to revolutionize the way electronic warfare systems are designed and maintained. By leveraging standard modules, design time and sustainment costs are reduced. [Mercury offers] a family of SOSA-aligned microwave transceivers and converters, such as the RFM3111, a SOSA-aligned 6- to 8-GHz transceiver.” (Figure 2.)
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RF and microwave in electronic warfare systems
EW system requirements versus radar Although the holy grail was originally a single flat-plate array to be used for military communications, EW, and radar, according to D’Arcy, the unique concept of operations and different time-to-market requirements have made a single system a difficult proposition with the present generation. “If you look at the historical and present generations of radar versus electronic warfare, the designs are significantly different,” D’Arcy says. “Electronic warfare is split into surveillance, defense, and attack, while radar is in essence an active sensor. A good way to look at it is that electronic warfare systems defend against or attack radar.” Legacy systems are very different because of their significant analog content. “But newer systems start to blur the difference at the signal-chain level, as designers move more toward active electronically scanned array and on to full direct sample and
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digital-beamforming systems,” D’Arcy continues. “These systems will have commonality from the antenna through to the digital backplane. Both the ADC and DAC paths will be similar at the individual channel level. The difference within back-end processing and the digital side is where divergence will occur.” One key similarity between EW and radar requirements is the demand for increased capability within a single transistor. “For radar, the power levels continue to be much higher than requirements for electronic warfare or communications,” Smith notes. “In many cases, the key metric for radar is efficiency – always trying to push the boundaries and achieve as high efficiency as possible. Efficiency also matters within EW, but it’s based on the market bandwidth and integration.
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Figure 2 | The Mercury Systems RFM3111, a SOSA-aligned transceiver. Image courtesy of Mercury Systems.
While both radar and EW require highperformance solutions in compact SWaPoptimized packaging, Hermanny points out that EW has its own unique challenges: “Unlike radar, where both transmit and receive sides of the system are defined, an electronic warfare system must operate on previously unknown signals,” he explains. For example, an EW system might need to receive an adversary’s radar signal, process it, and retransmit that signal. “Since the electronic warfare system designer can’t predict the frequency of that radar signal, they need to design the electronic warfare system to operate over a very wide range of frequencies,” Hermanny says. “This unknown element requires electronic warfare systems to be dynamically configurable and operate over a very wide frequency range.” www.militaryembedded.com
A50_MilEmbSys_2_12x10.qxp_A45.qxd 12/10/20
DC-DC Converters Transformers & Inductors Figure 3 | NXP’s Albert Ruiz reflected in a wafer at the new RF GaN fab. Image courtesy of NXP.
SWaP requirements Size reductions are “primarily driven by the shrinking geometries of antennas and the need to shorten the signal path,” D’Arcy says. “While weight gain is a concern, the greatest challenge to the industry is power consumption and efficiency. And this is directly related to thermal challenges. The way to resolve these challenges is twofold: The continued march toward greater efficiency in GaN-based RF and microwave products is a key contributor to efficiency improvements for power and, to a certain extent, size. The other is incorporating more processing fabric into the digitizers to draw down component count and high-power draw processing where applicable.” NXP recently opened a RF GaN fab in Chandler, Arizona, dedicated to making RF power amplifiers. “Along with our LDMOS [laterally-diffused metal-oxide semiconductor] offerings, we can also leverage the performance benefits associated with our own internal GaN fab such as wider operating bandwidth, higher-frequency range capabilities, improved efficiency, and more,” Smith says. (Figure 3.) SWaP is a key aspect of NXP’s engagements within defense and aerospace, and because of its importance the company continues to add more integration into parts. “We accomplish this via improvements within our discrete-devices offerings, packing more power into packages while also prioritizing thermal performance,” he continues. “By stretching the capabilities within our discrete offerings, customers are able to use one device as opposed to a banded approach. We’re also continuing to make improvements in our integrated circuit (IC) offerings for both radar and electronic warfare. These multistage devices enable customers to shrink the elements around the board because of the in-package integration.” Another way NXP is making SWaP improvements is through multichip modules. “These devices are similar to the ICs because they’re multistage but also have matching elements that are multistage with 50 ohm in and out,” Smith says. The added integration enables reduced space and weight while achieving necessary performance,” he adds. “In terms of RF and microwave, one of the challenges of SWaP optimization is managing the complex electromagnetic interactions that result from high-density circuit design,” Hermanny says. “To address these challenges, we developed expertise in complex circuit modeling using both nonlinear circuit models as well as advanced electromagnetic field-solving techniques. This allows us to minimize design time and achieve highly compact hardware without relying on multiple design spins.” MES www.militaryembedded.com
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INDUSTRY SPOTLIGHT
The path to 5G for military use By Reza Mohammedi With ever-improving user mobile devices, network infrastructure must also be improved and developed at a similar rate. Every generation of communication standards has improved data throughput and latency, and 5G is no different. This new standard will pave the way for new applications and increase data throughput of cellular networks tenfold. 5G for the military is expected to – among other uses – improve intelligence, surveillance, and reconnaissance (ISR) systems and processing; enable new methods of command and control (C2); and streamline logistics systems for increased efficiency.
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Cellular devices have revolutionized the world, from their invention in 1973 to modern-day smartphones. These handheld computers have changed the way we communicate with one another, and without the underlying network supporting all these devices it would be impossible to connect everyone around the world. In the same way that cellular device technology has been continually under development, so has network infrastructure, namely by the standards organization 3GPP [3rd Generation Partnership Project]. They are responsible for the communication standards we use for cellular networks such as 3G, 4G, and – most recently – 5G. All these communication standards rely on a physical cellular network. These networks are comprised of user devices, base stations that can use softwaredefined radios (SDRs) as the relay, and central operator computers linking the end points of each communication. Base stations have a limited range so they can only service a small area – these areas of coverage are the “cells,” and they’re overlapped to ensure total coverage and help keep track of users as they move. Dividing areas into cells relies on three main factors: type of base station, terrain, and population density. Each base station can only handle a certain number of calls, so in areas with larger populations more cells are required. In urban areas, base stations are placed much closer together, compared to rural areas where there are far fewer users per square kilometer. (Figure 1.)
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Figure 1 | An example of cell distribution, highlighting the difference between rural and urban region coverage. Source: Orange S.A.
The 5G standard has low, middle, and high bands. The low band operates below 2 GHz, which enables it to have a very long range, well-suited for rural areas. These channels are still being used by 4G and are often cluttered, so the bandwidth of these channels is 5 MHz to 15 MHz, comparable to 4G. The mid band operates between 2 GHz to 10 GHz, covering cellular and Wi-Fi frequencies. Recent developments have pushed the range of the mid band to about a mile with a channel bandwidth of 60 MHz to 100 MHz. The high band operates between 10 GHz to 100 GHz, with a very short range of 800 feet and a channel bandwidth ranging from 100 MHz to 800 MHz. The higher frequencies are less cluttered with other technologies from military, aerospace, and other consumer applications, making room for larger bandwidths and an increase in data transmission speed.
What is 5G? Once a physical network is established, a protocol to exchange information between nodes is required. The 3G, 4G, and 5G generations of cellular network standards are defined by their data speeds and encoding methods also known as air interfaces, or the communication link between two stations in mobile communication. The air interface involves the physical and data link layers of the OSI [open system interconnection] model. (Figure 2.) For example, 4G uses air interfaces WiMAX and LTE. While there usually is a clean break between the technologies implemented each generation, since 5G is still under development it uses 4G to establish an initial connection. Some communications, such as voice calls, do not have a standard on 5G so it defaults to 4G. www.militaryembedded.com
7
Application Layer
Human-computer interaction layer, where applications can access the network services
6
Presentation Layer
Ensures that data is in a usable format and is where data encryption occurs
5
Session Layer
Maintains connections and is responsible for controlling ports and sessions
4
Transport Layer
Transmit data using transmission protocols including TCP and UDP
3
Network Layer
Decides which physical path the data will take
2
Data Link Layer
Defines the format of data on the network
1
Physical Layer
Transmits raw bit stream over the physical medium
Figure 2 | The OSI model broken down into its seven layers with sample technologies that fall under each category. Source: Imperva.
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INDUSTRY SPOTLIGHT
RF and microwave in electronic warfare systems
The downside to the higher frequencies is that these millimeter wave technologies drop off much faster with distance and cannot penetrate buildings. These drawbacks mean more frequent, smaller base stations to ensure coverage. SDRs are a practical solution that can be implemented as the base station relays, because SDRs can support ultrawide bandwidth connections over a large frequency spectrum, such as the 100 MHz bandwidth high band 5G connections. SDRs also enable upgrade paths via software updates with future-generation standards. What are the advantages of 5G? With each generation of technology, the goal is to increase efficiency, increase data throughput, and decrease latency. 5G is showing huge promise to improve on 4G in every aspect: With increased bandwidth, especially at higher frequencies, it enables significantly faster data transmission speeds. 4G can use as much as seven 20 MHz channels for a total of 140 MHz bandwidth, while a 5G device can stack as many as eight 100 MHz channels for a maximum total of 800 MHz bandwidth. 5G has the potential to peak at 10 to 20 Gbits/sec, a huge improvement over the 100 Mbit/sec speeds of 4G. 5G also has a significant edge in terms of latency: The new generation boasts a theoretical minimum latency of 1 millisecond, a huge improvement over the 20-millisecond latency from the prior generation. 5G has another advantage over 4G – allowing for the massive increase in data transfer – which is that it works in full duplex, meaning that the base stations transmit and receive simultaneously, whereas current implementations must switch between transmit and listening modes. Moreover, while 4G can reach 100,000 serviceable devices within a square kilometer, 5G can reach as many as a million. In terms of the air interface, 5G networks use an orthogonal frequency-division multiplexing (OFDM) encoding similar to 4G LTE, which is designed for lower latency and greater flexibility. This new encoding can increase efficiency by 30% on its own. All these improvements will pave the way for a faster network and potentially new applications for this infrastructure.
manned and autonomous vehicles. The data captured will enable quick modeling and generation of real-time data for logistics and area control; enhanced intelligence, surveillance, and reconnaissance (ISR) systems and processing; command and control (C2); and active protection of units and bases. MES
SDRs are a practical solution that can be implemented as the base station relays, because SDRs can support ultrawide bandwidth connections over a large frequency spectrum, such as the 100 MHz bandwidth high band 5G connections. SDRs also enable upgrade paths via software updates with future-generation standards.
Is 5G safe? The low and mid band of 5G are already in use with other technologies, so most of the concern with this new technology is due to the high band. When people hear “millimeter waves,” the first association is microwaves, so a common urban myth that has emerged is that the more frequent cell towers that are required to support the new standard will expose the general population to harmful radiation. This is simply not true: The 5G base stations will need to emit stronger signals, but due to the higher frequency the signal strength drops off significantly with distance. This results in a user-perceived signal strength similar to past generations. The fear of cellular networks being carcinogenic is not a new phenomenon. Both lab and human studies have been conducted on the subject, and they have shown that the RF waves do not have enough energy to damage DNA directly or to heat body tissue. The health and safety of the users is always prioritized in consumer products, and 5G is no different. The new protocol is as safe as its predecessors.
Notes
What does the future hold for 5G? 5G is still not widely supported by networks and phone hardware and needs time for development. 5G infrastructure is starting to be built, but as with any other transition between communication standards, there is a gradual handoff between the old and new standards. This new generation is forecasted to exceed 2.7 billion users worldwide by 2025. If the theoretical speed of 10 Gbits/sec and 1 millisecond latency are achieved, 5G can lead to many exciting applications.
https://www.nokia.com/blog/small-cells-big-5g/
For the military, 5G will lead to sensor fusion, which means real-time merging and analyzing data from devices and tools including surveillance cameras, detection sensors, base stations and gateways, smartphones, radios and communication nodes, and
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https://www.howtogeek.com/340002/what-is5g-and-how-fast-will-it-be/ https://www.pcmag.com/news/what-is-5g https://www.cancer.org/cancer/cancer-causes/ radiation-exposure/cellular-phones.html https://radio-waves.orange.com/en/how-doesa-mobile-network-work/ https://www.statista.com/ statistics/521598/5g-mobile-subscriptionsworldwide/#:~:text=5G%20mobile%20 subscriptions%20worldwide%20 2019%2D2025%2C%20by%20 region&text=5G%20subscriptions%20are%20 forecast%20to,having%20the%20most%20 5G%20subscriptions https://connect.altran.com/2018/03/eightreasons-why-5g-is-better-than-4g/
Reza Mohammedi is an engineering student at the University of Toronto; his work at Per Vices focuses on network infrastructure. Per Vices https://pervices.com/ www.militaryembedded.com
TECHNOLOGY MAKING YOUR HEAD SPIN? WE CAN HELP YOU MAKE SENSE OF IT ALL
Military Embedded Systems focuses on embedded electronics – hardware and software – for military applications through technical coverage of all parts of the design process. The website, Resource Guide, e-mags, newsletters, podcasts, webcasts, and print editions provide insight on embedded tools and strategies including technology insertion, obsolescence management, standards adoption, and many other military-specific technical subjects. Coverage areas include the latest innovative products, technology, and market trends driving military embedded applications such as radar, electronic warfare, unmanned systems, cybersecurity, AI and machine learning, avionics, and more. Each issue is full of the information readers need to stay connected to the pulse of embedded militaryembedded.com technology in the military and aerospace industries.
INDUSTRY SPOTLIGHT
RF and microwave in electronic warfare systems
caption
Cloud-computing Title models provide By John McHale, Editorial Director an edge on the connected battlefield abstract
By Mike Epley
The ability to collect and analyze data from radar; intelligence, surveillance, and reconnaissance (ISR); electronic warfare (EW); and other sensors at the edge can offer the U.S. military a decisive advantage on the battlefield. Yet resource and operational constraints continue to stand in the way. Applying cloudnative models can help overcome these constraints and improve decision-making while in theater.
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In the thick of battle, information can be just as useful as a tank, fighter jet, or submarine. The ability to perform real-time data analysis and processing at the edge of data generated by intelligence, surveillance, and reconnaissance (ISR) and radar sensors or signals tracked by electronic warfare (EW) systems can provide the U.S. military with immediate actionable intelligence that can change the trajectory of a skirmish. The importance of data processing at the edge is underscored by various ambitious programs currently being deployed. The U.S. Army’s Digital Soldier program, for instance, arms troops on the ground with sensors used to capture vital bits of information. Meanwhile, the U.S. Navy announced in 2020 its intentions to install a ship-mounted cloud computing architecture on carriers and submarines to facilitate edge computing while at sea. Yet despite these use cases, resource and operational constraints continue to keep edge computing from reaching its true potential on the battlefield. Smaller hardware form factors can inhibit computational capabilities at the edge, while harsh and remote environments can cause connectivity and latency issues. Meanwhile, combat troops are being asked to serve as on-the-spot IT professionals, maintaining edge devices, dealing with software, and patching security holes – activities that distract them from their core missions. Overcoming the limitations The same cloud-native methodologies, technologies, and development concepts that work well in the enterprise space can be applied to the theater of war to address
MILITARY EMBEDDED SYSTEMS
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Figure 1 | Cloud-computing concepts can be applied in-theater to improve soldiers’ ability to participate in the “OODA loop” – observe, orient, decide, and act.
prevent combat troops from having to become IT managers, while agile development methodologies like systems thinking can help teams holistically manage distributed infrastructures. Let’s take a closer look at how military units can use cloud computing paradigms to overcome constraints and create more effective and secure edge deployments.
these limitations and improve soldiers’ abilities to “observe, orient, decide and act” (the OODA loop). (Figure 1.) Traditionally, intensive data processing has taken place in centralized data centers, but that’s changed: Instead of the once-traditional data center dichotomy – a core data center versus a remote edge environment – there are now degrees of cloudiness. Large workloads can be split up, enabling some data to be shipped to the cloud while the rest is processed at the edge. Processing small amounts of data at the edge can lead to quicker results and circumvent latency issues, thereby speeding the data back to a central data center. Other core pillars of cloud computing can be used to make management of edge devices and processing easier and more efficient. Automating the updating and maintenance of sensors can www.militaryembedded.com
Size and connectivity constraints Troops on the move need easily portable hardware that meets unique size, weight, and power (SWaP) requirements, as users need to easily transport devices and place them in the backs of their Humvees, in a backpack, or on a drone or satellite. Unfortunately, smaller devices tend to have limited compute capabilities and may not have the capacity to perform rapid, large-scale data processing at the source. Moreover, communications and connectivity in the field can be unreliable, as latency issues and intermittent disconnections can limit communications between the field and a central data center. Troops must be able to shrink data transfers to accommodate for poor or limited connections. Overcoming size and connectivity limitations The ability to split the processing capabilities is essential to use in the field. For example, troops can send non-time-sensitive data collected by remote sensors back to the core data center for deeper processing and in-depth AI simulations. Smaller pieces of data pertaining to critical, time-sensitive actions can be processed on the device itself, minimizing consumption and staying within the device’s processing capabilities. Reducing data transfers also helps avoid latency or bandwidth concerns, since there’s less data to transmit. Consider video taken from a surveillance camera at the edge. Such a device can assist in helping soldiers decide whether they need to take action on the ground or if they should instead ship frames to the cloud or an external remote system for further processing. Workloads can also be reduced, and latency issues overcome, by using other edge sensors on the network. In this example, a CONUS [continental United States]-based cloud could perform a data fusion by comparing the information it’s collected with
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INDUSTRY SPOTLIGHT
RF and microwave in electronic warfare systems
data from cellphone signals. These combined data points can help paint a more accurate picture of a potential person of interest, for example, all while putting minimal strain on the compute capabilities of each edge device. This effort reflects one of the primary benefits of cloud-native technologies and development approaches: the ability to slice and dice workloads and move them around as necessary. Already, cloud native applications use microservices as a way to allow adaptability. The same paradigms can be used by edge workloads and data operating in a service mesh to move between the edge and core clouds. Management and security challenges Maintaining and managing a widely distributed Internet of Battlefield Things (IoBT) is a tall task for the military. Many soldiers may not have the training required to maintain or fix these devices in the event of failure. They may even lack access to them in the first place. Exacerbating maintenance and repair challenges: The fact that the devices are often deployed in wide sets, yet are also spread apart, work independently of each other, and are of different generations and versions. Traditional military IT systems in the field are often deployed to serve a single mission capability, and sometimes even travel with support personnel to ensure it is operating correctly. Tactical edge devices will need to serve multiple capabilities and do so without the benefit of support personnel, all while being secure, failure-resilient, and reliable enough to work on the battlefields of today. When built on software-defined services they are easier to update, redeploy, change functionality, and more; edge devices built in this fashion will be able to meet the rapidly changing needs of the kinetic battlefield.
Tactical edge devices will need to serve multiple capabilities and do so without the benefit of support personnel, all while being secure, failure-resilient, and reliable enough to work on the battlefields of today. However, their cloud-like features add complexity and can make maintenance and security even more challenging. An unpatched edge device may harbor vulnerabilities that make it easier for adversaries to gain a foothold into the network and wreak havoc through a distributed denial of service (DDoS) attack or other tactic.
AS 9100D / ISO 9001:2015 CERTIFIED
PHALANX II: THE ULTIMATE NAS
THE
Supports AES-256 and FIPS140-2 encryption
The McHale Report, by mil-embedded.com Editorial Director John McHale, covers technology and procurement trends in the defense electronics community.
Utilizing two removable SSDs, the Phalanx II is a rugged Small Form Factor (SSF) Network Attached Storage (NAS) file server designed for manned and unmanned airborne, undersea and ground mobile applications. w w w . p h e n x i n t . c o m
ARCHIVED MCHALE REPORTS AVAILABLE AT:
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1
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Automation and systems thinking improve management and security Automating the provisioning, management, and orchestration of the software used by these devices removes from the warfighters’ responsibility the need to maintain and update that software. Thousands of networked devices can be automatically managed as if they were part of a centralized IT system, a move that vastly reduces the complexity associated with managing a wide array of edge devices. It also enables troops to focus on the mission with the assurance that the devices have the latest security updates and will continue working effectively. This is a form of systems thinking, where teams consider not just components of a system, but the system as a whole. This can be particularly effective when managing a widely distributed network of edge devices. Although these devices often operate independently of one another, they’re still part of a larger network and should not be considered in isolation. Instead, warfighters should always consider the larger system and different devices working together to capture and analyze data. Drone swarms are a good example. Instead of a single aircraft flying 50,000 feet in the air, a military unit may have a large network of drones flying at lower altitudes, each collecting snippets of vital information. Drones can capture data individually yet share and fuse data collectively, giving troops more resilient and complete intelligence than they would have otherwise garnered through an AWACS system on a single, vulnerable aircraft. A strategic and tactical advantage at the edge Being able to derive actionable intelligence that enables split-second decision making is critical in a dynamic battlefield environment. Edge computing is critical to
this mission, but limitations stand in the way, keeping the IoBT from reaching its fullest potential. Applying cloud computing architectures, technologies and methodologies to edge computing used in-theater can make it easier to maintain and make use of a widely distributed edge network with strong security capabilities. U.S. military personnel can benefit from real-time data processing that can offer them strategic and tactical advantages. MES Mike Epley is a Chief Architect at Red Hat, where he guides the Department of Defense and other government agencies on their open source software needs. Previously, Mike was a senior software engineer at Lockheed Martin. He can be reached at mepley@redhat.com. Red Hat • www.redhat.com
Evolving Standards: How VITA and SOSA are Leading the Change Sponsored by TE Connectivity
With the rapid advancement of technologies used in defense systems, new interconnect standards are enabling new possibilities for high-density, high-speed connections in harsh environments. In this webcast, a panel of experts from TE Connectivity explores new and upcoming standards for rugged interconnects from the SOSA and VITA standards organizations. Also discussed: Key industry drivers on connector development, trends in standards development, acceleration of connector standardization and implementation, and upcoming challenges and opportunities. Watch the webcast: https://bit.ly/3cxyAP8
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EDITOR’S CHOICE PRODUCTS Microwave cable assemblies ruggedized for defense and aerospace Carlisle Interconnect Technologies’ (CarlisleIT) new UTiPHASE microwave cable assembly series is a solution designed to deliver electrical phase stability versus temperature without compromising microwave performance. UTiPHASE is intended for defense, space, and testing applications. The UTiPHASE series builds on the company’s UTiFLEX flexible coaxial microwave cable technology by combining connector captivation with thermally phase-stable dielectric that eliminates the poly-tetrafluoroethylene (PTFE) “knee, or a change in the delay of the transmitted signal.” The so-called knee may cause unfavorable electrical length changes, particularly around room temperature, negatively impacting system performance. UTiPHASE’s thermally phase-stable dielectric is aimed at mitigating this condition by flattening the phase versus temperature response curve to minimize system phase variation and increase accuracy. Other key features include ruggedized concentric-core construction, vertical integration to allow for controlled fluoropolymer performance and delivery, velocity of propagation of at least 80%, and universal configurability with existing standard connectors and armor, reducing lead time. CarlisleIT says that its cable assemblies are designed for applications including commercial and military phased-array radars, as well as aerospace satellite communications (SATCOM) and traffic collision avoidance systems (TCAS), synthetic aperture radars, thermal test sets, and any RF/microwave system operating at or near room temperature.
Carlisle Interconnect Technologies | www.carlisleit.com
.NET maritime display framework intended to speed development of ARPA consoles Cambridge Pixel – a developer of radar display, tracking and recording subsystems – offers its Maritime Display Framework (MDF), an out-of-the-box software application that provides a set of core capabilities to enable maritime integrators to accelerate the development of automatic radar plotting aid (ARPA) radar display consoles. The new software aims to provide a .NET framework, optionally with source code, that can be used as the starting point for a custom ship-based application, providing display of primary radar, radar tracks, electronic navigational charts (S-57/S-63), secondary transponder information such as AIS and ADS-B, and NMEA-format navigation data. The company states that the MDF software can receive radar video from maritime radar sensors including Furuno, Hensoldt, JRC, Koden, Raymarine, Raytheon, Simrad, Sperry, and Terma, with control of the radar supported for certain models. The MDF software is designed to support multiple display capabilities required in an ARPA display, including bearing lines, range markers, trails and closest point of approach (CPA), and time to CPA (TCPA). Additionally, the product supports camera video for situations where a user requires an integrated radar and camera display for security against piracy and smugglers. The system can calculate the tracked object’s course, speed, and CPA, thereby warning if there is a danger of collision with the other ship or land mass.
Cambridge Pixel | www.cambridgepixel.com
Flange-style waveguide-to-coax adapters designed for RF, microwave Pasternack (an Infinite Electronics brand) has expanded its line of euro-style flange, waveguide-to-coax adapters that are aimed at use in satellite communications (SATCOM), radar, wireless communications and test instrumentation applications. These new waveguide-to-coax adapters feature waveguide sizes that range from WR-22 to WR-430; European IEC standard flanges (including UBR square cover, UDR, and PDR types); right-angle and end-launch coaxial connector options; and N-type, SMA, 2.92 mm, and 2.4 mm connector choices. These new wave-guide-to-coax adapters are designed to transform waveguide transmission lines into 50-ohm coaxial lines, enabling power to be transmitted in either direction with each adapter covering the full frequency range of its waveguide band. The company says that other features of the waveguide-to-coax adapters include frequency ranges from 1.72 GHz to 40 GHz in 15 waveguide bands, waveguide sizes from WR-28 to WR-430, European IEC standard flanges: UDR, PDR, and UBR, coaxial designs: SMA, 2.92 mm, N-Type, and 2.4 mm connectors, the adapters are constructed with precision machining in brass or aluminum, and the products are available in right-angle and end-launch configurations. The company also notes that these waveguide-to-coax adapters are well suited for wireless communications and lab environments, among other applications.
Pasternack | www.pasternack.com 44 January/February 2021
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EDITOR’S CHOICE PRODUCTS Low-power radiation-tolerant PolarFire FPGA introduced by Microchip Technology Microchip Technology announced it is shipping engineering silicon for its RT PolarFire field-programmable gate array (FPGA) while the device is being qualified to spaceflight component reliability standards. Designers can now create hardware prototypes with all the same electrical and mechanical performance that the space-qualified RT PolarFire FPGAs will provide for high-bandwidth on-orbit processing systems, all with low power consumption and the ability to withstand radiation effects in space. Microchip’s RT PolarFire FPGAs are designed to increase computational performance so satellite payloads can transmit processed information rather than raw data and make optimal use of limited downlink bandwidth. The devices are designed to enable more system complexity than previous FPGAs and withstand higher total ionizing dose (TID) radiation exposure. The company says it is qualifying its RT PolarFire RTPF500T FPGAs to MIL-STD 883 Class B, QML Class Q, and QML Class V. The parts – designed to survive a rocket launch and meet performance needs in space – are intended for use in such applications as high-resolution passive and active imaging, precision remote scientific measurement, multispectral and hyperspectral imaging, and object detection and recognition using neural networks. All of these covered applications require high levels of operating performance and density, low heat dissipation, low power consumption, and low system-level costs.
Microchip Technology | www.microchip.com
Renesas/Intersil 14-bit ADC designed to deliver rad-hard performance for space-based missions Renesas Electronics offers its Intersil single-chip 14-bit, 1 Msamples/sec successive-approximation-register (SAR) analog-to-digital converter (ADC) for radiation-hardened space applications. The ISL73141SEH is designed to deliver dynamic and static performance, including signal-to-noise ratio (SNR), effective number of bits (ENOB), integral non-linearity (INL) and differential non-linearity (DNL). According to the company, the ADC fully resets after every sample, clearing any errors that result from a single-event upset (SEU) due to heavy ion radiation during spaceflight. The ISL73141SEH is one of the signal-path building blocks in long duration geosynchronous/geostationary Earth orbit (GEO) communication satellites and manned spacecraft, including lunar space missions. By delivering the dynamic and static performance, the 14-bit ADC is designed to capture real-world analog transmissions and convert them for processing in the digital domain. The ISL73141SEH ADC is one of seven ICs, including rad-hard temperature sensor, multiplexer, quad op amp, ADC driver, LDO, and voltage reference to form a complete sensor interface signal chain solution that aims to accelerate telemetry, tracking, and control (TT&C), and flight computer system development. The space-grade ISL73141SEH is characterized for enhanced low dose rate-sensitivity (ELDRS) radiation performance up to 75 krad (Si) for TID and linear energy transfer (LET) up to 86MeV*cm2/mg for single-event effects (SEE).
Renesas Electronics Corporation | www.renesas.com
Thermocouple analog input module intended for space-saving applications WAGO has introduced its new 750 series (750-498) 8-channel thermocouple analog input module. According to the company, this compact, easy to wire, configurable I/O module is 12 mm wide, designed with the intent to save space in the end user’s control cabinet. It is also aimed at reducing time spent, the company says, on installation and commissioning. WAGO is able to be configured by channel for thermocouple types B, C, E, J, K, N, R, T, and S using WAGO-I/O-CHECK software or e!COCKPIT configuration tools. It can also be used to measure millivolt ranges -30 to +30, -60 to +60, -120 to +120, and -240 to +240. The design is intended to enable users to select between internal and external cold junction temperature compensation. The piece overall is 12 mm (0.472 inch), with a height of 100 mm (3.937 inch), a depth of 69 mm (2.717 inch), and a depth from the upper edge of the DIN-rail of 61.8 mm (2.433 inch). WAGO reports that the 750-498 module has gained approvals from both the U.S. and Canadian Underwriters’ Laboratory for both standard and hazardous locations plus marine DNV certification.
WAGO | www.wago.com/us/ www.militaryembedded.com
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CONNECTING WITH MIL EMBEDDED
By Editorial Staff
GIVING BACK | PODCAST | WHITE PAPER | BLOG | VIDEO | SOCIAL MEDIA | WEBCAST
GIVING BACK
Purple Heart Homes
Each issue, the editorial staff of Military Embedded Systems will highlight a different charitable organization that benefits the military, veterans, and their families. We are honored to cover the technology that protects those who protect us every day. To back that up, our parent company – OpenSystems Media – will make a donation to every group we showcase on this page. This issue we are highlighting Purple Heart Homes, a 501(c)3 public charity that provides housing solutions for service-connected disabled and aging veterans. The nationwide nonprofit organization was founded in 2008 by John Gallina and the late Dale Beatty, two National Guard veterans who had been wounded during service in Iraq. Following their return to the U.S. – and after their recovery and rehabilitation – the pair embarked on their mission, that of facilitating barrier-free housing for service-connected disabled veterans that are substantial in function, design, and quality. To date, the organization says, more than 700 veterans have been helped by 17 Purple Heart Homes chapters across the U.S. The organization has two main programs: Veterans Aging in Place (VAIP), which encompasses the Operation Veterans Home Renovation Project (OVHR), a program designed for service-connected disabled veterans who currently own their home but need some assistance with renovations or repairs to make that home safe and accessible. The other main program is the Veterans Home Ownership Program (VHOP) – aimed at service-connected disabled veterans who are willing to take on the responsibility of home ownership – which matches qualified veterans with a home that can be modified to meet his or her mobility needs. Purple Heart Homes has also endowed a new scholarship for 2021 designed to help pay for housing and food for a child of a veteran with service-connected disabilities during their undergraduate studies at either a community college, college, or university. For additional information on Purple Heart Homes, please visit https://purplehearthomesusa.org/.
VIDEO: MIL TECH VIRTUAL TOOLBOX
Solving cybersecurity, AI, and open architecture challenges in defense electronics
In this episode of Mil Tech Virtual Toolbox, Group Editorial Director John McHale speaks with Duc Huy Tran, vice president of global marketing with Aitech Systems, about tools used for enabling cybersecurity in military embedded systems and how artificial intelligence (AI) and open architecture initiatives such as the Sensor Open Systems Architecture (SOSA) are changing the defense electronics landscape. Tools covered include Aitech’s C877 Cyber Countermeasure, Aitech’s 3U OpenVPX-compliant Intel Xeon-D/E SBCs, and the company’s U-C8770 3U SOSA-aligned Intel Xeon-D single-board computer. Tran also provides an outlook for the defense market during and after the COVID-19 pandemic and discusses how the industry is enabling the use of commercial off-the-shelf (COTS) technology in space applications such as satellites and manned spacecraft. Watch this installment of Mil Tech Virtual Toolbox: https://bit.ly/3pEIFgN
46 January/February 2021
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WEBCAST
Accelerating Avionics Design & Testing through FACE Conformance: An Integrated Model by Boeing, U.S. Army & Aerospace Leaders Sponsored by AdaCore, Boeing, CoreAVI, Presagis, and RTI Pre-integrated, commercially developed software that adheres to industry safety and technology standards will dramatically accelerate the design, development and testing of nextgeneration avionics. Open APIs defined by The Future Airborne Capability Environment (FACE) Technical Standard now enable rapid integration of software from both industry and government, reducing risk and accelerating time to deployment. In this webcast, industry experts from Boeing – in partnership with the U.S. Army, AdaCore, CoreAVI, Presagis, and Real-Time Innovations (RTI) – demonstrate an integrated FACE commercial off-the-shelf (COTS) solution stack covering cockpit displays, graphics systems, and data transport connectivity. This stack enables high mission capability using the most advanced avionics technologies, designed to accelerate RTCA DO-178C DAL A safety certification and FACE conformance. Watch the webcast: https://bit.ly/2MMvXhb Watch more webcasts: https://militaryembedded.com/webcasts www.militaryembedded.com
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