SOSA Special Edition 2023

By

EDITOR’S PERSPECTIVE

9 SOSA a key part of MOSA mindset

By John McHale, Editorial Director

SOSA FEATURES

10 SOSA Membership List

14 SOSA Consortium Information

16 Interview with Mike Orlovsky, chair of the Business Working Group for the SOSA Consortium

20 Is high-performance electronic warfare compatible with open standards?

By Robert Normoyle, Herrick Technology Laboratories

24 Bringing the benefits of GCIA to next-generation ground vehicles

By Jacob Sealander, Curtiss-Wright Defense Systems

28 Exploiting direct RF FPGAs for electronic warfare

By Rodger Hosking, Mercury

34 MOSA, SOSA, VPX, and power considerations

By Matt Renola

40 Multi-INT and SOSA: A consideration of next steps

By Patrick Collier, Aspen Consulting Group and Denis Smetana, Curtiss-Wright Defense Solutions

44 MOSA systems: The benefits of deploying a datacentric architecture

By Andre Odermatt, RTI

ON THE COVER

The U.S. Department of Defense’s most recently introduced bomber aircraft, the B-21 Raider, is expected to serve within a larger family of systems for conventional long-range strike, including intelligence, surveillance and reconnaissance; electronic attack; communications; and other capabilities. It is nuclear-capable and designed to accommodate manned or unmanned operations. The Raider was designed with a modular open systems architecture (MOSA) approach. U.S. Department of Defense photo.

50 SOSA’s rubber is meeting the road in rapid system development

By Travis Doll, Sciens Innovations and John Orlando, Epiq Solutions

54 AI, open standards to play key role in future SWaP designs for UAS payloads

By Dan Taylor

SOSA SPEAKOUTS AND PROFILES

58 SOSA Speakouts

64 SOSA Profiles

© 2023 SOSA Special Edition

SOSA’s rubber is meeting the road in rapid system development

By Travis Doll, Sciens Innovations and John Orlando, Epiq Solutions p.50

Bringing the benefits of GCIA to next-generation ground vehicles

Jacob Sealander, Curtiss-Wright Defense Systems p.24

Gold Sponsors

PG SPONSOR

3 Annapolis Micro Systems –

The only full ecosystem of 3U & 6U 100GbE products aligned with SOSA

58 Annapolis Micro Systems –Executive Speakout

8 Atrenne – When failure is not an option

58 Atrenne – Executive Speakout

7 Elma Electronic – Leaders in modular open standards that enable the modern warfighter VPX

59 Elma Electronic – Executive Speakout

13 GMS – X9 Spider. The world’s most powerful full-feaetured wearable AI computer

60 GMS – Executive Speakout

2 Kontron – Introducing the VX307H

60 Kontron – Executive Speakout

61 Mercury Systems, Inc. –Executive Speakout

84 Mercury Systems, Inc. –Critical signal processing with unmatched flexibility

5 Wolf Advanced Technology –

SOSA aligned 3U VPX powered by NVIDIA Jetson AGX Orin single board computers

63 Wolf Advanced Technology –Executive Speakout

Advertiser Index

aligned OpenVPX chassis with advanced cooling

39 PWR Advanced Cooling Technology –Engineering the unfair advantage

26 Rantec – Engineered power conversion for tactical applications

49 Samtec – Interconnect solutions

43 Sealevel – Get it right

63 SR Technologies (SRT Group) –Executive Speakout

19 The Open Group –The Open Group SOSA Consortium

GROUP EDITORIAL DIRECTOR John McHale john.mchale@opensysmedia.com

ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com

TECHNOLOGY EDITOR Dan Taylor dan.taylor@opensysmedia.com

CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com

WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com

EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com

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CORPORATE

REPRINTS

Leaders in Modular Open Standards that Enable the Modern Warfighter VPX

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Editor’s Perspective

By John McHale, Editorial Director

SOSA a key part of MOSA mindset

Welcome to the SOSA Special Edition 2023, our third offering of what is an annual issue highlighting editorial content on The Open Group’s Sensor Open Systems Architecture (SOSA) Technical Standard from the pages and website of Military Embedded Systems magazine, as well as the products aligned and conformant to the Technical Standard – all put together exclusively by our staff.

Even before the release of the SOSA Technical Standard revision 1.0, the consortium was a key component of the U.S. Department of Defense’s (DoD’s) push toward having new systems and upgrades leverage open architectures, as mandated four years ago in the socalled Tri-Service Memo from the U.S. Air Force, Army, and Navy leadership, which asserted that a modular open systems approach (MOSA) for weapon systems “is a warfighting imperative.”

The bottom line: MOSA approaches will enable long-term schedule and cost savings for the DoD.

Based on feedback from the SOSA community, savings are already happening, said David Tremper, Director, Acquisition Integration and Interoperability, Office of the Undersecretary of Defense, in his keynote at the MOSA Virtual Summit held February 22 and hosted by Military Embedded Systems

He listed specifics he heard directly from the SOSA Technical Standard community illustrating these savings.

› “The cost to generate a proposal has gone down 75%.”

› “The reusable NRE compounds, creating billions in savings when tens of companies apply SOSA across multiple programs.”

› “High TRL [technology readiness level] system that used to take us

24 months to build is now available in under six months.”

› “The new funding we get is going toward new capability development, not platform integration.”

Tremper called on the community to continue providing “quantifiable metrics of value-added” and sharing them with DoD leadership.

MOSA is also being embraced by the Special Operations Forces (SOF). At SOF Week 2023, Jim Smith, U.S. Special Operations Command (USSOCOM) Acquisition Executive at SOF Acquisition, Technology & Logistics, told me that the SOF community is “absolutely invested in [MOSA]. We want to have a best-ofbreed capability, we want many industry partners to solve some tough problems. To do that and work within the JADC2 [Joint All-Domain Command and Control] construct, we have to pursue open architectures. We found it’s very conducive to not only competition but [also for] having a ‘big tent’ philosophy for our partners.”

Smith cited the Mission Command System as just one example of MOSA’s impact: This system involves more than 17 different vendors contributing to the capability, he said. Smith attributed the success of this approach to USSOCOM’s adherence to open architecture, which prevents designers and vendors from being locked into proprietary systems.

USSOCOM also created a new Program Executive Office for SOF Digital Applications in an effort to accelerate the software-acquisition process, Smith noted. “We now have six-plus programs that are in continuous development/continuous deployment pipeline for software acquisition. We’ve completely changed the culture on how we’re doing that, and what’s made that hum is our absolute adherence to MOSA.”

Accelerating the DoD acquisition process continues to be a challenge, as I noted late last year in my November/December 2022 Editorial Perspective column. My point was that changing this type of bureaucracy is not easy, as there’s no replacement for government-acquisition processes, so new processes are needed to test, develop, and procure technology and get it more quickly into the hands of warfighters.

Consortia like SOSA and the Future Airborne Capability Environment (FACE) provide a gateway for nontraditional defense suppliers and small businesses to gain entry into the defense market.

“Small businesses with niche capability have had a hard time getting into bigger acquisition programs because they were not part of the prime community,” Tremper said in his keynote address. “[Now putting the] government in a position where it can bring in a third-party integration of hardware and software is profoundly important for small-business insertion into big acquisition.”

The SOSA Consortium provides tools and guides for helping businesses get involved in SOSA. In the Q&A on page 16, Mike Orlovsky, senior scientist at L3Harris and chair of the SOSA Consortium’s Business Working Group, discusses those guides and more.

Neither this edition, nor the prior two, could have happened without the help and cooperation of Reggie Hammond and her colleagues at The Open Group, as well as the SOSA Outreach Committee cochairs – Valerie Andrew of Elma Electronic and Gina Peter of Mercury Systems. Many thanks for everyone’s help on this third iteration of the SOSA Special Edition.

About the SOSA TM Consortium

www.opengroup.org/sosa

The Open Group Sensor Open Systems Architecture (SOSA™) Consortium enables government and industry to collaboratively develop open standards and best practices to enable, enhance, and accelerate the deployment of affordable, capable, interoperable sensor systems. The SOSA™ Consortium is creating open system reference architectures applicable to military and commercial sensor systems and a business model that balances stakeholder interests. The architectures employ modular design and use widely supported, consensus-based, nonproprietary standards for key interfaces.

For additional information please visit https://www.opengroup.org/sosa.

SOSA SPONSOR

Air Force Life Cycle Management Center

https://www.aflcmc.af.mil/

Collins Aerospace

https://www.collinsaerospace.com/

Joint Tactical Networking Center

https://www.jtnc.mil/

Lockheed Martin

https://www.lockheedmartin.com/

Marine Corps Systems Command, Product Manager EWS

https://www.marcorsyscom.marines.mil/ Portfolios/CES/

NAVAIR

https://www.navair.navy.mil/

NIWC Atlantic

https://www.niwcatlantic.navy.mil/

U.S. Army CCDC C5ISR

https://c5isr.ccdc.army.mil/

U.S. Army PEO Aviation

https://asc.army.mil/web/tag/ peo-aviation/

U.S. PEO C3T

https://asc.army.mil/web/peos/

U.S. Army PM PNT

https://pm-pnt.army.mil/home

US Army Project Manager

Electronic Warfare and Cyber

https://peoiews.army.mil/

U.S. Space Force Space and Missile Systems Center

https://www.spaceforce.mil/

SOSA PRINCIPAL

BAE Systems Inc

https://www.baesystems.com/en/home

Booz Allen Hamilton

https://www.boozallen.com/

Cubic Corporation

https://www.cubic.com/

Curtiss-Wright Defense Solutions

https://www.curtisswrightds.com/

Elbit Systems of America

https://www.elbitsystems-us.com/

FLIR Systems

https://www.flir.com/

GE Aviation Systems

https://www.geaviation.com/

General Dynamics

https://www.gd.com/

Huber+Suhner Astrolab

https://www.hubersuhner.com/en

Intel Corporation

https://www.intel.com/content/www/us/ en/homepage.html

L3Harris

https://www.l3harris.com/

Leonardo DRS

https://www.leonardodrs.com/

Mercury Systems

https://www.mrcy.com/

NASA

https://www.nasa.gov/

Northrop Grumman Corporation

https://www.northropgrumman.com/

Raytheon Technologies

https://www.rtx.com/

Sierra Nevada Corporation

https://www.sncorp.com/

SR Technologies

https://www.srtgrp.com/

SRC, Inc.

https://www.srcinc.com/

VadaTech

https://www.vadatech.com/

SOSA ASSOCIATE

II-VI Aerospace and Defense

https://www.iiviad.com/

Abaco Systems

https://www.abaco.com/

Acromag, Inc.

https://www.acromag.com/

Aegis Power Systems

https://aegispower.com/

AirBorn, Inc.

https://www.airborn.com/

SOSA ASSOCIATE (continued)

Aitech

https://aitechsystems.com/

Amphenol

https://amphenol.com/

Ampro ADLINK Technology, Inc

https://www.adlinktech.com/en/Index

Analog Devices

https://www.analog.com/en/index.html

Anduril Industries

https://www.anduril.com/

ANELLO Photonics

https://www.anellophotonics.com/

Annapolis Micro Systems Inc.

https://www.annapmicro.com/

Apogee Semiconductor

https://apogeesemi.com/

Atrenne

https://www.atrenne.com/

Ball Aerospace

https://www.ball.com/aerospace

Behlman Electronics

https://www.behlman.com/

CACI International

https://www.caci.com/

Chameleon Consulting Group

https://chameleoncg.com/

Cobham Advanced Electronic Solutions

https://caes.com/

CodeMettle

https://www.codemettle.com/

Comtel Electronics

https://comtel-online.com/

Concurrent Technologies

https://www.gocct.com/

Cornet Technology

https://cornet.com/

COTSWORKS, LLC

https://cotsworks.com/

CRFS

https://www.crfs.com/

Critical Frequency Design

https://www.criticalfrequency.com/

Crossfield Technology

https://www.crossfieldtech.com/

Crystal Group

https://www.crystalrugged.com/

Dawn VME Products

https://www.dawnvme.com/

Delta Information Systems

https://www.delta-info.com/ DornerWorks

https://dornerworks.com/

DRS Signal Solutions

https://www.leonardodrs.com/

DRTI

https://drti.com/

EIZO Rugged Solutions

https://www.eizorugged.com/

Elma Electronic

https://www.elma.com/en

EPI

https://www.engineeredprod.com/

Epiq Solutions

https://epiqsolutions.com/

Epirus

https://www.epirusinc.com/

Expeditionary Engineering, Inc.

https://www.xp-eng.com/

FiberQA

https://www.fiberqa.com/

Freedom Power Systems

https://www.vicorpower.com/all-products/ vicor-power-systems

Frontgrade Technologies

https://frontgrade.com/

GALT Aerospace

https://www.galt.aero/

General Micro Systems, Inc.

https://www.gms4sbc.com

Georgia Tech Research Institute

https://gtri.gatech.edu/

Glenair

https://www.glenair.com/

GORE

https://www.gore.com/

Herley Industries, Inc.

https://www.ultra.group/us/

Herrick Technology Laboratories, Inc.

https://www.herricktechlabs.com/

HII Mission Technologies

https://hii.com/what-we-do/divisions/ mission-technologies/

Hughes Network Systems

https://www.hughes.com/

IDEAS Engineering & Technology

https://www.ideas-tek.com/

Inertial Wave, Inc.

https://www.inertialwave.com/

Innoflight, LLC

https://www.innoflight.com/

Interface Concept

https://www.interfaceconcept.com/

iRF Solutions

http://irf-solutions.com/

ITT Cannon LLC

https://ittcannon.com/

ITZ, LLC

https://itz.org/

Jacobs

https://www.jacobs.com/

Jovian Software Consulting

https://www.joviansc.com/

Kontron America

https://www.kontron.com/en

LCR Embedded Systems, Inc.

https://www.lcrembeddedsystems.com/

Lead Dog Technologies

https://leaddog.tech/

Leidos

https://www.leidos.com/

SOSA ASSOCIATE (continued)

LGS Innovations

https://www.caci.com/

Mathtec, Inc.

https://mathtechinc.com/ Meritec

https://meritec.com/

Micro Focus (USA) Inc.

https://www.microfocus.com/en-us/home

Microchip Technology Inc.

https://www.microchip.com/

Micropac

https://www.micropac.com/

Midwest Microwave Solutions

https://www.mms-rf.com/

Milpower Source

https://milpower.com/

Moog Inc.

https://www.moog.com/

Motorola Solutions Inc.

https://www.motorolasolutions.com/ en_us.html

New Wave Design and Verification

https://newwavedv.com/

North Atlantic Industries, Inc

https://www.naii.com/

NVIDIA

https://www.nvidia.com/en-us/

One Stop Systems

https://onestopsystems.com/

OnTime Networks

https://ontimenet.com/

Orion Technologies, LLC

http://www.oriontechnologies.com/

Orolia Defense & Security

https://www.oroliads.com/

Pacific Defense

https://www.pacific-defense.com/

PacStar

https://pacstar.com/

Parry Labs, LLC

https://parrylabs.com/

Phoenix International

https://www.phenxint.com/

Pixus Technologies USA

https://pixustechnologies.com/ Quantic Electronics

https://quanticnow.com/

QRC Technologies

https://www.qrctech.com/

RADA Technologies LLC (RADA USA)

https://radausa.com/

Rantec Power Systems

https://rantec.com

Real-Time Innovations, Inc.

https://www.rti.com/en/

REDCOM Laboratories

https://www.redcom.com/ Red Hat

https://www.redhat.com/en

Red Rock Technologies

https://www.redrocktech.com/

Riverside Research

https://www.riversideresearch.org/

RTD Embedded Technologies, Inc. https://www.rtd.com/

Saab, Inc.

https://www.saab.com/

Samtec, Inc.

https://www.samtec.com/

Sciens Innovations

https://www.sciensinnovations.com/

ScioTeq

https://www.scioteq.com/en

Sealevel Systems

https://www.sealevel.com/

Selex Galileo

https://www.leonardo.us/

SI2 Technologies

https://www.si2technologies.com/

Skayl LLC

https://www.skayl.com/

Smiths Interconnect Americas

https://www.smithsinterconnect.com/

Southwest Research Institute

https://www.swri.org/

StreamDSP, LLC

https://streamdsp.com/

Systel, Inc.

https://www.systelusa.com/

TE Connectivity

https://www.te.com/usa-en/home.html

Technology Service Corporation

https://www.tsc.com/

Tektronix

https://www.tek.com/

Telephonics

https://www.telephonics.com/

The MITRE Corporation

https://www.mitre.org/

Tomahawk Robotics

https://www.tomahawkrobotics.com/

Tucson Embedded Systems, Inc.

https://www.tucsonembedded.com/

University of Dayton Research Institute

https://udayton.edu/udri/

Variable Software

https://www.variablesw.com/

ViaSat, Inc.

https://www.viasat.com/

VITA

https://www.vita.com/

W-IE-NE-R Power Electronics Corp.

http://wiener-us.com/

Wolf Advanced Technology

https://wolfadvancedtechnology.com/

Note: List current as of 7/25/2023

SOSA TM Consortium Information

As sensor systems increase in number, applications, cost and complexity, users need to address issues such as affordability, versatility and capabilities. Sensor systems should be rapidly reconfigurable and reusable by a greater number of stakeholders. The Open Group’s SOSA Consortium enables government and industry to collaboratively develop open standards and best practices to enable, enhance, and accelerate the deployment of affordable, capable, interoperable sensor systems.

The SOSA Consortium is creating open system reference architectures applicable to military and commercial sensor systems and a business model that balances stakeholder interests. The architectures employ modular design and use widely supported, consensus-based, nonproprietary standards for key interfaces that are expected to:

Email The Open Group ogsosa-admin@opengroup.us.

For more information, visit www.opengroup.org/sosa

LinkedIn: www.linkedin.com/company/the-open-group/

Twitter: https://twitter.com/theopengroup

You Tube Channel: https://www.youtube.com/user/theopengroup/video

• Reduce development cycle time and cost

• Reduce systems integration cost and risk

• Increase commonality and reuse

• Reduce sustainment and modernization cost

• Support capability evolution and mitigate obsolescence

• Enable technology transition

• Facilitate interoperability

• Isolate the effects of change

Consortium Information

JOIN THE SOSA CONSORTIUM

Get involved and gain influence in defining open standards and certifications

Being a member of The Open Group gives organizations early access to the latest information and developments regarding open standards and best practices, and enables them to participate in The Open Group’s highly influential Forums and Work Groups. We provide a collaborative, vendor-neutral environment where member representatives can:

• Network with a world-class community of peers, experts, and industry leaders

• Have early access to information on industry developments

• Gain insight for future decisions from both major customers and suppliers of IT

• Influence outcomes that benefit their organizations

• Grow professionally, and enhance their credibility in the industry

• Learn best practices

The SOSA Consortium provides a vendor-neutral forum for industry and government to work together to develop capabilities and support for modular, open sensor systems.

The SOSA approach provides an agile and platform-agnostic open systems architecture for multi-intelligence C4ISR systems. The architecture incorporates both hardware and software components to handle demanding processing and data requirements, ease system upgrades, reduce total cost of ownership, and promote competitive acquisition with minimal system reworks.

Contact The Open Group if your organization is interested in joining. One of our membership representatives will get in touch to provide you with the rules of engagement and membership information.

Email The Open Group ogsosa-admin@opengroup.us.

THE OPEN GROUP: MAKING STANDARDS WORK

The Open Group works with customers and suppliers of technology products and services, and with consortia and other standards organizations, to capture, clarify, and integrate current and emerging requirements, establish standards and policies, and share best practices. Our standards ensure openness, interoperability, and consensus.

The Open Group is a global consortium that enables the achievement of business objectives through technology standards. With more than 900 member organizations, we have a diverse membership that spans all sectors of the technology community –customers, systems, and solutions suppliers, tool vendors, integrators, and consultants, as well as academics and researchers.

SOSA interview with Mike Orlovsky

Below is the excerpted transcript of an interview previously conducted by the SOSA consortium with Mike Orlovsky, the Business Working Group chair for the consortium.

What is your title at L3Harris and level of participation in the Sensor Open Systems Architecture (SOSA) consortium?

ORLOVSKY: I’m a senior scientist with L3Harris. My role is to focus on open system architectures, the modular open system approach (MOSA), and model-based system engineering. I’m focused on the high-performance needs of sensor and signal processing. In the SOSA Consortium, I serve as the Business Working Group (BWG) chair. My involvement with the SOSA Consortium started around the 2015 timeframe, and I’ve been working with open system architectures since the early 1990s. In that time, we’ve seen tremendous growth, with the emergence of reference architectures and the defining of the hardware and software implementation of those reference architectures.

Before my participation in the SOSA Consortium, I was with a small team focused on application of the Future Airborne Capability Environment (FACE) Consortium products. We joined a large team demonstrating a software-defined system applying the FACE Technical Standard. Our group demos were centered around the sensor portions of the mission system.

These demos clearly showed the significant value of application reuse, but my biggest takeaway was the benefits realized at the integration phase. With open systems, and the conformance-checking tools on those interfaces – even though we were working with sophisticated sensor systems – integration went a lot quicker.

Did the FACE Consortium provide an example or model for the SOSA Consortium from a software perspective?

ORLOVSKY: The answer is yes, but it’s threefold. Yes, the FACE Consortium provided a model framework for standards development that SOSA was able to leverage. Yes, the FACE consortium hosted SOSA working groups for about 18 months until the SOSA Consortium officially stood up. And, yes, the SOSA Technical Standard leverages the FACE software and data standards, and the FACE Consortium. Given my experience with open systems, with consortium-based standards development, the FACE Technical Standard, and my keen interest in making sensors more agile, I took a role in the SOSA Consortium. I was the inaugural software working group chair. As the consortium grew, the Software Working Group evolved into the Software Environment Subcommittee, which was led by Michael Majors, as I transitioned to the chair of the Business Working Group.

Mike Orlovsky

Under your leadership, the BWG has developed the SOSA Business Guide and will soon release the SOSA Acquisition and Contracting Guide. Were those assets modeled on preexisting and similar FACE documents or were you starting from scratch?

ORLOVSKY: There were, I believe, two prior BWG chairs and an initial release of the Business Guide. When I became chair, George Dalton was the vice chair. George and I worked out our vision for what the BWG products would be. Our fundamental charter was to focus on the business aspects of the SOSA Technical Standard deliverables to complement an exceptional team working on the technical standard. We had two existing subcommittees, one focused on Business Architecture and the other on Outreach, working on the external facing side of the SOSA Consortium market.

The Outreach Committee, co-chaired by Valerie Andrew and Gina Peter, is very closely engaged in communicating to the outside world. For example, they work closely with groups like the Association of Old Crows (AOC), and Association of the United States Army (AUSA), and they reach out to different communities to share the SOSA Consortium message. In the Business Architecture subcommittee, co-led by Mondo Mikhail, Pete Jha, and Jeff Evans, we define the set of products needed to support the SOSA Consortium business ecosystem. So, when a company or program is looking to use and apply the SOSA Technical Standard, we’ve developed and provided them with the information they would need. We’ve laid out, and are delivering on a plan, for the different guides to help interested people understand the SOSA Consortium Business Ecosystem.

The Business Guide makes the case for the SOSA Consortium, explaining to the reader what the benefits of the SOSA Technical Standard are, while the Acquisition and Contracting Guide, shows the reader, once convinced, how they would go about using and implementing the SOSA Technical Standard? Is that correct?

ORLOVSKY: The Business Guide provides the overall picture. When released, the Acquisition and Contracting Guide will provide specific guidance and examples of language that various acquisition authorities can tailor to meet their program needs. This will help to ensure customers receive SOSA aligned products that will deliver the MOSA benefits they are trying to achieve. [The Acquisition and Contracting Guide is currently in formal review; the document is expected to be released by the end of 2023.]

To help ensure customers get what they want, we’ve also started working on a Supplier Guide, to help suppliers prepare for this new marketplace. Specifically, the purpose of the Supplier Guide is to help suppliers progress through the SOSA ecosystem starting from a design, through conformance, to producing a product that is conformant to the SOSA technical standard. We’ll be developing the Supplier Guide throughout 2023, and we encourage customers and suppliers to engage in the consortium to help design a more productive SOSA marketplace.

Will the Supplier Guide take suppliers through the process from inception to deployment?

ORLOVSKY: Exactly. With complex systems, you can have many interpretations, so the guide helps you get started very quickly. The Business Guide, Acquisition and Contracting Guide, and Supplier Guide are all developed to be in harmony with the conformance program, the technical standard, and the reference implementation guide. Together, they are all part of the SOSA Technical Standard body of knowledge that will create a more efficient and innovative sensor marketplace.

When you were putting the Acquisition and Contracting Guide together, what were some of the most common questions that you wanted to address?

ORLOVSKY: Many of us have developed proposals in the past and, given our experience and perspective, we wanted to explain what that actually meant from a business perspective, rather than to simply issue a one-line edict saying, “You shall be SOSA conformant.” Providing consistent reference language that a supplier will recognize will also help them as they are developing their response to an RFP.

The Acquisition and Contracting Guide is intended to provide the business framework to help ensure a more efficient marketplace for sensor solutions that deliver the benefits of MOSA. The Acquisition and Contracting Guide is, therefore, more focused on the management and contracting personnel. It is intended to complement the technical standard and it assumes that there will be engineering counterparts defining the needed SOSA Technical Standard profiles and requirements.

Is the Acquisition and Contracting Guide audience intended to convince the acquisition community to establish SOSA Technical Standard requirements or to help define those requirements as accurately as possible?

ORLOVSKY: The Business Guide makes the case to establish the SOSA Technical Standard requirements and the Acquisition and Contracting Guide helps to define effective MOSA strategies and contracts by leveraging the SOSA Technical Standard. Since the Tri-Service joint memorandum [in 2019], the government is looking for solutions that are based on open standards. The SOSA Technical Standard allows the development of sensors that are more agile and more adaptable using open interfaces. The SOSA Technical Standard helps to break apart stovepiped solutions and

provides customers the ability to involve a wider portion of the industry and encourages more creative and competitive solutions to the problem.

Is the Acquisition and Contracting guide crafted to help the widest number of potential respondents clearly understand what’s being asked for and what’s being called out? Essentially, to toss out the widest net possible to encourage and stimulate the greatest amount of creativity and innovation?

ORLOVSKY: Yes, it really is to help open that space to different suppliers so that, through open architectures, they can offer components that will plug in and address the acquirer’s need. This reduces barriers to entry to companies that may not be able to compete at the system level. It truly widens the aperture. Innovation is therefore encouraged at the module level, and a company’s intellectual property – their “secret sauce” – is bounded by open interfaces, but also protected, so they can achieve higher returns on their investment through reuse, upgrades, and sustainment of their products. That’s a double-edged sword, however, because if they rest on their laurels, the open interfaces also allow them to be replaced. That market pressure ensures investment dollars stay focused on innovation which is where our customers and technical teams both want to be.

In the process, was there anything that surprised you the most?

ORLOVSKY: I’d have to say that I was most surprised by how hard it was to get input from subject-matter experts from the acquisition community. With everything going on in the world, these folks are highly tasked, so at times we had to get creative to tap into the expertise and experience of acquisition authorities. We reached out to the various service branches to get their input, we provided sample language for them to review, and we invited their advice. It took a bit longer, but in the end, the guide reflects the work and experience of many people and organizations.

Is that again proof of the value of the consortium model – that instead of working in a vacuum, you had feedback services?

ORLOVSKY: Right. The consortium model for the SOSA Technical Standard has worked extremely well. The service branches and the government side have been very active participants. Similarly, we also have a wide breadth of industry participating, ranging from smaller Tier 3 suppliers to Tier 2 and Tier 1 suppliers. It’s impressive how that cross-section works together. At our face-to-face meetings, we’re drawing upwards of up to 150 and 160 participants. And the consortium can leverage all that experience, which then is reflected in our various products, which in this case, is the Acquisition and Contracting Guide.

Will this be a living document?

ORLOVSKY: Yes. Each of our three guides will go through a revision and modification process very similar to the technical standard, as we learn things and as the ecosystem adapts and evolves. Updates are planned nominally on a three-year drumbeat, at which time the guides will be revisited and either confirmed as still good, or revised to reflect lessons learned. Since, of course, we will all be three years smarter.

Is there anything we didn’t touch on or ask that you were looking forward to discussing?

ORLOVSKY: The one thing that I’m probably most proud of is that we have this exceptional team of talented individuals in the BWG all working on defining these documents. There’s usually a point person to take ownership and get the document through the challenging periods, but it really is the whole team that’s working on and supporting the overall effort. I’m also proud how L3Harris, a principal member in the SOSA consortium, has supported my participation and that of my other colleagues. This work has been very professionally rewarding. Even on those challenging afternoons during face-to-face meetings when working on consensus results in spirited discussions! ■

Michael “Mike” C. Orlovsky is the Business Working Group chair for the Sensor Open Systems Architecture (SOSA) Consortium. Mike has been with SOSA since the incubation (2015) and transition to a full consortium, serving as the Software Working Group Chair from 2016 through the end of 2019. He is a senior scientist in Space & Airborne Systems with L3Harris Technologies.

The Open Group SOSA™ Consortium empowers government and industry to collaboratively develop open standards and best practices.

The SOSA Technical Standard leverages and complements open standards in government

open interfaces, enabling the development of capabilities made up of common components. The

components and hardware elements, as well as electrical and mechanical interfaces composing the SOSA sensor element.

For more information and to obtain the SOSA Technical Standard email: ogsosa-admin@opengroup.us

Join the SOSA Consortium Today

We support the warfighters and soldiers in the field and strive to arm them with the electronic tools they need for mission success. Industry, government, and suppliers are successfully joining their unique perspectives to leverage technology and standards in support of the warfighters and soldiers in the field.

https://www.opengroup.org/sosa/join The Open Group: Leading the development of open,

The Open Group is a global consortium that enables the achievement of business objectives through technology standards. Our diverse membership of more than 900 organizations includes customers, systems and solutions suppliers, tool vendors, integrators, academics, and consultants across multiple industries.

An integrative and inclusive standard to accelerate the development of affordable, agile, and composable sensor systems

Is highperformance electronic

warfare compatible with open

standards?

By Robert Normoyle

Today, multiple agencies are involved in open architecture standards to ensure that weapons and defense system features match up with their perception of future systems specified and beginning to be used by the U.S. Department of Defense (DoD). Examples of key attributes provided by these standards relevant to electronic warfare (EW) are the VPX backplane profiles and MORA/V49.2 protocols. The DoD has had a hand in developing both of these in order to specify and develop reference architectures to verify performance.

Prior to the promulgation of the SOSA [Sensor Open Systems Architecture] framework, systems integrators based their designs on a standard such as VPX, VXS, or VME, and declared their open architecture, though at that time there wasn’t a robust systemlevel specification to enable interoperability of 3rd-party components. The standards provided mechanical and high-level signal type definitions, leaving designers with a lot of leeway on signal protocols. Often the backplane, the board interfaces, and the data protocol interfaces were proprietary. Even though the designer could state the design as open architecture, the modular open systems approach (MOSA) goals were not effectively achieved – namely, the goals of interoperability, scalability, competition, faster refresh, and lower cost.

This disconnect was even more prevalent with high-performance electronic warfare (EW) systems, since the coordination between components and systems is expected at a nanosecond scale and extreme frequency coverage. A stretch goal for instantaneous frequency coverage has been 2 to 18 GHz, 16 GHz of instantaneous bandwidth, for electronic surveillance (ES), electronic attack, and digital RF memory (DRFM) capabilities. In addition to this range, banded capability at millimeter frequency was also desirable. Even though government agencies specified MOSA-based approaches, there was no technical detailed description of what this meant and how to verify it. The

architectures were so intricately interdependent upon custom designs that changes could only be done by original equipment providers. The government agencies were still tied to a single source for simple upgrades to an architecture, resulting in simple changes to designs costing millions.

Do standards really support interoperability?

The pioneer computer programmer Grace Hopper coined the phrase: “The nice thing about standards is that there are so many of them to choose from”, implying that the use of standards is not effective, and every organization may “choose” to use something different, thus negating interoperability.

This statement has been a typical pushback about hewing to standards, though over the last five or 10 years there has been a convergence between DoD organizations and industry. Examples of this convergence are the CMOSS [C4ISR/Electronic Warfare Modular Open Suite of Standards], SOSA, and CMFF [CMOSS Mounted Form Factor] efforts, which have been using the best attributes of multiple standards such as VPX, VITA 49, MORA [Modular Open RF Architecture], VICTORY [Vehicular Integration for C4ISR/EW Interoperability], FACE [Future Airborne Capability Environment], and HOST [Hardware Open Systems Technologies] to develop a framework that is being adopted by a majority of the suppliers and becoming required by more and more DoD programs. These interfaces have been designed by a consortium of industry, government, and academia engineers who are vetting the proposed architecture components with their real-life experiences of EW, signals intelligence (SIGINT), radar, and communications systems requirements. This situation is a key difference from how standards were developed a decade earlier, at which time the primary drivers were just industry with very little government involvement.

Can standards really support high-performance EW requirements?

In the early days of digitized audio – namely the 1980s – a similar problem existed, as custom cards were needed to compress/expand audio signals. As personal computer (PC) technology evolved, it became viable to use software-based encoder/decoders on the processors as opposed to using custom hardware solutions. This maturation was an enabler for the development of audio and video compression software that provides interoperability across platforms, whether Mac or PC, at a low cost and with very little effort by the user. When programmable technology approaches the performance to directly process the signal phenomena of interest, then open architecture approaches and standards are viable.

Today we have arrived at a point where the latest processors used for EW analytics and jamming can directly ingest, manipulate, and create jamming waveforms over ultrawide bandwidths. These processors include FPGAs [field-programmable gate arrays] for front-end processing and detection. An EW system can provide frequency coverage of 16 GHz of instantaneous frequency coverage and also provide nanosecond precision control, status, and IQ data interfaces via SOSA standards.

A similar matured situation exists today: Capabilities of software-defined radio (SDR) have reached the information processing rate needed to handle multiple gigahertz of bandwidth. A two-slot 3U VPX card can provide simultaneous transmit and receive capability of 4+ GHz. Multiple copies can be integrated into a SOSA chassis to provide 16 GHz of coverage, such as in a range of 2-18 GHz.

Today, backplane architectures are available that can convey over 200 Gbps of data as GbE and PCI per slot, which is sufficient to convey 4 GHz of data each direction. MORA/V49.2 interfaces provide timestamped high-precision information including IQ data packets, control packets, and status packets between modules and systems. This protocol, combined with the 1 PPS and 100 MHz reference clocks in a system architecture, makes it possible to achieve nanosecond precision. The standards bodies continue to progress efforts to make the standards synergistic and move forward with new enhancements to support emerging technology. New VPX connectors are being defined that support bandwidth of 800 Gbps per module, which is sufficient to convey 16 GHz of instantaneous bandwidth at 16 bits resolution.

Interoperability advantages of SOSA standard for EW solutions

The SOSA standards group consists of more than 100 organizations and more than 1,000 members, all working to proactively develop an interoperable framework for multiple-intelligence (multi-INT) applications. EW engineers are part of this group and voice their expertise to mold the standard to meet demands of high-performance EW.

The consortium also takes into account the other modalities of operation including communications, radar, and SIGINT. The resulting standards have enabled companies to build products based on the standards, anticipating that multiple DoD programs can leverage them.

This alignment reduces the time and schedule of acquisition programs because the chassis and the modules are being developed in advance of the acquisition cycle, rather than during the program’s NRE phase. This reality is quite different from legacy acquisitions where chassis were typically custom-designed for an acquisition effort, with commercial off-the-shelf (COTS) modules typically needing modification to support the customization required by the prime. Today, a chassis built for one program is being rapidly deployed for another.

This same phenomenon is also true for VPX modules, where modules from a variety of vendors can be used in multiple chassis. Figure 1 shows the number of combinations viable in four and eight SOSA payload slots, based on 1 to 20 unique payload cards, such as EW SDR. The combination with repetition formula

Figure 1 | Shown: the configurations in a chassis as a function of card types and number of slots in a chassis.

was used as shown. The repetitions do not include the same cards configured differently in a chassis. The maximum number of SDR modules is based on a quick survey of vendors at the 2022 Association of Old Crows Annual International Symposium and is a conservative number.

The number of configurations is staggering, perhaps not all of them uniquely beneficial, though if only 10% are deployable architectures, it is still an impressive number of configurations compared to the single-purpose chassis of the past since it could provide dozens of architectures ready for redeployment for different missions and platforms. It was unprecedented in legacy EW architectures to reuse modules and chassis for multiple configurations for multiple programs and platforms that are not just EW focused, but multi-INT. Companies are seeing the phenomenon in the integrations of SOSA aligned chassis and SIGINT/EW VPX modules. This situation enables SDR modules from multiple vendors to be used in multiple chassis for a diversity of programs and products providing fully integrated solutions can employ modules from multiple performers.

FPGA partial reconfiguration enables multi-INT capability

The framework and interfaces for a generic mission manager which can support SDR reconfiguration is a being defined by SOSA. Just as there were many ways a chassis can be configured with different SDR modules, there are also many ways that the SDR cards can be dynamically configured to support different mission requirements at the depot or to dynamically change the SDR capability of the chassis in situ of a mission. There are three high-level use cases:

1. A SOSA chassis built for a specific EW program is redeployed to support a different EW program and/or another operational mode such as SIGINT or radar

2. SOSA chassis reconfigured at the depot with an alternate mission-specific card set

3. SOSA chassis dynamically reconfigured in situ to support different modalities of operation

An example of repurposing a notional SOSA chassis payload cards is shown in Figure 2 and 3. In Figure 2, the chassis provides a total of 16 GHz of ES and EA capability by configuring each of the eight payload slots with 2 GHz IBW [instantaneous bandwidth] UWB [ultra wideband] SDRs providing a 20 MHz to 20 GHz frequency coverage. In Figure 3, the same chassis is reconfigured at the depot to provide eight channels for instantaneous precision DF [direction finding] and eight channels for ES [electronic support]. The same chassis provides a high precision interferometer DF while simultaneously providing 8 GHz IBW of frequency coverage.

An example of dynamically reconfiguring a chassis in situ is presented in Table 1. For this notional example, the chassis is configured as shown in Figure 2. It has eight SDR cards each with 2 GHz IBW which can be dynamically configured for different operations during the mission. During the start of the mission, it is in Mode 1, utilizing all the channels for ES providing 16 GHz of IBW surveillance. As it detects targeting threat

radar, it moves to Mode 2, reallocating ES channels for a look-thru jamming technique while still maintaining 14 GHz IBW for ES. When a missile-targeting radar is detected, it moves to Mode 3, by dynamically reloading firmware and bonding channels coherently together to form a digital RF memory (DRFM) jamming channel. While in this mode, there is still 10 GHz of instantaneous BW ES capability. To determine the effectiveness of the EW technique, it switches to Mode 4, reconfiguring UWB SDR 4 and 5 to create a UWB radar. As mentioned

Figure 2 | Notional chassis configuration consisting of eight payload slots providing 16 GHz IBW, each with a 20 MHz to 20 GHz frequency range.

Figure 3 | Notional chassis depot configuration consisting of four payload slots providing Instantaneous DF capability and four payload slots providing 8 GHz IBW, each with a 20 MHz to 20 GHz frequency range.

Table 1 | Shown is a notional example of dynamic reallocation of SOSA SDR payloads throughout an EW mission.

earlier, this is a notional representation of one scenario to represent the potential value of dynamic in situ mission management. Many other dynamic configuration usages exist.

RF and FPGA technology –SOSA aligned for EW

HTL’s UWB SDR module and 19-slot chassis capability is based on the HTLv-43 (RF converter) and HTLv-53 (digitizer + FPGA) which provides a total of 4 GHz of full-duplex simultaneous capability with a frequency range of 20 MHz to 20 GHz. The modules provide four 2 GHz RF tuners: two receivers and two exciters. Each of the channels are independently tunable, though can be made phasecoherent to one another and across multiple cards. The superheterodyne architecture enables the necessary selectivity when operating in congested and/ or contested dynamic RF environments. (Figure 4.)

HTL provides both an 11-slot and 19-slot chassis aligned with SOSA release 1.0. These chassis can support dozens of configuration options. With the HTLv-43/53 cards they can support the UWB configuration capabilities presented. With the HTLv-43/53 cards, the 11-slot provides 8 GHz of IBW for both ES and EA or DRFM capability, whereas the 19-slot provides 16 GHz of the same type of capability. The frequency range for each chassis can be extended to 44 GHz with the use of HTL44E frequency extender. ■

Robert Normoyle is the Director of Open Systems at Herrick Technology Laboratories (HTL), where he leads the development of SOSA/CMOSS-based modules and chassis. Mr. Normoyle has more than 40 years of experience developing high-performance EW, radar, and SIGINT systems. He began his career at NRL and has worked at several SDR companies including L3 and DRS. He also worked at Johns Hopkins University Applied Physics Laboratory providing technical guidance to multiple programs for the Navy, ONR, Army C5ISR, and DARPA. He led the APL’s contributions to the V49.2 standard and VPX profiles, which are foundational for the CMOSS and SOSA standards. Readers may reach the author at RNormoyle@HerrickTechLabs.com

Herrick Technology Laboratories

https://www.herricktechlabs.com

SOSA Aligned OpenVPX

Chassis With Advanced Cooling

• Designed specifically for high-wattage applications

• Various SOSA aligned profile options

• Speeds to PCIe Gen4 and 100GbE

• Modular MIL Rugged design for versatility

• SlotSaver SOSA aligned chassis manager mezzanine

www.pixustechnologies.com

Figure 4 | Shown is the HTLv-53 digitizer plus FPGA.

Bringing the benefits of GCIA to nextgeneration ground vehicles

By Jacob Sealander

The partnership between Curtiss-Wright and BAE Systems to develop a standardized modular open systems approach (MOSA) open architecture for next-generation ground vehicles is an example of how the benefits of MOSA-aligned open standards can be leveraged to deliver new capabilities to next-generation ground vehicles, such as the U.S. Army’s Optionally Manned Fighting Vehicle (OMFV).

Technological change is driving a new generation of ground combat vehicles, as seen by the U.S. Army’s Optionally Manned Fighting Vehicle (OMFV) competition. Through the OMFV competition, the Army is seeking a new infantry fighting vehicle that is agile, lethal, and survivable while also ready to deploy today’s and tomorrow’s most advanced technology and support tomorrow’s emerging capabilities.

Modular open systems approach (MOSA)aligned solutions are critical for enabling technology on ground vehicles to be rapidly refreshed and new capabilities quickly fielded to meet emerging threats

on the battlefield. A vehicle designed with this level of flexibility can consistently meet and exceed the Army’s specific agility, lethality, and survivability goals. MOSA builds in the room to grow to match the Army’s needs and can be easily upgraded and adapted to remain dominant in the fight.

Key Army initiatives – such as Project Convergence, which led to the creation of standards like Ground Combat Systems (GCS) Common Infrastructure Architecture (GCIA) and CMOSS Mounted Form Factor (CMFF) – have been part of the Curtiss-Wright mission. It has also been directly involved in the development

of many of the foundational standards referenced in GCIA, such as OpenVPX, SOSA, VICTORY [Vehicular Integration for C4ISR/EW Interoperability], MORA [Modular Open RF Architecture], and CMOSS [C5ISR Modular Open Suite of Standards]. GCIA is helping to move the next-generation combat vehicle away from traditional stovepiped and purposebuilt electronics and toward a standardized core infrastructure that can host all of the capabilities needed for OMFV.

The GCIA standard

The GCIA standard defines the requirements for a network computing infrastructure that can host all of the vehicle’s

The brief for the U.S. Army’s Optionally Manned Fighting Vehicle (OMFV) calls for a modular, open systems approach that combines state-of-the-art technologies to equip troops for the ever-changing, interconnected, multidomain, joint battlefield. The OMFV will replace M2 Bradley Fighting Vehicle, versions of which date back to the early 1980s. Curtiss-Wright is partnering with BAE Systems on its OMFV solution, which is aimed at bringing agility, lethality, and mobility solutions to the U.S. Army. Image courtesy BAE Systems/Curtiss-Wright.

required functions and enables different sensors and effectors to be easily integrated and plugged into that core infrastructure over time. The use of a GCIA infrastructure eases integration on a specific platform and facilitates integration and data movement between platforms. GCIA delivers numerous benefits, including portability of technology and rapid incorporation of new technology.

It builds on existing standards such as the Sensor Open Systems Architecture (SOSA) Technical Standard and the OpenVPX hardware standard that defines the rugged modules called out in SOSA. By specifying rugged processing, networking, I/O, and graphics modules aligned to the SOSA profiles and built using the OpenVPX modules called out in SOSA, ground vehicles are increasingly moving to a MOSA-based GCIA compliant architecture.

The MOSA system elements included in the GCIA architecture include line-replaceable modules (LRM), line-replaceable units (LRU), chassis, fully integrated systems, and the scheme of connectivity. In addition, the U.S. Army’s Standardized A-Kit/Vehicle Envelope (SAVE) – a new physical size, weight, and power (SWaP) and connector standard for fielding new C5ISR [Command, Control, Computers, Communications, Cyber, Intelligence, Surveillance and Reconnaissance] capabilities – can be leveraged to speed and simplify the installation of CMFF systems in Army vehicles by regularizing the size, shape, and physical interfaces (RF, data, power, etc.) for mounting those types of systems. SAVE joins the CMOSS standards – such as VICTORY, MORA, and OpenVPX – already called out by the GCIA framework, but it covers only the purely physical elements, instead of defining how data flows between the systems integrated on a vehicle.

Delivering key MOSA assets

A GCIA implementation delivers on key MOSA benefits, including the ability to quickly react to evolving threats, easily upgrade systems, and reduce vendor lock to lower costs and drive interoperability. In addition, the standard addresses failure resiliency, because the GCIA system infrastructure uses a distributed network with no single point of failure.

The ability to move applications and functions using distributed network resources to any spot in the vehicle will provide an unprecedented new level of fault resiliency compared to today’s vehicle architectures, in which there is very little built-in redundancy. A distributed network architecture enables multiple different functions to be hosted in the same chassis or located in different places on a vehicle, since they are all connected over the GCIA internal vehicle network (IVN) with data transported using well-defined standards such as VICTORY. (Figure 1.)

GCIA defines how the network moves and shares data to support all the resources needed to host the different functions on a ground combat vehicle. For example, GCIA defines a version of Ethernet that supports TSN [timesensitive network] standards for safetycritical data movement on the standard core network. The GCIA network can accommodate very low latency paths while providing determinism. Diverse capabilities – such as fire control, targeting, 360° situational awareness, and vehicle-protection systems – can all be hosted by the GCIA-defined infrastructure, which minimizes or eliminates the need for specialized hardware.

Figure 1 | An eight-slot, user integrationready powered enclosure uses natural convection cooling and can reduce the work of CMOSS/SOSA Technical Standard 1.0 system development.

Today, new ground-vehicle capabilities are typically hosted in their own discrete boxes, all of which host their own internal computers and require a space claim on an already-crowded vehicle. Each box will usually have its own software, which also needs to be able to communicate with the next layer of software on the vehicle network. All of this has to be qualified, which takes a long time to do and adds program risk. GCIA helps to mitigate risk. While it looks to the SOSA Technical Standard for system profile definitions and VITA hardware standards, GCIA limits their approved use to only a handful of SOSA profiles and a narrow subset of hardware standards.

These constraints force designers to build from a much-smaller set of building blocks right from the get-go, which will greatly reduce the time required to field new technology and tech refreshes in ground-combat vehicles. GCIA focuses on the requirements for enabling a core

compute networked infrastructure that will enable a system designer to simply “plug in” all desired capabilities. For example, it directs the use of specific processing and software, and defines the types of displays (dumb versus smart) and security (multilevel security boxes versus single-level boxes).

System designers can use the specified building blocks to develop their software on the very same hardware platform that all other GCIA compliant suppliers are using. That means solutions developed for GCIA-based applications will be transportable between different hardware elements, not just within the vehicle itself, but also from platform to platform and from compute instance to compute instance.

GCIA represents a paradigm shift on how to establish a next-generation vehicle architecture by defining an overall integrated solution. The standard will play a major role in bringing the many advantages of MOSA to next-generation ground vehicles such as OMFV. Such open architecture/distributed network-based combat vehicles are expected to meet and exceed the Army’s requirements now and for years to come. ■

Jacob Sealander is Chief Architect, C5ISR Systems, for CurtissWright Defense Solutions. He has worked at Curtiss-Wright since 1996 in various design, engineering, and management positions including engineering manager of embedded systems, mechanical engineering manager, and manager of product line engineering. Sealander can be reached at jsealander@curtisswright.com

Curtiss-Wright Defense Systems • https://www.curtisswrightds.com/

3U VPX Power Supplies Designed in Alignment with the SOSATM Technical Standard

Exploiting direct RF FPGAs for electronic warfare

By Rodger Hosking

As technologies evolve, government defense organizations steadily evolve electronic warfare (EW) solutions to counteract and then surpass capabilities of their adversaries by leapfrogging each other in an ongoing mission imperative to maintain dominance. Essential functions of EW systems are acquiring RF [radio frequency] signals of interest and then performing the required signal-processing tasks to deliver an effective response. This fosters new technologies and architectures that boost performance levels in both operations.

Several emerging FPGA [field-programmable gate array] architectures combine advanced RF [radio frequency] data converters and the latest processing engines within a single package. Using advanced silicon processes and packaging technologies, offerings include both monolithic designs and multi-chip modules. These new, highly integrated devices represent transformative technology for electronic warfare (EW) applications, yielding significant performance advantages over the traditional collection of discrete components that are typical of previous architectures.

Direct RF technology

One of the most challenging requirements of modern EW systems is to capture and generate high-frequency, wideband RF signals using high-speed data converters. These are typically connected to the antenna with analog frequency translation stages to convert between RF antenna signal frequencies and the lower IF [intermediate frequency] frequencies that data converters can digitize. These RF tuner stages require mixers, amplifiers, filters, oscillators, and numerous discrete analog components, all carefully packaged and shielded to maintain signal integrity, increasing cost, size, power, and complexity in any EW system.

The most straightforward approach to eliminate these cumbersome frequency translation stages is to boost the sampling rate and the maximum input signal frequency of monolithic data converters so they can handle RF signals directly with no translation. Performance levels of these so-called direct RF devices have advanced steadily, driven by the obvious benefits for commercial, industrial, and defense markets.

The vast size of 5G commercial wireless markets provides special incentives, because the large number of local, massive-MIMO [multiple input/ multiple output] phased-array antennas each typically needs 64 transmit/receive elements to steer receive and transmit signal beam patterns. Antenna directionality is achieved by precisely shifting the relative phase of signals to each element, so each element requires its own signal-processing channel.

In such systems, eliminating the frequency translation stage from each channel not only saves SWaP [size, weight, and power] and cost, but also simplifies channel synchronization by removing analog RF components subject to component tolerances, aging, temperature drift, reliability, and maintenance issues. To address these problems, discrete monolithic direct RF ADCs and

DACs [analog-to-digital converters/digital-to-analog converters] capable of directly digitizing RF signals at 1 GHz and above have appeared during the last decade.

In 2017, Xilinx introduced the acclaimed RFSoC [radio frequency aystem-on-chip) with eight 5 Gs/sec ADCs, eight 9.8 Gs/sec DACs, Zynq UltraScale+ FPGA fabric, multicore Arm processors, and dual 100 GbE interfaces, all within a single monolithic device, fully qualifying as a direct RF FPGA. The RFSoC data converters support RF signal frequencies up to 6 GHz and offer channel synchronous operation for phased arrays. Initially targeting the 5G wireless infrastructure market, the RFSoC was immediately embraced for defense applications including radar, countermeasures, EW, and communications.

Now, direct RF data converters offering sampling rates as high as 64 Gs/sec can directly digitize RF signal frequencies up to 38 GHz. Available as packaged BGA [ballgrid-array] devices or in chiplet form, these monolithic devices are extremely compatible with the new generation of FPGA processing architectures discussed next.

AMD Xilinx Versal ACAP FPGAs

AMD’s Versal ACAP [adaptive compute acceleration platform] devices based on its 7 nm silicon process consists of a series of six SoC architectures, each with specific blends of different processing engines and powerful peripherals, shown in Figure 1.

The scalar engines include the dual core Arm Cortex-A72 application processor and the dual-core Arm Cortex-R5 real-time processor. Unlike most scalar processors that implement single instruction, single data structures, these Arm processors provide single instruction, multiple data (SIMD) operations. This boosts performance for many algorithms by processing more data for each sequentially executed instruction. Scalar processors target general applications, and the software is extremely portable across a wide range of platforms.

The adaptable engines utilize programmable logic FPGA fabric plus various types of memory, including block RAM, UltraRAM, and accelerator RAM. Configurable logic in

Figure 1 | AMD Xilinx Versal ACAP FPGA includes a blend of adaptable FPGA, DSP, and AI [artificial intelligence] engines; direct RF converters; multicore Arm processors; network-on-chip; multirate Ethernet I/O; and system interfaces. Diagram courtesy Xilinx.

FPGAs provides an ideal platform for real-time state machines, control logic, complex timing, Ethernet packet processing, and synchronization, all essential functions for many EW systems. These kinds of operations are often impossible for scalar processors, even those running a real-time operating system. High level design entry tools help development tasks for signal processing tasks, but less so for real-time logic and control functions.

Versal offers two types of intelligent engines: The DSP engines are specialized, highly efficient real-time signal-processing blocks that include fixed- and floating-point multipliers, accumulators, arithmetic units, data multiplexers, and barrel shifters for both scalar and vector data types. With over 14,000 DSP engines in the largest Versal devices, highly parallelized processing architectures can process real-time data streams from high-rate direct RF data converters. As a result, DSPs deliver the lowest latency of all processing classes. Because each new generation of FPGAs adds new types of fabric resources and enhanced DSP engines, configuration code for FPGAs tends to be quite family-specific, even for devices from the same vendor.

The other intelligent engines are AI [artificial intelligence] engines, each consisting of a 2D array of AI tiles, which come in two versions. The general AI engines are balanced to support both machine learning (ML) applications and advanced signal processing for beamforming, radar, FFTs, filters, video enhancement and image processing. The AI/ML engines are optimized for ML tasks including image and speech recognition, medical diagnosis, statistical arbitrage, and predictive analytics, and they also offer extended support for ML data types. For machine learning applications, they are eight times more efficient in the silicon area than DSP engines, reducing power by about 40%.

Onboard, flexible high-bandwidth memory (HBM) enables data transfer bandwidths up to 820 GB/sec, representing an 8-time increase in bandwidth compared to traditional DDR5. The Versal ACAP AI RF series, available soon, offers on-board direct RF ADCs and DACs, following the highly successful theme introduced by RFSoC.

To interconnect all of these numerous resources, ACAP includes an extremely wideband, configurable network-on-chip that offers a uniform interface and protocol to simplify system integration.

This heterogeneous mix of ACAP resources gives designers the freedom to assign compute power to the processing engine most suitable to the task at hand, and the ability to adaptively reassign resources as required. This flexibility of ACAP delivers as much as ten times the performance compared to dedicated processor types alone. Versal development tools target high-level design entry from frameworks, models, C-language, and RTL coding. Users can create a custom development environment to suit their project needs and programming preferences. Other Versal hardware/software platforms will evolve to help speed EW development tasks and support high complexity applications with extreme performance requirements.

AMD Xilinx ACAP direct RF FPGA products

Although the Versal ACAP AI IF series with the integrated direct RF data converters is not yet available, several product offerings combining the Versal ACAP with direct RF data converters have already been released. (Figure 2.)

Figure 2a/b/c | Three AMD Versal ACAP direct RF solutions: 2a is the RFS1140RF system-in-package with single AI core and four-channel/64 Gs/sec ADC/DAC; 2b is the SCFE6931 SOSA aligned 6U OpenVPX card with two AI cores and optical I/O; 2c is the 5560 SOSA aligned 3U VPX card with Versal HBM FPGA and direct RF mezzanine.

Intel Stratix 10 AX and Agilex 9

Direct RF FPGAs

Intel offers two families of Direct RF FPGAs, the Stratix 10 AX and the new Agilex 9 shown in Figure 3. These multichip modules take advantage of Intel’s chiplet fabrication capabilities to attach various combinations of chiplets to the main FPGA chip using EMIB and 2.5D packaging processes. The Intel Direct RF devices use the Jariet Electra-MA 64 Gsps 10-bit chiplet data converters for all three of the devices shown below. A fourth device listed in Figure 4 uses chiplets with 4 Gsps 14-bit ADCs and 12 Gsps 14-bit DACs.

Figure 4 shows resources in four different Intel direct RF devices. Note that the AGRW027 and AGRM027 devices

Figure 2a

Figure 2b

Figure 2c

BECAUSE EACH NEW GENERATION OF FPGAS ADDS NEW TYPES OF FABRIC RESOURCES AND ENHANCED DSP ENGINES, CONFIGURATION CODE FOR FPGAS TENDS TO BE QUITE FAMILYSPECIFIC, EVEN FOR DEVICES FROM THE SAME VENDOR.

use the same FPGA chip, illustrating the advantage of using different types and combinations of chiplets for data converters and other peripherals to efficiently create new components.

Intel direct RF products

The industry’s first open architecture board using an Intel direct RF FPGA is the Mercury DRF3182 released in January 2023. (Figure 5.) The 3U OpenVPX card features the Stratix10 AX device. It enables direct RF digitization of four transceiver channels across a 2 GHz to 18 GHz frequency band to support numerous EW applications. Eight PCIe Gen3 x4 data plane ports deliver 64 GB/sec of data across the backplane to other cards.

As soon as the new Intel Agilex 9 devices become available, board vendors will be eager to incorporate them in open architecture embedded computing boards to speed adoption in deployed systems.

Direct RF FPGAs: the bottom line for EW

By eliminating the analog RF frequency translation stage of EW designs, direct RF not only reduces SWaP and cost, but it also boosts performance by reducing latency, minimizing analog phase and amplitude uncertainties, and simplifying channel synchronization. Direct RF data converters contain dedicated digital frequency translators (DDCs and DUCs) that can instantaneously tune across a very wide span of frequency to implement complex sweeping and hopping patterns, a critical advantage for many advanced countermeasure algorithms.

Traditional scanning receivers that sequentially tune across a span can easily miss such transients outside of the current scan window. Direct RF enables EW systems to “stare” across a wide frequency span to detect any transient spectral activity that might be of interest. Once a signal is detected, the direct RF wideband data converter stream can also be delivered to a DDC to zoom in on a narrow band of interest for signal exploitation.

Figure 3a Figure 3b

Figure 3a/b | Intel direct RF FPGA parts include Stratix10 AX devices using 14 nm silicon and Agilex 9 devices using 7 nm silicon. All use EMIB connections between the FPGa fabric and direct RF ADC/DAC chiplets.

Figure 4 | A table shows Intel direct RF FPGA resource comparisons.

Figure 5 | The DRF3182 3U VPX direct RF Stratix10 FPGA has four 51.2 Gs/sec, 10-bit ADCs/DACs.

Because EW systems must often track multiple targets simultaneously, they can take advantage of this flexible wideband/narrowband capability to operate multiple narrowband DDCs in parallel, each tuned to specific target frequencies located anywhere across the entire frequency span, and beamformed to specific target directions.

Following a similar strategy, a single direct RF front end can be shared by multiple, different EW applications by forwarding digital streams of specific bands of interest to specialized subsystems across fast network links.

One challenge imposed by direct RF data conversion is the extremely high data rate between the data converter and the signal processing resources. In the earlier discussion of product solutions, the best strategy is tightly coupling these sections using silicon or chiplet bonding within a single device to stream data across wide, local highspeed parallel buses. This also significantly reduces latency compared to slower JESD [standard for serial interfaces] serial links, now in widespread use for such connections.

The powerful heterogeneous processing resources of the latest classes of FPGAs enable a flexible choice of processing engines best suited to the wide range of required tasks including decoding, demodulation, decryption, signal classification, image processing, sensor fusion, target recognition, trajectory calculations, fire control, countermeasures, attack plan development, and many more. These processor task assignments are adaptable during a mission to optimize performance.

Flexible chiplet packaging affords much shorter development cycles of new FPGAs equipped with specific peripherals tailored to the required sensors needed for specific applications and platforms. With so many clear advantages and with devices

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and deployable products available now, emerging direct RF FPGA technologies will continue to revolutionize EW architectures. ■

Rodger Hosking is vice president, Mercury Systems

Mixed-Signal.

Rodger has more than 30 years in the electronics industry and is one of the co-founders of Pentek; he has authored hundreds of articles about software radio and digital signal processing. Prior to Pentek, he served as engineering manager at Wavetek/Rockland, and he holds patents in frequency synthesis and spectrum-analysis techniques. He holds a BS degree in physics from Allegheny College in Pennsylvania and BSEE and MSEE degrees from Columbia University in New York.

Mercury • https://www.mrcy.com/

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MOSA,

SOSA, VPX, and power considerations

By Matt Renola

Recent trends in the defense industry show a convergence towards standardizing electronic systems using open standards to increase interoperability, scalability, and reliability; reduce system costs; and minimize the number of custom electronics designs that increase overhead and maintenance.

In 2019, a U.S. Department of Defense (DoD) Tri Services memo was published calling for a MOSA [modular open systems approach] to be used to the maximum extent possible for future weapons-system modifications and new-start development programs. The memo, titled “Modular Open Systems Approaches for our Weapon Systems is a Warfighting Imperative,” specifically cites The Open Group’s Sensor Open Systems Architecture (SOSA) Consortium, in addition to the Open Mission Systems/Universal Command and Control Interface (OMS/UCI), Future Airborne Capability Environment (FACE), and Vehicular Integration for C4ISR/EW Interoperability (VICTORY) standards “as vital to our success.”

What does all this alphabet soup really mean? Are MOSA, SOSA, FACE, VICTORY, and others just more attempts by the government to provide the same framework for oversight within different groups? The answer: The government is trying to provide some guidance with respect to the services (Army, Navy, and Air Force) involved in key weapons development. This MOSA memorandum really announced that there was a need to insure interoperability and commonality across key hardware and software development.

For many years prior, each of the service branches, in cooperation with industry and academia, have undertaken development efforts that have led to many of the working groups including the establishment of OMS/UCI, SOSA, FACE, and VICTORY. These working groups and their efforts have all contributed to the MOSA initiative and driving commonality across future design efforts. Modularity and flexibility

from both a manufacturing and design standpoint enables users to address thermal- management considerations and provides adaptability where standards may deviate. Often customers are trying to move the goalposts and push the boundaries of capability and performance; with a modular approach internally, this flexibility can often be achieved by substitution of one part of another to enable a quick-turn deliverable.

SOSA and VPX power management

VPX (VITA 46) and OpenVPX (VITA 65) are two popular standards that are being adopted rapidly, with VITA 62 providing the guidelines for developing a power supply to support both VPX architecture requirements. The modular powersupply standard includes provisions for redundancy, scalability, and energy storage for systems that may require hold-up. While VITA 62 is intended to

support VPX applications, system designers can implement the modular power supply in applications that are non-VPX. (Figure 1.)

The VITA 62 standard provides guidelines for mechanical packaging, electrical and mechanical interfaces, and communication specifications that a power supply can contain. Most common off-the-shelf VITA 62-compliant power supplies are equipped with six outputs:

› a. VS1 +12V

› b. VS2 3.3V

› c. VS3 5V

› d. AUX1 -12V

› e. AUX2 +3.3V

› f. AUX3 +12V

Outputs VS1, VS2, and VS3 are intended to be high-current or high-power outputs, while the auxiliary outputs are for low power and signal circuitry. VITA 62 power supplies can have different combinations of outputs on VS1, VS2, and VS3 to support VPX applications.

SOSA specifies a power supply with fewer outputs than VITA 62 while heavily referencing VITA 62, VITA 46, VITA 48, VITA 65, and various MIL-STD standards for design guidelines and power and electromagnetic compliance (EMC).

SOSA aligned power supplies only have two outputs, VS1 12V and V(AUX) 3.3V. The VITA 62 standard also defines standard control logic, both analog and digital, for operating the power supply, which increases interoperability and reduces designers’ burden for implementation.

Both SOSA aligned and VITA 62 power supplies can be equipped with two independent I2C communication channels. An optional communication interface is defined in VITA 46.11 utilizing the intelligent power-management interface (IPMI 2.0), commonly used in autonomous computer systems that provides management and control of the power supply.

Power supplies designed around VITA 62 and SOSA have multiple input AC and DC input options with a fixed number of outputs; the classes of power supplies to support open architectures are often categorized by their input voltage.

All power supplies defined by the VITA 62 and SOSA standards have at least two alignment key slots based on their input power characteristics. A 3U power supply with a 16V to 50V DC input cannot be inserted into an application that requires 3U single-phase AC power when the system designer implements keying defined by Tables 4.3.2 in VITA 62.0.

Deployment of any new power solution in a defense application requires meeting various environmental and electrical MIL-STD standard specifications before adoption. VITA 62-compliant power supplies can optionally meet EMC compliance defined in MIL-STDs 1275, 704, and 461, listed in Section 3.2 of VITA 62.0. Testing power supplies in systems can be a multimonth process requiring iterations to the design of the power supply, EMI filtering, or system backplane to pass required EMC standards. VITA 62 and aligned power supplies stand out in the market by guaranteeing all power-supply models comply with the standards listed in their datasheets and are verified at independent certified test labs.

Figure 1 | Shown: 3U and 6U VITA 62 power supplies.

Figure 2a shows a typical VPX power supply two-stage application where stage 1 is a front-end three-phase AC input module coupled with an energy storage hold-up card to provide 50 ms hold up at full power. The first stage provides a single 28V output and is connected to the second stage, a back-end VITA 62 supply where the outputs are loaded at 600 W in aggregate. Calibrated test lab EMI scans in Figure 2b show the entire system passing MIL-STD-461G CE102 EMI scans.

Scalability of power solutions is a cornerstone of open systems architecture standards. To this end, VITA 62 and SOSA standards provide recommendations for power supplies to be paralleled to combine the output capability of their main outputs. Design

standards reserve contacts on the connector interface of the power supply to simplify paralleling power supplies and balance their output current sharing.

Paralleling can be taken a step further by unloading the burden of paralleling from the system architect by facilitating current sharing between supplies without the need for reserved contacts that are dedicated for power sharing between supplies. Conventional VPX power supplies require careful system design and special power supply part numbers to enable current sharing between supplies.

Current sharing between power supplies from Vicor have a proven wireless droop sharing algorithm. Figure 3 shows the VS1 +12V output of a 6U power supply operating in paralleling mode. The output voltage varies with load current while still maintaining its voltage within the VITA 62 limits. The power supplies have been tested with as many as four units operating in parallel for current sharing. (Figure 3 and Figure 4.)

Figure 2b | MIL-STD-461G CE102 EMC scan of a three-phase input line when the outputs of the VIT028x3U unit are loaded at 100%.

Output Voltage Range per

| Output voltage variation shown in parallel and standalone modes.

If the system designer only requires a single power supply in their application, the power supply can be reconfigured through its I2C communication interface on the fly to disable droop sharing, thus achieving better than 1% output tolerance with under variable load.

I2C communication with SOSA aligned and VITA 62 power supplies are defined by the VITA 46.11 standard. Conventionally, a 3U power supply supports four addresses, which are set by the application by pulling address pins to logic high or logic low. 6U power supplies support five addressing pins and a wider

Figure 4 | A stack of four VIT028x6U power supplies can boost system output power capability by 360% compared to a single unit.

Figure 2a | A typical three-phase application is shown.

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Epiq Solutions CMOSS/SOSA-aligned 3U VPX RF and SDR devices offer high performance ideally suited for mission critical intelligence, surveillance, and communications applications. Designed for ground-based and airborne platforms, the Sidekiq VPX400™ and VPX410™ enable multifunction systems to ensure the highest performance for the lowest power.

The Sidekiq VPX410™ is a high channel count 3U VPX RF tuner card, enabling high performance applications up to 18GHz. Supporting bandwidths per channel up to 1GHz and only consuming 20W, the VPX410™ is an ideal RF tuner for SWaP constrained platforms.

The Sidekiq VPX400™ is a modular, multi-channel 3U VPX SDR solution built around the Sidekiq X4 that enables rapid deployment of converged multifunction platforms while reducing slot count requirements, power consumption and engineering-related costs.

The Sidekiq VPX410™ and VPX400™ are both CMOSS/SOSA -aligned 3U VPX cards and are available as open architecture software & FPGA devices, or as MORA RF distribution and payload devices.

range of possible I2C address assignments. In a single VITA 62 power-supply application, the system designer can now ignore (No Connect) the I2C pins and communicate with the single power supply on address 0x20.

Another advantage in deploying a modular power supply in an application is the ability to have fast start up times by default or customizable start up times and sequencing. In single-stage back-end power-supply applications, the power supplies are capable of 200 ms startup on all outputs for applications that require it. (Figure 5.)

VITA 62 and SOSA aligned power supplies are designed to be modifiable at the factory to vary the output voltage as well have different output voltage combinations that are not part of the standard offering for a variety of applications. (Figure 6.) By using a modular approach internal to the packaging, the user can usually provide changes to output voltages or power levels in short order. ■

Matt Renola is Senior Director, Global Business Development –Aerospace, Defense and Satellite Business Unit at Vicor. Matt has been with Vicor for 15 years and has been responsible for managing the Vicor sales teams and global accounts in all of Vicor’s main vertical markets. He has more than 30 years of technical sales and marketing experience and has also worked for major OEMs including Artesyn Technologies, Emerson Network Power, and Vishay Intertechnology. He has an undergraduate degree from Boston College and an MSE from the University of Pennsylvania.

Vicor • https://www.vicorpower.com/

PWR is an industry leader in the design, simulation, development and manufacture of advanced cooling systems and components. Liquid flow through cold plates for electronics cooling is a key area where PWR continues to develop innovative manufacturing solutions using CAB brazing, vacuum brazing, and additive manufacturing methods, scaling from prototypes to high volume production. PWR has experience with VITA 48 advanced cooling solutions as well as bespoke designs for power electronics, high-performance computing, battery and avionics cooling applications, utilizing a wide range of cooling fluids.

PWR global facilities in the USA, Australia and the UK have accreditations for AS9100, IATF 16949, ISO 9001 and NADCAP. PWR is ITAR registered as well as having experience with export controls.

PWR collaborates with customers to optimize performance, size, weight, and flow characteristics of the various solutions and has the necessary resources for design, manufacturing and testing.

www.pwr.com.au

Figure 5 | In single-stage back-end power-supply applications, default is 200 ms startup on all outputs.

Figure 6 | Power supplies can be customsequenced at the factory for a different application.

Multi-INT and SOSA: A consideration of next steps

By Patrick Collier and Denis Smetana

Multiple intelligence (Multi-INT), sometimes referred to as multi modality, is a popular term used in recent years to describe C5ISR [command, control, computers, communications, cyber, intelligence, surveillance, and reconnaissance] applications in which data obtained from disparate sensing sources is fused together to derive new information and operational insights. In some cases, this can mean the fusion of SIGINT [signals intelligence] data and radar data, or SIGINT data with EW [electronic warfare] data and EO/IR [electrooptical/infrared] data. In other cases, it may mean combining real-time data with post-mission analysis from previously processed data. Additionally, there are approaches where artificial intelligence (AI) and machine learning (ML) assist via data and information analysis to identify patterns or predict outcomes.

With the U.S. Department of Defense (DoD) push for modular open systems approach (MOSA)-based architectures, there is strong intent to leverage that proper level of modularity from standards like the Sensor Open System Architecture (SOSA) to enable common building blocks to support multiple mission types, adding an extra dimension to multiple intelligence or Multi-INT.

One of the key tenets of Multi-INT or multi modality is that the architecture by its very nature is realizable through the core components of a sensing system which can accommodate more than one mission at the same time. This means when disparate mission modalities operate simultaneously (or in series), the system can gather data from those modalities and process it for actionable intelligence (It is worth noting that the core components of the sensing system could include hardware level plug-in cards [PIC], software [application software, for example], front-end sensing apertures, and some manner of system management and task management).

SOSA as an enabler of Multi-INT

With MOSA in mind, from the technical and business acquisition perspective, and SOSA as an enabler of MOSA for something like Multi-INT, we see that the SOSA Reference Architecture (RA) is fundamentally well positioned to help realize the potential of Multi-INT applications. This is evident from some of the SOSA products, such as the logical building blocks (SOSA modules) and the SOSA taxonomy that make up the SOSA RA (as seen in Figure 1 and Figure 2, respectively).

Figure 1 is the core of the SOSA RA. This RA is described, and in so doing, is encompassed, by modules and interfaces; where each module exhibits functions and behaviors; and interfaces, both logical or physical in nature. The SOSA Consortium was deliberate in its development of these modules and interfaces to ensure independence and low (or loose) coupling. (“Low coupling” means that changes in one of the modules will not impart changes to the others.)

From the SOSA RA technically oriented architecture principle number 13, in section 3.2.2 of the SOSA Technical Standard v1.0, we see the SOSA modules exhibit these criteria:

› Severable (can be separated and used elsewhere) – based on business needs, timing requirements, or other drivers

› Has minimal complexity interfaces (minimum interdependencies)

› Can operate as stand-alone or be operated via function/process/ system manager

› Is independently testable

› Does not expose IP

› Facilitates competitive procurement

› Encapsulates rapid change

In Figure 1, we see the potential for how one could envision and subsequently develop any type of sensing system, either for single mission modality or Multi-INT. These logical building blocks, the SOSA modules, enable a variety of implementation types.

The importance of this perspective is furthered when we look at the SOSA Taxonomy (Figure 2). That’s because SOSA isn’t solely a set of logical building blocks (i.e., the SOSA modules): it is also a set of infrastructure building blocks. These include items like hardware elements (PICs [peripheral interface controllers], apertures, or connectors), software runtime environments, or interaction infrastructures, all things used to create capability with SOSA modules. From this we see what SOSA has ultimately accomplished: SOSA has created a sandbox of, to repeat, building blocks (tools) for the developer and end user.

Let’s take a closer look at some of those infrastructure items on the right of the SOSA taxonomy (Figure 2). One example, which is one of the more mature pieces of SOSA, is the hardware element PICs. As we evolve from single INT to Multi INT, we see how current architectures like SOSA and CMOSS [C5ISR/Electronic Warfare Modular Open Suite of Standards] potentially enable single-sensing capabilities on a per PIC basis. Alternatively, they enable the use of multiple types of cards (i.e., FPGA [field-programmable gate array], GPGPU, processor) in a common backplane profile, thereby enabling mission flexibility by swapping out card types.

An example of potential growth from component to system with these SOSA hardware building blocks is shown in Figure 3. For SOSA, these hardware building blocks (the PICs) are the proper level of modularity when one contemplates their use in either single INT or Multi-INT systems. These building blocks were developed for both current and future needs.

Another important piece of SOSA infrastructure is software, whether this is application software (from a SOSA module perspective) or software runtime environments (RTEs). Within SOSA there are three RTE options: FACE, virtual machines (VM), or containers. These SOSA RTEs provide an execution environment for SOSA modules (these are the logical entities used in SOSA to develop capabilities), which a system designer can implement as portable software (FACE), containers, or VM.

The way these run time environments are built, based on the SOSA standard’s use of modules, is that capability can be developed that encompasses both software and hardware. It should be possible for contained pieces of software to have correct, welldefined interfaces with which the system designer knows how to interact. That makes

Figure 1 | A diagram shows the SOSA taxonomy.

Figure

| A diagram shows the SOSA modules.

it possible to take a piece of software from one place, such as from a card or some other hardware element, and perform the required configuration needed to support Multi-INT operations.

This is the big challenge: to understand how the data from multiple modalities interact. If a system is put into operation with one modality, and we want it to work simultaneously with another modality, it’s essential to know if the same system infrastructure, not just the cards, is able to support that, including all the front-end hardware. This consideration is important, as the front-end hardware includes front-end sensors that may have certain frequency-bandwidth or dynamic-range limitations.

While the DoD’s goal is to have plug-and-play system building blocks, it’s not clear if that model will enable system designers to reuse modules in another application, such as Multi-INT, without making any modifications. To minimize NRE [non-recurring engineering costs], it’s ideal that software is developed so that it’s both adaptable and can be moved from one place to another.

System design has evolved from discrete systems based on individual modalities to where it stands now, with individual modalities supported at the card level – including software and everything else that goes along with it – in order to deliver a capability. In the future, with Multi-INT, it will be possible to integrate more than one modality onto a single card, with all of the associated software based on SOSA modules. Some of the fundamental pieces are now in place, but what really needs to happen to drive Multi-INT system design is an understanding, including all the specifics, of how to interact between modalities.

Where it stands now: The modality focus is at the card level. With that in mind, commercial off-the-shelf [COTS] vendors need to make sure that their PICs have the right interfaces to move the types of data and information in and out of their card and into other cards associated with a particular modality. Another thing for COTS vendors to consider: whether they have the right infrastructure to support two modalities on the same card now. COTS vendors should reach out to their customers to ask if they are thinking about Multi-INT and whether they have any architecture considerations in mind now.

SOSA brings the benefits of open standards to sensor system design. It also enables migration of applications between domains, such as from ground to airborne platforms. The intent for standards is that they provide building blocks with well-defined open interfaces, and the interfaces determine what’s needed to be able to talk and interact with a particular building block. That makes it easier for an end user to build a system using those building blocks, and then to build a completely different system using those same building blocks. In the case of SOSA, while various domains – air, ground or sea – may embrace the SOSA interfaces, there may still be constraints that prevent the migration of an application from one domain to another, such as size and power limitations.

Ideally, it will be possible to take any SOSA card and use it on any platform:

Figure 3 | A diagram shows the SOSA hardware building blocks.

COTS VENDORS SHOULD REACH OUT TO THEIR CUSTOMERS TO ASK IF THEY ARE THINKING ABOUT MULTI-INT AND WHETHER THEY HAVE ANY ARCHITECTURE CONSIDERATIONS IN MIND NOW.

for example, an EW card and its application that are used in an Army ground platform could also be used in an Air Force airborne platform. What needs to be considered ultimately: Whether that model will be simple, or if there are other considerations involved when going from one physical type of platform to another, with both platforms operating in different domains but using the same modality. Will one platform have certain constraints that another platform doesn’t? There will be some cases where the physical space is limited, where the space is too small or there

were previously discrete instances can migrate into complex systems. While every community within SOSA has its own perspective – whether government, COTS suppliers, system integrators or academia – the SOSA Consortium model enables all of those perspectives to come together in one room where all the different communities can listen and interact with each other. By coming together, all the varied communities can work to evolve the standard and define the next building blocks needed to make Multi-INT a reality. ■

C. Patrick Collier – cofounder of SOSA and chair of its Hardware Working Group – is an open systems architect and systems engineer at Aspen Consulting Group. He was a lead hardware engineer at NAVAIR, where he focused on developing the Hardware Open Systems Technology (HOST) set of standards. Patrick also founded and is currently chair for the VITA 78 (SpaceVPX) and VITA 78.1 (SpaceVPXLite) efforts.

MOSA systems: The benefits of deploying a datacentric architecture

By Andre Odermatt

A modular open systems approach (MOSA) – the method recommended by the U.S. Department of Defense (DoD) for the implementation of open systems – uses a decoupled system architecture that enables components to be incrementally added, removed, or replaced throughout the life cycle of a platform, providing opportunities for enhanced competition and innovation.

The U.S. Department of Defense (DoD) recognizes the importance of data and considers data as a strategic resource. A datacentric architecture is uniquely able to accomplish this goal because it not only enables systems to be decoupled and independent from each other, but also focuses the systems on the data itself. This approach supports both MOSA [modular open systems approach] and DoD data strategies. A datacentric architecture makes data the common element for systems to act on and consume, while also producing data that other systems can use such as uncrewed aircraft system (UAS) payloads generating ever increasing amounts of intelligence, surveillance, and reconnaissance (ISR) data.

A datacentric architecture can be achieved by using open standards, which are at the core of MOSA. Current DoD standards, including the Future Airborne Capability Environment (FACE) Technical Standard, already embrace a datacentric architecture by emphasizing the importance of data. For example, the FACE approach encourages the use of a data model and requires FACE Units of Conformance (UoCs) to have a well-defined data model that can provide the structure to communicate through the Transport Services Segment (TSS) of the FACE architecture.

A datacentric architecture is an excellent use case for a publish-subscribe architecture, based on the open Data Distribution Service (DDS) standard, which also emphasizes the importance of data. Individual systems declare the intent to subscribe to data or advertise the data they have to offer. The publish-subscribe protocol then matches publishers and subscribers with each other and makes sure the data gets to the right

place at the right time. New participants can join at runtime without the need for code modifications, enabling rapid updates and technology refreshes using the existing data architecture.

Datacentricity and the system

Most software developers and system architects take an application-focused view on defining systems. They start off with defining the applications which are needed in a system (e.g., a GUI, processing, and the like). The next step is defining what the interfaces should be, and what is needed by each application. The interfaces keep evolving as new functionality is added and in most cases requires additional information. However, what really matters is the data, not the application; the application is simply a way to display the data of interest. The same data is as important if it is displayed in a different application.

Implementation of a modular open systems approach (MOSA) on uncrewed aircraft systems (UASs) are intended to enable multiple new standards for command and control, Future Airborne Capability Environment (FACE), Open Mission Systems (OMS), Universal Armament Interface (UAI), and a vehicle for segregating the flight/mission systems’ hardware and software. Photo courtesy General Atomics Aeronautical Systems, Inc. (GA-ASI).

For example, revenue numbers can be viewed in Excel, Word, Notepad, Vi, etc. The way the application displays the data may make it easier for the user to understand; however, the data – and not the application – has the key information and not the application. The information is in the data. (Figure 1.)

In contrast, datacentricity puts data at the center of the architecture; in other words, data is the primary asset of the system. (Figure 2.)

Realizing the importance of data, FACE requires a data model which provides a standard method for defining the data

format and meaning for informationsharing between software components (e.g., FACE Unit of Portability (UoP)). The FACE data architecture is a key component of the FACE approach and is essential to designing systems and developing interoperable UoPs.

The DoD is rapidly transitioning to a datacentric enterprise. Datacentricity enables decision dominance at the speed of war and supports DoD efforts such as Joint All-Domain Command and Control (JADC2) that integrates sensors to command and control (C2) to effector systems across different operational commands, from the tactical edge to the

cloud. This aligns exactly with the DoD Data Strategy announced in September 2020 that directs DoD leaders to evolve all DoD assets into datacentric assets that treat data as a weapon system.

In a datacentric system, the design starts with the data model. What data do I need, and how will it be represented? Different components can access shared data and communicate through shared data. Access rules can be put in place so only allowed and authenticated users can access the data. Since the data scheme is defined and all applications act on the same data, integration of new components is minimal and in most cases no data transformation is required. An example of a datacentric architecture is a database architecture. A common database schema is created and accessed through a defined protocol. Another advantage of this approach is that there are no dependencies between applications as the applications do not directly communicate with each other. All communication is done through accessing (reading or writing) data.

For a real-time system, it is not practical to exchange data by writing and reading data into a central database. In addition to the latency, the database server would be a single point of failure. To facilitate communication in a real-time system, the DDS standard, managed by the Object Management Group (OMG), was developed. DDS not only supports a datacentric architecture; it also uses a simple publish-subscribe paradigm. As was established earlier, a datacentric approach focuses on data and has a data model. DDS requires a data model and is aware of the data being exchanged. In addition, the publish-subscribe paradigm with the discovery feature allows new applications to subscribe or publish any of the data defined in the data model.

The benefit of the publish-subscribe system is that the application does not need to know where to send the information or from where to request the information. To illustrate this, look at a classic message system similar to email: As a participant, I must email a status

Figure 1 | An application-centric approach to a system is shown.

Figure 2 | A datacentric approach to architecture is shown.

report every week, I need to know whom to send it to, and I need to list all the recipients. If there is a new person who is also interested in the weekly status email, that person needs to let me know so I can add the address to the future status-report emails.

Publish-subscribe works more like social media, where I post my status and whoever follows me receives the update. If a new person is interested in the status, that person can follow (subscribe) to my status and automatically get the updates. I do not need to know how many followers I have. All I do is post (publish) my status update. DDS has another advantage: Since it is datacentric, I can apply filters on any of the data elements. Instead of getting a notification of every new status report, I now get updates only when a filtering criteria is met. Instead of getting every status report, I only get the status reports which have relevant information. The filter criteria can be changed at any point if the data of interest changes.

The Data Distribution Services (DDS) standard

Let’s take a closer look at DDS. The DDS standard is a set of standards which define the application API as well as the real-time publish-subscribe (RTPS) wire protocol that enables a transport-agnostic, open standards-based capability to rapidly connect applications from a wide range of programming languages, operating systems, and computing platforms. DDS enables the user to separate transport from the application logic. The DDS standard currently includes the following:

› High-performance, scalable, secure, and datacentric publish-subscribe abstraction.

› Completely decentralized architecture with dynamic discovery service that automatically establishes communication between matching peers.

› Rich quality of service (QoS) characteristics for control over every aspect of data distribution, such as data availability, resource usage, reliability, and timing.

› Interoperable data sharing, platform-independent extensible data modeling, encoding, and representation.

› Recent extensions for remote procedure calls (RPC), security, resource-constrained devices, web integration, and OPC UA integration.

DDS provides data-sharing that is controlled by QoS policies. Applications communicate by publishing and subscribing to DDS topics identified by their topic name. Subscriptions can specify time and content filters and receive a subset of the data being published on the topic. Different DDS domains are completely independent of each other, as they do not share any data communication. In the case of UDP, this is achieved by using separate ports for each domain. There is no data-sharing across DDS domains. Figure 3 is an example of DDS communication using a single domain.

• Wideband Tuners and Transceivers

• Industry Leading Channel Density

• 4 Channel Independent and Phase Coherent Tuning

• Bandwidths up to 2000 MHz

• Seamless Integration for Land, Sea and Air Platforms

• EW/SIGINT/Comms Applications

• 3U VPX MORA/SOSA compliant SDR platforms

DDS participants can be on the same machine or across a network. In either case, the application uses the same DDS API for communications. Because there is no need to know or configure IP addresses or consider the differences in machine architectures, the process of adding additional communication participants on any operating system or hardware platform becomes an almost trivial task.

How DDS and datacentricity support MOSA

MOSA is a technical and business strategy for designing affordable and adaptable systems. The five principles of MOSA are:

1. Establish an enabling environment

2. Employ modular design

3. Designate key interfaces

4. Use open standards

5. Certify conformance

The first principle of establishing an enabling environment is really a business practice which supports the program manager in deploying MOSA throughout the acquisition life cycle.

MOSA requires a system architecture that allows several major system components at the appropriate level to be incrementally added, removed, or replaced throughout the life cycle of a major system platform, to afford opportunities for enhanced competition and innovation. Using a datacentric approach addresses principles two and three. A datacentric architecture inherently enables a module design as all components access a common set of data which also serves as the interface description. Creating a data model or using a standard data model is the foundation of a successful datacentric MOSA system. This can be a separate domain-specific data model or can be part of a specification (e.g., UMAA [Unmanned Maritime Autonomy Architecture] or ROS [Robot Operating System libraries]).

interoperable which streamlines product development. Many of the open standards have multiple revisions and have improved from lessons learned over time. Using open standards is much more cost- and time-effective than new development. DDS is an example of an open standard that fits perfectly in many of the MOSA applications. The DDS standard has an active and vibrant community continuously working to extend its applicability (Figure 4). The DDS standard currently includes the following:

› Core specification (DDS, RTPS, DDS- XTypesTM, DDS-SECURITY)

› Language mappings

› APIs: C, C++, Java, and others

› Gateways (XRCE, Web, OPC)

DDS is also used in many other standards including FACE, UMAA, ROS, and GVA. Figure 5 shows some of the standards where DDS is used.

DDS use cases

DDS and RTPS packets are used for mission-critical applications, connecting embedded systems as a reliable communication layer between sensors, controllers, and actuators. DDS runs many of the most complex systems in the world: It powers the largest energy plants in North America, connects perception to control in autonomous vehicles, coordinates combat management in defense systems, drives a new generation of medical robotics, controls hyperloop and flying cars, provides 24/7 medical intelligence

Using open standards is another key principle. With open standards, application developers are not locked into a specific technology or vendor. The market decides which technologies are the most viable. Open standards establish protocols and building blocks that can help make applications more functional and Figure

4 | A timeline of individual data distribution services (DDS) specifications is shown.

Figure 3 | A diagram shows the datacentric Publish-Subscribe approach.

for hospital patients and emergency victims, and more.

At the TSOA-ID 2022 conference, RTI demonstrated interoperability between different native DDS applications (e.g., Unity and Epic Games Unreal Engine) and standards using DDS (e.g., FACE, ROS). The demonstration consists of two drone simulators: one using the Unity gaming engine, and the other using the Epic Unreal Engine gaming engine. These drone flight simulators publish location, video, and lidar using the Sensor Open Systems Architecture (SOSA) Interaction Binding and publish data through a SOSA aligned plugin. The lidar data is displayed using the RVIZ, a ROS 2 application, while location is fed into different cockpit display systems (CDSs). Figure 6 shows the architecture of the demonstration. The integration of all those components was made possible by using a common data model. New components can easily be added, and variations of the demo have been demonstrated at different trade shows.

MOSA: No more vendor lock

MOSA recognized that to reduce cost, time to market, and to develop better, more flexible solutions, it must embrace open architectures. The era of black box and vendor-locked technologies has ended, and the industry must embrace open standards in all types of software ranging from commercial off-the-shelf to open source. MOSA is not just an innovative idea, it is a legal requirement – specifically, Title 10 U.S. Code 2446a.(b), Sec 805 of DoD Acquisition Regulations – to achieve the development of affordable, adaptable systems.

It has been a few years since the DoD Data Strategy was created, and the DoD continuously makes strides toward its goal of transforming into a datacentric agency. To support that transition, new systems also need to embrace a datacentric strategy. Open standards such as DDS will become an essential part in supporting the DoD’s transition to a datacentric world. A datacentric open standard such as DDS enables the fundamental step for designing, developing, and deploying next-generation,

distributed mission-critical systems and supports the MOSA principles of achieving lower life cycle costs in deployment and maintenance, faster time to market, and improved reliability during deployment in crewed and uncrewed systems. ■

Andre Odermatt is a principal application engineer at Real-Time Innovations (RTI). Before joining the Products & Markets group at RTI, Andre was a field application engineer at RTI for five years, working closely with customers on distributed systems. He has been participating in the FACE Consortium Integration Workshop Standing Committee (IWS) meetings for years. As a Field Application Engineer, he supported multiple projects such as the Ship Self Defense System (SSDS), General Atomics Ground Control Station, and Boeing AWACS, among others. Andre has over 30 years of experience with embedded systems, distributed applications, and communications protocols. He is an active participant in the FACE Consortium TWG Transport Services Segment (TSS) technical working group. Andre is the chair of the FACE integration workshop (IWS) standing committee.

Figure 5 | Shown: Some of the standards where DDS is used.

Figure 6 | The architecture of the TSOA-ID native DDS interoperability demo is shown.

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SOSA’s rubber is meeting the road in rapid system development

By Travis Doll and John Orlando

Using SOSA aligned components, a complete software-defined radio (SDR) solution was created for a TSOA-ID event in a little over two weeks, representing up to a 10-time reduction in cost and schedule compared to solutions developed without the use of well-defined open standards. It’s an open road for the development of improved technologies in military and defense applications.

The Open Group’s Sensor Open Systems Architecture (SOSA) Technical Standard 1.0 was released in September 2021, after almost three years of collaboration between the U.S. Department of Defense (DoD) and more than 100 manufacturers of embedded hardware and software. The resulting SOSA Technical Standard promotes portability and reuse of sensor components by defining hardware, software, and interface standards. For RF and SDR [software-defined radio] payload card vendors, this also means complying with the Modular Open Radio Frequency Architecture (MORA) specification to ensure their VPX cards can be successfully utilized as envisioned by SOSA.

Of the many steps to test and validate interoperability in a SOSA aligned system, the point at which system designers start

thinking about how they will command and control a device from the outside world makes up a crucial piece of the puzzle. This integration requires implementing various MORA and Vehicular Integration for C4ISR/EW Interoperability (VICTORY) interfaces that enable other components to discover the hardware and “talk” to it for command and control, data ingest and egress, health and status, and then determine its capabilities.

Stop spinning wheels

Most hardware vendors focus on the mechanical and electrical requirements defined by the SOSA Technical Standard, whereas software companies tend to focus on the interface requirements of the card being created. It’s just the natural delineation to play to each side’s core competencies. Thanks to open standards initiatives like SOSA, more hardware and software companies are collaborating during the development process. The result is that engineers are confident that at the end of the hardware development cycle they will know what is required to fully integrate the card into a SOSA system.

Collaboration among hardware and software developers means ensuring that the time and resources to upkeep the implementation of open standards-based interfaces, including MORA, in software and firmware can be shared and allocated appropriately. Such sharing typically enables internal hardware-development teams to focus more on product innovations and applications.

Shift things into gear

The common goal of open systems standards development is interoperability among platforms, systems, and related components. Validating interoperability can manifest itself in different ways. There are companies working collaboratively to develop mechanisms utilized in a broader sense across the industry, as well as physical demonstrations and testing held at events like the Tri-Service Open Architecture Interoperability Demonstration (TSOA-ID). Such was the case for Sciens Innovations and Epiq Solutions coming together.

Because they were both members of SOSA, Sciens Innovations and Epiq Solutions knew of each other for years through the SOSA community. Sciens’ reputation for implementing MORA aligned software and firmware within the DoD tied in nicely with Epiq Solutions’ growing line of SOSA aligned SDR hardware.

After discussions, Epiq Solutions and Sciens Innovations decided to create a demo that would show the realization of leveraging Sciens’ MORA software layer on top of Epiq Solutions’ hardware for a live demo at an upcoming in-person TSOA-ID. Creating and demonstrating an SDR product and streaming the results in real time would fully utilize Epiq Solutions’ competencies as an embedded SDR card vendor and Sciens’ abilities as a software and firmware development team, a natural pairing of capabilities. (Figure 1.)

Sciens used its helux tool kit, developed to fit a specific need in the development of SOSA aligned systems, which would enable the discovery, command, and control of Epiq Solutions’ Sidekiq VPX400. The SOSA aligned Sidekiq VPX400 is a wideband RF card with multireceive and multitransmit capabilities, which would serve as the SDR for the demonstration.

During the TSOA-ID demonstration, this SDR card was able to ingest 800 MHz IBW [instantaneous bandwidth], search for signals of interest, then reconfigure on the fly to find a signal and transmit in that signal range. Without the SOSA standard, this level of integration between hardware and software would typically take several months to bring a demonstration together. By leveraging the MORA specification defined within SOSA, that timeline was reduced to a few weeks.

From zero to 60

From start to finish, the demo was created, tested, and showcased in just two and a half weeks. Along with the hardware-agnostic helux tool kit from Sciens, it included the four main components found in a typical signal-processing system:

› SDR (Epiq Solutions’ Sidekiq VPX400)

› Single-board computer/SBC (connected over 1 GbE and 40 GbE)

› SOSA/CMOSS VPX chassis

› User interface

Prior to MORA and SOSA, each component would have had to have its own documented interface specifications defining the architectures a specific interface connects to, capability discovery of each component, and configuration of available resources. For example, in the absence of standard interfaces, the virtual knobs of the SDR would need to not only be manually searched for, but the definitions of how the knobs could be configured and to what ranges would also be required.

Then comes the arduous task of ensuring the specifications meet the requirements, with the possibility of discovering – many, many hours into development – that the multiple specifications coming together yield a shortage of spectrum range capability, for example. Simply transferring RF signal metadata between two components had a high chance of not aligning due to specification incompatibility, resulting in loss of information and system functionality.

Using Sciens’ helux reference design to provide MORA 2.4 enabled interfaces for Epiq Solutions’ Sidekiq VPX400, the tedious and manual error-ridden processes associated with assembling a standardized SDR card were eliminated, a testament to SOSA’s principles put into practice.

The Sidekiq VPX400 RF transceiver represents a single card that can be configured for many different operating modes. The SOSA primary RF payload slot profile (14.6.11-4) that the VPX400 uses automatically ensures the card’s compatibility with the system into which it is being plugged in. As such, the card becomes immediately functional from an electrical and mechanical standpoint and supports the basic interface requirements of a SOSA RF payload module. (Figure 2.)

Additionally, MORA provides the standardized resource discovery, capability profile, management, control, data, and context messaging transported over an Ethernet VICTORY Data Bus (VDB) and Ethernet MORA Low Latency Bus (ML2B). So a MORA board support package (BSP) enables standardized access and control of the RF chain on an SDR payload card

Figure 1 | The signal-processing solution was developed in 2.5 weeks for TSOA-ID 2022

such as the VPX400. The Sciens Innovations’ MORA Explorer application running on a separate SBC was used to interface to the VPX400 over VDB and ML2B and provide easy control and observability of this MORA resource.

Turbo-boost system development

Using a hardware-agnostic, holistic MORA toolkit provided the software and firmware foundation, the tooling for demonstration, and the support system to keep the project successful and compliant, while facilitating rapid development. The helux tool kit includes software implementations of MORA/VICTORY interfaces, HDL modules for framing, filtering and arbitration of MDM/UDP [Mobile Device Management/User Datagram Protocol] packets, and tools to facilitate end-user interaction and demonstration of SOSA hardware. (Figure 3.)

This approach substantially reduced development time, which will ultimately affect market-entry cost by offloading the risk and financial commitment required for each SOSA hardware vendor to assemble their own MORA software/firmware team. With the common software/firmware integration requirements already handled, hardware vendors can focus on better capabilities for their hardware and the SOSA physical hardware requirements. The result: A far more efficient approach and a more stable solution given that the tool kit supports many cards.

Spot the checkered flag

Eliminating integration errors is only one aspect of what the SOSA standard provides. For decades, system designers have had to work in the space between being restricted to having one payload slot for each sensor, creating large and cumbersome products, or limiting sensor functionality to get a smaller form factor. Success in balancing these demands for increased sensor functionality with smaller sizes has varied.

The versatile specifications defined by SOSA standard slot profiles end the tradeoff between more features/large size and a small form factor. Developers can pack many functions and features onto a single card, while facilitating data transmission across interfaces for use by other components of the signalprocessing system. Leveraging this versatility is one of the benefits outlined in the joint Sciens Innovations and Epiq Solutions demo system.

Putting the SOSA Technical Standard 1.0 into practice is showing real-world benefits, with expedited development cycles through proven interoperability demonstrations that are helping facilitate the adoption of SOSA and MORA by members of the military embedded community. The open standards approach results in greater availability of compliant hardware for the DoD to choose from as they try to meet their mission needs. ■

Travis Doll, Ph.D., the CEO and president of Sciens, is a software engineer specializing in digital signal processing. Dr. Doll earned both his Ph.D. and master’s degree in electrical engineering from Drexel University in Philadelphia. During his graduate years, Dr. Doll was awarded two National Science Foundation Graduate Teaching Fellowships to develop and implement STEM education within the Philadelphia school system.

John Orlando is CEO and co-founder of engineering company Epiq Solutions. He is an author and presenter on all things SDR, most recently presenting at GRCon 2021 on “Breaking through the 6 GHz Barrier.” He has a master’s degree in computer science from the Illinois Institute of Technology (Chicago) and a bachelor’s degree in electrical engineering from Rose-Hulman Institute of Technology in Indiana.

Figure 3 | The reference design in the helux software and firmware tool kit helps users avoid the manual processes associated with integrating a standardized SDR RF payload card into SOSA aligned systems.

Figure 2 | Block diagram shows the layout of Epiq Solutions’ SOSA aligned SDR RF payload card.

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AI, open standards to play key role in future SWaP designs for UAS payloads

By Dan Taylor

The uncrewed aerial system (UAS) industry faces constant pressure to reduce the size, weight, and power (SWaP) requirements for the payloads they carry. Those pressures often conflict with the mounting datagathering and bandwidth demands of these systems. Open standards – along with artificial intelligence (AI) and advanced machine learning (ML) technologies – will be key to development in the military UAS arena.

Regardless of whether they operate on the ground, in the air, or at sea, many autonomous system payloads act as sensor platforms for intelligence, surveillance, and reconnaissance (ISR) and other applications. ISR requirements call for more and more capability in the same footprint, placing immense pressure on sensor system designers to reduce the size, weight, and power (SWaP) footprint for the payloads.

Suppliers currently are pushing the limits due to the increased rate of change in the market, as component size and power increases dramatically – meaning increases in heat – which makes it harder to fit everything into a typical 3U form factor, let alone cool them, says Mark Littlefield, senior manager of embedded computing products and system solutions at Elma Electronic (Fremont, California).

Also impacting these designs is the “rapid increases in interboard and system I/O [input/output] communications performance, and the speed of adoption of these highperformance protocols,” he adds. “The density of processing and high-bandwidth

pipes between modules is really what is enabling the autonomy.”

Engineers at Omnetics (Minneapolis, Minnesota) – which builds connectors for use on spacecraft and UAS platforms – have seen this trend in the satellite market as well. “You’re getting to the point where you’re looking at putting more in a smaller form factor,” says Scott Unzen, the company’s director of marketing and market development. “The ability to do that and meet shock, vibration, and G forces is harder and harder.” (Figure 1.)

The new configuration of the Raven R-11B small unmanned aircraft system with gimbal payload enables day and night operations and gives the operator a nearly 360-degree view around the aircraft. U.S. Army photo/Sgt. Garett Hernandez.

When it comes to satellites [and autonomous systems], there has been exponential growth in capabilities such as geopositioning, vision systems, and data transfer. All of this means more data, Unzen says. “The biggest thing they’re looking for is data throughput,” he says.

This demand for data throughput creates challenges must be met by the industry. Dan Mor, director of the video and GPGPU [general-purpose graphics processing units] product line at Aitech Systems (Chatsworth, California), says SWaP constraints require creative solutions to satisfy continually rising data needs.

“Companies must operate within strict constraints when it comes to SWaP, despite the reality of users having a huge amount of data to process due to highresolution cameras and high-bandwidth raw data,” Mor says.

“This means that we need to find high-performance processing units with low power consumption,” he adds. “The ability to process big amounts of data with a high PPW [performance-per-watt] push is by using a parallel-computing architecture in order to offload calculation from the CPU to [artificial intelligence] and parallel-enabled GPU architecture.”

The primary task for Mor’s team is to ruggedize and cool down high-performance units in a very small envelope and keep them running at full performance, he says. To do this, a company must address all aspects: hardware, software, and mechanical design. that is where open standards come in – the open approach makes it easier for companies to address SWaP in a holistic fashion.

MOSA and SOSA have changed the game

The migration of reduced-SWaP design to open standards as derived from the Modular Open Systems Approach (MOSA) and the Sensor Open Systems Architecture (SOSA) has changed the industry substantially, with companies focusing more on designing products within the context of a defined architecture rather than creating proprietary, closed solutions, Littlefield says.

Ultimately, it is in a supplier’s best interest to follow these standards rather than go the proprietary route, he argues.

“The most successful component suppliers and system integrators are those who embrace the standard and leverage the tools and strengths that it provides,” Littlefield says. “Fighting the standard, or trying to circumvent it, may give a marginal benefit, but is detrimental to overall ease of system integration and makes eventual technology insertions far more difficult. That change in focus from ‘doing things my own way’ to ‘doing things within a defined architecture’ is already having a real impact on our community.”

Littlefield notes that not only has he noticed more requirements for SOSA in payload and control systems, but he has also come across people asking for SOSA alignment, even though they may not actually require it. He adds that SOSA has become a valueadd for customers that results in easier integration and long-term maintenance.

Mor has also noticed a shift toward SOSA conformance in the industry: “SOSA means interoperability, and the ability for the integrator to quickly replace any system board from one vendor to another,” he says. “This interoperability creates tight competition between rugged-boards providers and pushes them to develop competitive advantages to differentiate them from other boards manufacturers.

“It’s becoming a ‘must-have’ for many projects,” he adds.

Figure 1 | Examples of two Omnetics Nano-D connectors, which are designed for small-formfactor applications in extreme environments. (Photo courtesy Omnetics.)

SOSA isn’t the only source of open standards getting increased attention in an industry focused on improving efficiency and lowering costs in the area of reducedSWaP designs. Littlefield says he has seen interest in integrating safety-critical aspects like ISO 26262 into MOSA and SOSA – although he notes that there is nothing concrete in this area yet.

“It’s clear that people are starting to think about applying SOSA to the problem of vehicle autonomous control, and perhaps even leveraging common computing and sensing resources for both the autonomy and mission-sensing problems,” he says. “It’s early days, though, and it’s not clear if that trend will continue – there are good reasons to keep those two domains separate.”

AI and ML enable reduced SWaP

Open standards are just one part of the equation. To achieve further gains in reducing SWaP, the industry is increasingly turning to artificial intelligence (AI) and machinelearning (ML) technology to help drive more performance despite the reduced power.

With the continuing development of new, advanced threats and growing geopolitical tensions (the war in Ukraine being a prime example), edge computing using AI and communications technologies will gain traction in the market moving forward, Mor asserts.

“Platforms need not only high-performance, SWaP-optimized systems for image and video processing at the edge, but also AI that handles object recognition, classification, and tracking and networking for deterministic communication and real-time decision-making,” he says. (Figure 2.)

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Is your Military AI Program Driving into a Dead End? By One Stop Systems (OSS)

Military program leaders in charge of transportable artificial intelligence (AI) missions can avoid painful and costly AI performance compromises when leveraging open standards such as VPX/Open VPX and SOSA. How? Standards-compliant sensors and sensor interfaces can be partitioned as part of the AI system design.

Learn how this approach simultaneously allows program leaders to fully exploit switched fabric standards with the most advanced GPUs and flash storage, along with advanced system cooling approaches, to maximize AI performance in field applications.

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The electro-optical sensors and cameras mounted on an uncrewed aerial system (UAS) or ground vehicle can capture real-time footage from the battlefield, enabling warfighters to zoom in on specific areas of interest. From there, SWaPoptimized embedded computing systems using AI edge-computing capabilities could send the video footage to the warfighter, perform the processing and analytics, and then send a decision to the ground-control monitor, Mor says.

Specifically, this AI at the edge could help a warfighter identify an object of interest,

Figure 2 | Elma Electronic’s family of highspeed SOSA aligned backplanes are intended to help accelerate development of a common, modular architecture across critical C5ISR and EW systems.

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classify it, locate it, extract coordinates, and then send those coordinates to a control or remote station. Such tools thereby enable warfighters in the field to make what Mor calls “quick and precise” decisions that are critical on the battlefield. (Figure 3.)

ML is also enabling reduced SWaP; while AI is connected to ML, they describe different things. AI is when a computer is able to learn and problem-solve much like the human brain, whereas ML is a subset of AI that involves using mathematical models to learn without direct inputs from a human. Basically, ML is a method that AI uses to increase its own intelligence.

ML presents even more opportunities for the industry to increase the utility of reducedSWaP systems, Littlefield says.

“ML is real, and the community is hungry for products that enable or improve the performance of ML,” he says.

“It’s not so much a case of ML improving SWaP, but more that the kind of hardware that enables ML is now available within the SWaP parameters companies like Elma tend to work with,” Littlefield continues. “For example, a few years ago ML would have taken a 400-watt GPU to operate, which isn’t practical for a VPX-based electronic warfare (EW) or signals-intelligence system deploying a pod off the wing of a UAS. Now, however, there are GPUs and processors that perform ML calculations within the SWaP constraints of a 3U or 6U conductioncooled VPX card.

“Thus we are seeing ML being applied to just about every sensor modality and application domain that our industry serves, and products being fielded to serve those applications,” he adds. ■

Leveraging Commercial Tech for Military UAS Platforms

Sponsored by Abaco Systems/Ametek

The ability to rapidly vet and scale commercial uncrewed aerial system (UAS) technology for military applications is a critical goal of the U.S. Department of Defense. The Blue sUAS 2.0 project for the Defense Innovation Unit is an example of such an approach.

In this webcast, government and industry experts detail how the DoD and DIU project is getting commercial innovations to the warfighter and the battlefield. They also delve into the regulatory and legal issues facing UAS system integrators. (This is an archived webcast.)

Watch the webcast: https://tinyurl.com/4dymjxbb

Figure 3 | The Aitech U-C5300 SOSA aligned AI graphics board is aimed at use in AI delivery, video analytics, image processing, and other battlefield applications.

AI IS WHEN A COMPUTER IS ABLE TO LEARN AND PROBLEM-SOLVE MUCH LIKE THE HUMAN BRAIN, WHEREAS ML IS A SUBSET OF AI THAT INVOLVES USING MATHEMATICAL MODELS TO LEARN WITHOUT DIRECT INPUTS FROM A HUMAN.

SOSA™ Drives Radical Innovation, Including a 64 GS/s Direct RF Card

By Noah Donaldson, CTO of Annapolis Micro Systems

The SOSA™ Technical Standard and MOSA benefit the warfighter in two primary ways:

1. Ensuring interoperability between components and sub-systems

2. Accelerating innovation

Both of these benefits deliver better performance and improved functionality to the warfighter’s mission. Interoperability is ensured due to SOSA’s use of existing standards (OpenVPX, FACE™, etc.) while further narrowing and defining requirements.

Equally important is the SOSA Technical Standard enabling innovation. With SOSA 1.0 addressing hardware system management, power supplies, maintenance ports, connectors, bandwidth performance, thermal control, and slot pitch, embedded systems designers are freed to concentrate on performance areas not specified by the SOSA Technical Standard. SOSA Technical Standard 1.0 doesn’t limit performance and capability within a module.

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SOSA™ Reduces

That’s how our focus on being the first to integrate the newest and highest-performing FPGAs and other components has really paid off.

Partnering with Jariet Technologies, we developed the SOSA Aligned DME1 Card, the industry’s first COTS product to feature 64 GS/s, 10-bit ADC and DAC Direct RF capability. It is targeted at demanding EW applications requiring direct sampling frequency coverage anywhere from 0.1 to 36 GHz, and/or wide instantaneous bandwidths.

Of course, this huge leap in front-end bandwidth performance requires an upgrade in backplane bandwidth capability. Once again, MOSA is a key enabler. In our WILD100 13-Slot 3U OpenVPX Chassis (WC31DH), VITA 91 high-density connectors allow for a completely switched backplane. This facilitates the use of one nonblocking Ethernet switch (instead of two chained together), and it facilitates a flexible, programmable expansion plane. This supports either 8x or 4x Gen4 PCIe, plus eight LVDS or dual 100Gb Ethernet.

OpenVPX Variability

By Jim Tierney, Vice President Aerospace & Defense Systems

SOSA adopted concepts and definitions from the OpenVPX standard, including a taxonomy of Planes, Pipes, and Profiles. However, SOSA accepted only a small subset of the OpenVPX profile options. OpenVPX has quite a few Plug-In Card Profiles (PICPs) that are largely redundant. To simplify that situation, while allowing flexibility, a pinout ‘overlay’ is employed to define the functionality of previously undefined pins.

SOSA also reduces the number of protocol implementations defined within OpenVPX. However, the new standard does maintain flexibility by expanding on the OpenVPX Alternate Profile Module Scheme with specific fields for RF pinouts, XMC overlay, and Switch Front Panel Fiber I/O.

The result is that actual SOSA systems will look like OpenVPX systems but with a huge reduction in variability. A much more tightly defined technical specification means that cards will be interoperable between systems, and backplanes will be pin-compatible with a wide range of cards from a variety of vendors.

At Atrenne Computing Solutions, we believe that designs conforming with the SOSA standard will enable component reuse and interoperability between systems. For over 50 years, our engineering teams have delivered rugged embedded enclosures and backplanes, working with continual developments in system architectures and evolving standards. Today we are designing solutions to meet not just the SOSA standard but also OpenVPX, VME, and CompactPCI.

Across all these standards, and throughout half a century of industry changes, our goal has remained focused on delivering systems that meet each customer’s unique requirements on time andwith top quality assurance .

QUESTION: How do the Sensor Open Systems Architecture™ (SOSA) and a modular open systems approach (MOSA) benefit the warfighter?

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard build on open standards? Pick one and explain: OpenVPX, HOST, FACE, CMOSS, RedHawk, other.

The SOSA™ Technical Standard Supports Rapid Development

By Rob Diefes, President, CyberRadio Solutions, G3 Technologies, Inc.

While the VITA 65 Open VPX technical standard permits a large number of slot profiles, The Open Group’s Sensor Open Systems Architecture™ (SOSA) Technical Standard only allows a handful of slot profiles. This limited number of profiles enables small businesses to focus their technology developments on common profiles that will be utilized in fielded systems. The SOSA™ Technical Standard defines hardware maintenance, input power, I/O connectors, mechanical dimensions, and thermal management for conduction cooled modules. These definitions help small product development companies to design common hardware and  software “building blocks” which simplifies the development of new products.

The common slot profiles, along with the well-defined system and module attributes, enable existing product design attributes to be leveraged when developing new products. For example, our NDR585 4-Channel Wideband Microwave Tuner design led directly to the NDR664 Wideband Microwave Transceiver with two receiver channels and two transmit channels. Numerous NDR585 design attributes were used in the NDR664 transceiver including

EXECUTIVE SPEAKOUT

the thermal management, the overall mechanical design and I/O connectors, and the embedded software and firmware. The design commonality between the NDR585 and NDR664 SOSA™ aligned 3U VPX modules resulted in a 50% reduction in both development cost and development schedule for the NDR664 when compared to the NDR585.

A driving schedule and cost factor for both developing and manufacturing RF/Microwave modules is product test. The SOSA ™ Technical Standard reduces the schedule and cost impacts of product test by enabling common test infrastructures that support the test of all products as opposed to a test setup that is only able to test a single product.

www.cyberradiosolutions.com

SOSA™ Enables Agile and Flexible Mission Capabilities for the Modern Warfighter

By Ken Grob, Director, Embedded Technology, Elma Electronic

The SOSA™ Technical Standard is standard of standards, defining and adopting best-in-class hardware and software architecture to enable rapid upgrades of components as technology evolves.

The adoption by an increasingly wide ecosystem of industry suppliers helps support a more agile and cost-effective deployment of systems to support the warfighter in the field.

SOSA is having a profound impact on how both component vendors and their integrator customers approach the development of products and systems for defense platforms. SOSA makes technology refreshes much easier. It gives the integrator the means to remove a single plug-in card and replace it with a next-generation plug-in card, possibly from another vendor.

Service branches are using SOSA to enable faster deployment of mission-specific computers by having sets of common building blocks. SOSA modules can be quickly integrated, validated, and fielded. In this way, systems can be almost continuously upgraded, giving the warfighter the latest in tools.

The DoD is working on updating design and acquisition practices for more rapid development, integration and time-to-field, as well as reduce lifecycle costs and redundant capabilities. This will increase mission flexibility & upgradability, provide faster modernization and maintainability, and improve collaboration with industry.

Overall, SOSA provides an agile environment to respond to warfighter demands for capability changes and upgrades. It supports the MOSA initiative by providing and sustaining superior warfighting capabilities to the U.S. and its allies.

As a key participant and contributor to SOSA, Elma has been actively demonstrating functional platforms with a broad partner ecosystem and continues to support the warfighter with next generation modular open systems.

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard and a modular open systems approach (MOSA) benefit the warfighter?

SOSA™: Great for Today … So-So For Tomorrow?

By Chris A. Ciufo, Chief Technology Officer/Chief Commercial Officer

The SOSA™ Technical Standard will be a net detriment to the warfighter. Over time, sticking with SOSA will ignore the market’s then-latest innovations that might better benefit the warfighter.

The promise of SOSA is very real. Restricting vendors’ ability to color outside the (backplane) lines will restrict vendor lock and promote more “commodity-like” pricing for the government and widen the “me, too” choices. This is what the USG wants, and SOSA will achieve the desired effect for the warfighter from a cost and source-of-supply standpoint

But constraining all vendors’ creativity may stifle innovation at the board and chassis level. When signal lines, connector pinouts, and even chassis connectors and their physical positions are locked down − what happens when someone has a better idea that could benefit the warfighter sooner? That idea won’t be allowed for use until the larger SOSA committee weighs in and incorporates it into the standard − if ever. GMS, for example, ships SOSA aligned 3U OpenVPX boards and systems that include Intel’s Thunderbolt™ 4 technology on the board’s front panel, plus

EXECUTIVE SPEAKOUT

100GbE at the panel. These provide 360Gbps total bandwidth at the panel which is in addition to the UFPs and FPs available on the P1/P2 connectors. With this I/O, an Ethernet switch isn’t needed in the ATR, saving slots and SWaP-C. Yet the SOSA specification isn’t too keen on front panel I/O, regardless of the benefit.

Also − suppose a better solution for the warfighter didn’t use SOSA at all? Perhaps a rackmount server, small-form factor chassis, or even a mobile phone-based system was most advantageous?

Nope: SOSA is mandated. In contrast, VMEbus is so successful because of flexibility built into the just-enough standard. SOSA may well turn out to be too constraining: to the ultimate detriment of the warfighter who may not benefit from the latest available technology.

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard build on open standards? Pick one and explain: OpenVPX, HOST, FACE, CMOSS, RedHawk, other.

The SOSA™ Technical Standard Revolutionizes Sensor Systems for Defense and Aerospace

By Sandra Krombacher, Director Marketing, Kontron America

The SOSA™ Technical Standard is an evolution of the OpenVPX standard, aimed at enhancing interoperability and flexibility in sensor systems for defense and aerospace applications. While OpenVPX defines a framework for ruggedized, high-performance embedded computing systems, SOSA extends this framework to address sensor-specific requirements and further promote modularity, scalability, and reuse.

SOSA builds on the foundation laid by OpenVPX by incorporating several key advancements. Firstly, it introduces a modular approach to sensor systems, enabling the integration of different sensor types such as radar, electro-optical, electronic warfare, and more, into a common architecture. This modularity allows for easier upgrades, replacements, and enhancements without disrupting the entire system.

Secondly, SOSA emphasizes interoperability through the use of standardized interfaces and profiles. It defines a set of common interface standards, including data transport, command and control, and power, which enable sensor modules from various vendors

to seamlessly communicate and cooperate within the same system. This interoperability reduces integration efforts, promotes competition, and fosters innovation within the sensor ecosystem.

Additionally, SOSA incorporates the concept of open system architectures, encouraging the use of open standards and common building blocks. This approach facilitates technology insertion and enables system scalability by allowing modules and components from different generations or vendors to be easily integrated.

Overall, the SOSA Technical Standard builds on the foundation established by OpenVPX by providing a comprehensive framework that addresses the specific needs of sensor systems. It promotes modularity, interoperability, and openness, enabling the development of advanced, future-proof sensor architectures for defense and aerospace applications.

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard and a modular open systems approach (MOSA) benefit the warfighter?

Speedier Road to Deployment in Defense Applications

By Dan Manoukian, President LCR Embedded Systems

The most direct answer to the question is that a modular approach as described in the MOSA directive, enables speedier deployment of new technologies needed by warfighters. A modular approach as facilitated by The Sensor Open Systems Architecture™ (SOSA) Technical Standard and the various standards that it incorporates, allows embedded applications to efficiently leverage new off-theshelf processing, switch, I/O and digitization systems to configure electronic warfare systems across a wide array of applications. This represents a major benefit vs. proprietary system designs that require configuring a new system from the ground up. SOSA™, as a modular open systems approach (MOSA) paves the way for the swift uptake of the latest commercially available technologies for use in embedded defense systems. As a result, SOSA™ has the capability to dramatically reduce the lag time between advances in the commercial electronics and software industries, and their application on the battlefield.

As the RF spectrum becomes increasingly crowded and complex, embedded systems need to stay in step. SOSA™ modularizes RF and optical signals with the inclusion of VITA 66/67 backplane RF and optical connectors and the addition of 100Gb backplane data rates.

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New Performance Benefits for SOSA™ Enabled Technologies

By Rodger Hosking, Director of Sales, Mercury

During the mission, warfighters need to make quick, effective decisions to maintain superiority over their adversary and nothing is more important than having the most accurate information about the surrounding battlescape. Achieving this imperative requires exploiting the latest technologies to transform the wealth of data, collected by a diverse range of platform sensors, into intuitive tactile information. Unfortunately, complex military signal traffic can change quickly as new threats and countermeasures evolve. To overcome this issue, artificial intelligence and machine learning techniques help synthesize meaningful assessments of these threats and challenges.

Although many legacy military systems were based on OpenVPX, two fundamental problems occurred. With hundreds of profiles to choose from, each integrator chose his favorite set of profiles. Secondly, with many user-defined pins in each profile, the backplane signals and topologies were often unique to each system design. These factors virtually guaranteed that cards from different vendors had a slim chance of compatibility, thus sole sourcing the initial vendor. When new requirements arose, instead of upgrading the existing systems, vendors would start over with

These enhancements enable vast improvements in the signal speed, signal integrity and processing speeds needed to support new applications, especially in radar and electronic warfare applications.

A key benefit of SOSA™ lay in the modularization in software components that increase the capability and flexibility of deployed systems. Software modularization and protocol standardization, enables fast mission re-purposing, system updates and multimission functionality as new algorithms are ported to existing platforms intended for re-assignment.

In addition, a modular open systems approach reduces the time to deployment for new technologies and smooths future supply chain issues by ensuring commonality and standardization across connectors, chip sets, board sizes and other mechanical/electrical hardware components.

www.lcrembeddedsystems.com

new proprietary systems, resulting in higher acquisition costs and significantly longer delivery times.

The SOSA Technical Standard addresses these problems by allowing only a small subset of OpenVPX profiles, virtually eliminating user-defined backplane signals. Vendor interoperability and easy insertion of new technology addresses new military requirements by upgrading an existing system with the replacement of a few new plug-in cards from various vendors.

With the constant flow of new data converters, FPGAs, AI engines, and processors, SOSA aligned plug-in cards with these new technologies enable system integrators to upgrade the capabilities of existing deployed systems far less expensively and in much shorter time. This is critically important to warfighters who can now reap new performance benefits years earlier than before, all directly attributable to SOSA.

How does the SOSA™ Technical Standard and a modular open systems approach (MOSA) benefit the warfighter?

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard and a modular open systems approach (MOSA) benefit the warfighter?

Empowering the Warfighter: Accelerating Capabilities with CMOSS and SOSA™ Technical Standard

By Brian Paul, General Manager at Milpower Source

CMOSS is the Army’s C5ISR and Electronic Warfare Modular Open Suite of Standards, which is being implemented to support rapid modernization of communications and network solutions. A properly designed open systems architecture supports timely introduction of capabilities to the Warfighter, countering and overmatching threats on the battlefield and improving success of the mission.

The Open Group Sensor Open Systems Architecture™ (SOSA) Technical Standard is the architectural “blueprint” utilized by subsystem designers and systems architects to standardize the interfaces between sensor systems, which facilitates interoperability, reduces development time, and ensures rapid technology insertion in support of a compliant “CMOSS” architecture. For power and networking elements, the SOSA Technical Standard defines mechanical interfaces, electrical pin-out configurations, and communications protocols to allow engineers to identify available products and integrate the capability into the sensor or system.

For example, Milpower Source’s M2192 600W SOSA aligned, MIL-STD-1275E-compliant 3U VPX DC/DC power supply addresses

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the SOSA Technical Standard for mechanical form factor, connector interfaces, and system management protocols. An integration engineer can rest assured when selecting the M2192 and integrating to the backplane within the chassis for use in a ground vehicle platform, interfaces are seamless and integration and verification time is reduced, resulting in a more reliable and predictable system deployed to the field faster. Our goal at Milpower Source is to put critical capabilities into the hands of our customers and the Warfighter which can be more efficiently achieved through the implementation of the SOSA Technical Standard.

Milpower Source is an industry leader in producing power and networking solutions supporting the needs of the warfighter while adhering to and driving the SOSA Technical Standard, which in turn results in an effective open architecture compliant to the Army’s push to achieve step-change in capability through CMOSS.

How the SOSA™ Technical Standard Enables Small Business’ Technology Development

By Ryan Jansen, Chief Technology Officer, New Wave Design & Verification

The SOSA™ Technical Standard enables small business technology development in several ways. First, R&D resources can be focused on key enabling technologies. The SOSA™ Technical Standard defines common interfaces and protocols across the user base that allow a small business with limited resources to focus on new key technology differentiators rather than modify existing products to fit each new platform that needs them.

In addition, the SOSA™ Technical Standard creates a larger market for a given product that can now be used across multiple platforms. Increased product quantities aid a small business in all aspects of the supply chain from sourcing components to manufacturing. This creates a more cost-effective solution, ultimately providing more value to the end user.

The SOSA™ Technical Standard also increases interoperability and the speed at which new products can be integrated in a system. This reduction in integration effort provides an opportunity for a small business with a compelling new product to compete with and replace an existing solution. Frequent incremental updates in a closed system are often not practical due to large costs and risk.

Finally, the modular nature of the SOSA™ Technical Standard enables unique solutions through partnerships. Small businesses can still focus on their key technology areas of expertise, but also provide higher-level system capabilities to the end user by partnering with other industry members. This creates an environment where small businesses can provide capable solutions without supporting large teams with specialized knowledge in many domains.

Overall, the SOSA™ Technical Standard provides many benefits for small business technology development. By helping small businesses focus their R&D, promoting scale, reducing integration efforts, and enabling partnerships across industry, small businesses can compete more effectively in the marketplace.

How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard build on open standards?

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard enable small-business technology development?

SOSA™ works, is proven, and benefits the Warfighter ... today

By Conrad Smith, President, SR Technologies Inc.

At the end of the day, the SOSA™ Technical Standard and MOSA are simply packaging endeavors. They tell us how to wrap our capabilities and secret sauce, in a unified way, so we can deploy in standardized formats. This simple methodology has powerful corollaries ...

Disparate Plug-In Cards (PICs) can now be interchanged in the same chassis. Disparate software capabilities can now easily be hosted within standardized software environments. Network switches, PNT cards and Power Supplies can now be second sourced and used across a broad range of solutions requiring little or no modifications. The outdated charcuterie of black boxes, each serving a single purpose, supplied by a single vendor, is now replaced by a single MOSA chassis. This contains multiple PICs and various software loads capable of supporting multiple missions simultaneously with standardized care and feeding. Now the warfighter can select the best athlete for a capability, eliminating vendor lock. The hardware upgrade path and spares program is now a simple PIC change by the warfighter instead of returning the system to the depot. Development companies are now able to fully concentrate on their

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Winning At The Edge

By Craig McLaren, CEO

WOLF Advanced Technology Inc has specialized in developing and manufacturing rugged SOSA™ Aligned VPX and XMC boards for high-demand environments. We have benefitted greatly from being an early adopter with a defined focus on (VITA 46, VITA 48, and VITA 67.3) board designs.

1. Standardization and Interoperability: SOSA Aligned standards have enabled WOLF’s VPX boards to be integrated into various current and future Defense & Aerospace programs. SOSA Open Architecture means that WOLF’s VPX board technology is interchangeable with other SOSA compliant boards, which encourages opportunities for collaboration with many companies.

2. Cost and Time Efficiency: Industry-wide adoption of the SOSA Technical Standard reduces OEM customer system development time and costs, as WOLF’s current and future engineering development leverages pre-existing standardized VPX boards, using WOLF previously developed Intellectual Property, firmware, software, manuals, data sheets, all based on NVIDIA GPUs, XILINX FPGAs, Video I/O, and Power devices, enabling rapid new board inserts and upgrades.

core capabilities, as opposed to the supporting infrastructure, allowing for faster development and the opportunity to keep pace with the threat.

At SR Technologies (SRT), we started our move into the MOSA deployment model in 2017. As of today, our entire capabilities portfolio is now deployed using Open Standards. Embracing the MOSA approach has proven to be a transformative journey, facilitating increased efficiency, innovation, and adaptability. These benefits are immediately passed on to the warfighter.

Staying committed to the MOSA ethos enables us to continue to meet the challenges of tomorrow’s ever-evolving landscape. At SRT, we continuously push the boundaries of what is possible.

3. High-Performance Embedded Computing (HPE): Given the increasing importance of data processing in Defense and Aerospace applications, the demand for HPE systems is rapidly rising.

4. Radar Applications, EW, and Software Defined Radios (SDR): SOSA Aligned needs for these applications have enabled WOLF to develop and sell an extensive range of compatible NVIDIA Jetson ARM-based VPX SBCs for various existing and future systems.

5. GPUs and Video Processing: As defense and aerospace systems increasingly incorporate advanced signal & video processing with AI capabilities, the demand for rugged, SOSA compliant GPUs and video processing boards has quickly grown. WOLF meets this demand as an NVIDIA Elite partner producing varieties of Ampere and ADA-Lovelacebased SOSA compliant VPX and XMC boards with everincreasing performance while maintaining past software and firmware compatibility.

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard and a modular open systems approach (MOSA) benefit the warfighter?

QUESTION: How does the Sensor Open Systems Architecture™ (SOSA) Technical Standard enable small business technology development?

FlexLink™ Software Defined Radio

The FlexLink Software Defined Radio (SDR) is a SOSA™ aligned 3U VPX module designed to host simultaneous multi-waveform/ multi-channel operations within a single conduction-cooled payload slot. Multiprocessor System-on-Chip (MPSoC) devices from the AMD/Xilinx Zynq Ultrascale+ family provide powerful waveform processing capability, and Data Plane speeds up to 100 Gbps support multiple streams of high-bandwidth low-latency digital RF. Processing resources within the module are physically separated into two domains, enabling Type 1 secure communications when used with a separate Cryptographic Subsystem (CSS) module such as the USAF KGV-363. Available in two versions (standard with VITA 49.2 digital RF and analog RF interfaces, optionally with digital RF only), the SDR supports a wide variety of RF ancillary equipment for maximum integration flexibility in OCS and CMOSS communications systems.

This SDR covers a broad frequency range of 30 MHz to 2.7 GHz with up to 960 MHz of instantaneous bandwidth, providing native support for narrowband and wideband waveforms operating from VHF to S band without external frequency translation (higherband waveforms supported via IF with external translation). It meets or exceeds the demanding legacy/mil and modern radio performance requirements for key parameters including selectivity, receive noise figure, transmit broadband noise, spurs, and frequency tuning time. The standard SDR implements a novel DAC and ADC solution with extreme dynamic range (not achievable with available RFSoC-based solutions), enabling direct RF sampling and synthesis without frequency translation in the analog domain. The digital-only SDR eliminates the DAC and ADC, providing a reduced-SWaP option for systems that contain a separate transceiver.

The SDR supports more than 30 existing tactical communications and Advanced Tactical Datalink (ATDL) waveforms with equivalent or superior performance to legacy radios, as well as emerging directional communications waveforms. Its unique architecture enables industry-leading multifunction RF capabilities, such as simultaneous multi-channel communications, RF spectral sensing/intelligence concurrent with communications, Radar, EW applications, and more. An available SDK allows rapid low-cost development and deployment of new applications and waveforms.

FEATURES

Ą VITA 48.2 conduction-cooled module designed for VITA 47 rugged environments

Ą Analog RF: SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-4 Digital-only RF:SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-0

Ą Waveforms: TTNT, Link 16, BE-CDL, MUOS, SINCGARS, SATURN, WREN TSM, WREN NB, and more

Ą Frequency Range: 30 MHz to 2.7 GHz

Ą Instantaneous Bandwidth (RF & I/Q): 960 MHz

Ą Transmit Output Power: Up to +18 dBm

Ą Transmit Broadband Noise: 164 dBc/Hz

Ą Receive Noise Figure: As Low as 9 dB

Ą Receive Linear Dynamic Range: 154 dBc/Hz

Ą Analog RF Port Simultaneity: 1 Tx, 2 Rx

Ą Data Plane spd: 40/100GBASE-KR4 Control Plane spd: 10GBASE-KR Expansion Plane spd: PCIe Gen3 x4

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

3U

X9 VENOM VPX: Box-level Systems in Only 3U

The X9 VENOM 3U OpenVPX family starts with Intel’s latest generation Core i7 CPU Tiger Lake-H processor mounted on a GMS “engine” module. GMS OpenVPX boards using this engine are available in 3U 1-in pitch size featuring IEEE 1101.2 conduction cooling and all offer a massive amount of super-speed I/O never before seen on 3U OpenVPX.

The X9 VENOM VPX is available in two versions, each of which offers more I/O, processing, and add-on co-processing than is found on two 6U-sized boards (VME or OpenVPX). The 2-slot X9 VENOM Dual Slot 3UVPX version uses dual 1-inch pitch slots for I/O, power and conduction cooling, and has over 455 Gbps of external bandwidth across at least 24 ports. The 1-slot (1-inch pitch) conduction-cooled X9 VENOM Single Slot 3UVPX also offers at least 24 ports and 255 Gbps of I/O bandwidth. Each version represents a complete computer system, replacing two or more 6U modules. This is unheard of for 3U OpenVPX, which is complimented for its small size but then criticized for the lack of user I/O to the backplane. GMS has solved this 3U OpenVPX I/O problem, freeing users to take advantage of 3U’s size, weight and power (SWaP) advantages without the limitations of P1/P2 I/O.

Unique to both GMS VENOM boards is the incredible density of the feature set, backed by all of the high-speed I/O. Front panel ports supplement the backplane, giving users unparalleled flexibility at data processing and inter-system connectivity. Thunderbolt™ 4 on both versions and RMC add-in cards (in the dual slot) provide co-processing and full system connectivity in only 1 or 2 slots.

The X9 VENOM Dual Slot 3UVPX and X9 VENOM Single Slot 3UVPX air- and conduction-cooled single board systems are the fastest, most dense, highest performance compute and I/O processors anywhere in the world. They are developed in alignment with the Sensor Open Systems Architecture™ (SOSA) Technical Standard, follow VITA 65 3U OpenVPX and IEEE 1102.2, and scale up performance and I/O bandwidth, or scale out to other modules and chassis via quad 40Gbps Thunderbolt™ 4 ports, dual 100GigE, or PCIe Gen4 (16Gbps). As a modular stack, each brings upgradeability, backplane profile independence, and each

Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

offers between 255-455Gbps of interconnectivity to the very highest performing systems. Uniquely, the X9 architecture frees designers from the limitations of the OpenVPX backplane while maintaining interoperability with DoD MOSA requirements.

FEATURES

Ą Intel® Tiger Lake-H up to 8 cores (2.6GHz, 4.6GHz Turbo Boost)

Ą 64GB DDR4 ECC DRAM via upgradeable SO DIMMs

Ą Up to massive 455 Gbits/s bandwidth to external I/O

Ą x16 and x8 PCIe Gen 4 onboard/off-board inter-connect OpenVPX profiler conveniently remaps signals to backplane

Ą Full size MXM for GPGPU, FPGA, or bus extension

Ą 4x Thunderbolt™ 4 ports (40Gbps each) USB-C w/ optional fiber (50m) and 100W+ Power Delivery (each)

Ą Dual 100GigE Fiber ports and Dual 1GigE to VPX (P1)

Ą RAID-capable, dual M.2 sites for storage or I/O

Ą 1x GigE, 4x GPIO, 2x COM, 2x USB, 2x USB to VPX (P2) to VPX (P2)

Ą Dual 50W/100W RMC sites for co-processors for co-processors or additional high-speed I/O; to panel or backplane (dual slot only)

Ą Dual SAM™ I/O add-in modules for MIL-1553, ARINC-429, NTDS, GPS, or legacy I/O

Ą SOSA™ aligned and U.S. Army CMOSS-ready

https://www.gms4sbc.com/x9venom

X9 VENOM Xeon D with network I/O

Introducing the Kontron VX307H Computing Node, the ultimate SOSA™ Architecture Booster

This rugged 3U VPX board server takes computing performance to new heights, enhancing your existing HPEC architectures. With innovative features and extensions, it meets the demands of the most challenging mission profiles.

Choose from a range of CPU models, including 12, 16, or 20 cores, with optional 4 or 8 core configurations for specialized applications. Advanced instructions for AI, Signal Processing, and crypto algorithms deliver double the performance of previous micro server SOCs, powering applications like computer vision and media processing.

Connectivity is paramount, with options for Ethernet 100G/40G or 50G/40G interconnects. The VX307H supports open VPX profiles, accommodating I/O intensive and compute intensive applications to meet diverse requirements.

Reliability and robustness are guaranteed, with selected CPU SKUs offering 10-year reliability under 100% active usage. The VX307H is available in air-cooled and rugged conduction-cooled versions, operating in extended temperature ranges and compliant with industry standards.

Powered by the Intel® Xeon® D-2700 Platform, the VX307H delivers exceptional performance with features like Ethernet 100G, PCIe gen4, and on-chip DMA engine. Built-in cyber security measures and compatibility with Kontron SEC-Line elements ensure data protection.

Leverage Intel® Software for optimized performance, including Intel® Media SDK and Intel® OpenVino™ for hardware-accelerated media decoding, AI, and computer vision tasks.

With its superior SWaP-C ratio, the VX307H serves as a reusable building block for rugged high-performance computing. Extensive connectivity options, along with a rich Linux BSP and comprehensive system management features, make it ideal for building powerful and adaptable servers.

Unleash the potential of your engineering projects with the SOSA™ Architecture Booster – Kontron VX307H Computing Node. Elevate computing performance, ensure reliability, and embrace a robust and secure solution tailored for Defense applications.

FEATURES

Ą First 3U product to take up the 100Gb Ethernet challenge

Ą Takes advantage of performance/power improvement to introduce new Air-Flow Through cooling solution

Ą Available in 12-,16-& 20-core versions,enabling computing power to be adapted to SWaP-C applications

Ą Long term availability with 10-years of typical lifecycle

Ą Intel® Xeon® D-2700 HCC processor with 100G Integrated Ethernet

Ą From 12 to 20 cores to enjoy full range of this SWaP-C product

Ą Up to 64GB DDR4 with ECC

Ą Up to 2.97x faster CPU performance compared to prior product generation

Ą 100GbE networking for improved communication times

Ą Up to x16 PCIe Gen4 avoiding bottleneck on expansion plane

Ą Enhanced instructions for Artificial Intelligence and Signal processing (Intel AVX-512, VNNI)

Ą Security enforced by Hardware Root of Trust (Intel Boot Guard, TPM 2.0 Secure element)

Ą Designed in accordance with the Sensor Open Systems Architecture™ (SOSA) Technical Standard

Ą New VITA48.8 AFT (Air-Flow-Through) and VITA47 CC3 (Conduction-Cooled) support

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

Model 5553 8-Channel A/D & D/A Zynq UltraScale+ RFSoC Gen 3

The Quartz® Model 5553 is a high-performance, Sensor Open Systems Architecture™ (SOSA) aligned 3U OpenVPX board based on AMD®'s Zynq UltraScale+ RFSoC. The RFSoC integrates eight RF class A/D and D/A converters into the Zynq’s multiprocessor architecture, creating a multichannel data conversion and processing solution on a single chip.

The Model 5553 brings RFSoC performance to 3U VPX with a complete system on a board. Complementing the RFSoC’s on-chip resources are the 5553’s sophisticated clocking section for single and multiboard synchronization, a low-noise front end for RF input and output,16 GBytes of DDR4, 10GigE, 40GigE and gigabit serial optical interfaces capable of supporting dual 100GigE connections and general-purpose serial and parallel signal paths to the FPGA.

Extendable IP Design

For applications that require specialized functions, users can install their own custom IP for data processing. The Navigator FPGA Design Kit (FDK) includes the board’s entire FPGA design as a block diagram that can be edited in Xilinx’s Vivado® IP Integrator. In addition, all source code and complete IP core documentation is included. Developers can integrate their own IP along with the installed functions or use the Navigator kit to completely replace the IP with their own.

The Navigator Board Support Package (BSP), the companion product to the Navigator FDK, provides a complete C-callable library for control of the 5553’s hardware and IP. The Navigator FDK and BSP libraries mirror each other where each IP function is controlled by a matching software function, simplifying the job of keeping IP and software development synchronized.

The Navigator BSP includes support for Xilinx’s PetaLinux running on the ARM Cortex-A53 processors. When running under PetaLinux, the Navigator BSP libraries enable complete control of the 5553 either from applications running locally or on the ARMs, or using the Navigator API control and command from remote system computers.

FEATURES

Ą Supports AMD® Zynq® UltraScale+ RFSoC FPGAs

Ą 16 GB of DDR4 SDRAM

Ą On-board GPS receiver

Ą 10 GigE Interface

Ą 40 GigE Interface

Ą Dual 100 GigE UDP interface

Ą Optional VITA 67.3D optical interface for backplane gigabit serial communication

Ą Compatible with several VITA standards including: VITA 46, VITA 48, VITA 67.3D and VITA 65 (OpenVPX™ System Specification)

Ą Ruggedized and conduction-cooled versions available

mrcy.com/rfsoc

3U Plug In Cards (PICs): Payload Profiles –Compute-Intensive (SBC, FPGA, etc.)

V6061 3U VPX Versal® ASoC FPGA + Ethernet Offload Optical I/O Module

The V6061 is a next-generation, high-performance embedded computing 3U VPX module featuring the Xilinx® Versal® Adaptive System-on-Chip (ASoC), NVIDIA® Mellanox® ConnectX®-5 (MC-X5) network interface device, rugged optical and electrical I/O, and Sensor Open Systems Architecture™ (SOSA) aligned profile options. This dense combination of devices and technologies maximizes the effectiveness of the deployed applications and algorithms while eliminating design efforts required to establish truly high-bandwidth and low-latency Ethernet, PCIe controllers, PCIe switches, efficient DMA engines, or low overhead software drivers. The V6061 is designed for applications requiring a combination of high-speed data interfaces, network protocol offloads, onboard processing, and data distribution to adjacent processing resources. With its proven performance in 10/25/40/50/100Gbs Ethernet applications, the V6061 benefits sensor interfacing, data processing and distribution, and FPGA co-processing in systems such as radar, signals intelligence, electronic warfare, video, storage, medical imaging, and embedded communication systems. The V6061 includes hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, among many other protocol stacks, and excels at high-bandwidth interface applications where data can be processed locally and/or distributed efficiently across the VPX backplane. The V6061 is a standout sensor interface and heterogeneous computing solution whether used standalone or adjacent to other processing elements.

FEATURES

Ą Xilinx® Versal® ASoC (FPGA): VM1502/VM1802/ VC1902

Ą NVIDIA® Mellanox® ConnectX®-5 Network Interface Device Hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, + more

Ą Up to eight (8) 1G to 25G optical ports via MPO front panel I/O or VITA 66 optical backplane I/O

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą PCIe Gen3/Gen4 support

Ą Onboard embedded PCIe Switch device

Ą Advanced APIs that support multi-core and multi-processor architectures

https://newwavedv.com/products/fpga-interface-cards/vpx-cards/v6061-3u-vpx-versal-asoc-fpga-ethernet-offload-optical-io-module/

New Wave Design and Verification

www.newwavedv.com

 info@newwavedv.com

 952-224-9201

 www.linkedin.com/company/new-wave-design-and-verification

3U Plug In Cards (PICs): Payload Profile –Compute-Intensive (SBC, FPGA, etc.) and I/O-Intensive (SBC, GPGPU, etc.)

The iDC-6901 represents the next generation of full band RF down-converter products offered by Intelligent RF Solutions. Building on the iDC-6800 family of 2 to 18GHz down-converters, the iDC-6901 offers compact size (3U VPX), improved spurious performance, high dynamic range and “digitizer-ready” IF outputs placed in the second Nyquist ready for integration with a suitable digitizer card.

The iDC-6901 provides simultaneous down-conversion of the full 2 to 18GHz band in eight 2.5GHz-wide bands centered at an output frequency of 4GHz. Dual stage frequency conversion is employed on the lowest two bands to achieve excellent spurious performance. Internally generated, low phase noise PLL synthesizers generate all necessary LO signals which are locked to an external reference. Feeding multiple downconverters with a common reference provides coherency between multiple channels. Internal anti-alias filters provide 65dB alias-free dynamic range, which allows direct interface to a multi-channel digitizer. The high-fidelity RF performance of the iDC-6901 enables stare High probability of intercept (HPOI), wideband digitization and RFSoC processing solutions.

sales@irf-solutions.com

FEATURES

Ą 2.0 to 18.0GHz RF Coverage

Ą 2.5GHz Wide IF outputs

Ą 8 simultaneous “Digitizer-ready” IF outputs

Ą Low Frequency bypass available on 9th Selectable IF output

Ą Internally Generated Spurious <-90dBm

Ą Single Tone SFDR 60dB, min. at 0dBm output signal level

Ą Aligned with CMOSS/Sensor Open Systems

Architecture™ (SOSA) Technical Standard

Mission First – Proven RF Solutions

 443-595-8500

iDC-6901 3U VPX Full Band Microwave Down-Converter

The VP891 continues Abaco’s tradition of building one of the highest performing DSP cards in a compact 3U VPX form factor. Based on open standards, the Sensor Open Systems Architecture™ (SOSA) Aligned VP891 3U VPX is a modular design that optimizes efficiency along the sensor processing chain. Built around the flagship Xilinx® Virtex™ UltraScale+™ series FPGA, the VP891 offers speed, bandwidth and logic density to undertake demanding, mission critical applications while operating in harsh field environments. Applications include, but are not limited to, electronic warfare, radar, software defined radio, autonomous vehicles, renewable energy stations and semiconductor processing equipment.

The VP891 offers high-bandwidth, low-latency I/O, both through the use of modular VITA 57.4 FMC+ multi-channel, wideband, high-sampling rate RF transceivers and through multiple 100GbE interfaces through the VPX data plane and optional dual optical interfaces. Abaco offers multiple different FMC/FMC+ options from its extensive portfolio that are integrated with the VP891 for a seamless integration that reduces the development cycles. The modular nature of the standards-based FMC+ provides upgradability to future technologies as program requirements evolve.

The on-board Zynq™ UltraScale+ MPSoC further enhances the capabilities of the VP891 by offering enhanced security and allowing the card to operate standalone in a single-slot or to be paired with an SBC (single-board computer), offering flexible size-weight-and-power (SWaP) chassis configuration options as required by the application.

The VP891 is available in both air-cooled and conductioncooled variants. A board support package (BSP) is offered that provides interfaces to the different I/O blocks on the board. Optional MORA, VITA 49.2, REDHAWK and GNU Radio support is available.

3U Plug In Cards (PICs): Payload Profiles –I/O-Intensive (SBC, GPGPU, etc.)

3U VPX SOSA™ Aligned Virtex™ UltraScale+™ FPGA card with FMC+ and Multi-Channel 100GbE

Xilinx is a registered trademark of Advanced Micro Devices, Inc.

Virtex, Zynq, UltraScale+ are trademarks of Advanced Micro Devices, Inc.

The NDR585 is a wideband, 4 channel, 3U OpenVPX microwave tuner that provides frequency coverage from 20 MHz to 18 GHz. The NDR585’s industry leading channel density minimizes system level SWaP. Each of the 4 channels provides a 1 GHz analog IF output with a 500 MHz instantaneous bandwidth. The channels can tune both independently and phase coherently and multiple NDR585 units can be synchronized for phase coherent operation.

The NDR585 incorporates a super-heterodyne RF conversion architecture to minimize spurious products and yield high dynamic range performance. The fully integrated synthesizers provide fast tuning, low phase noise and the tuning flexibility to choose an alternative IF output center frequency. The NDR585 includes an internal 100 MHz OCXO and accepts a 10 MHz reference input. The unit’s form factor is single slot 3U VPX and the total power consumption is 48 Watts. The RF interface is provided through the VPX backplane using coaxial ports that are compliant with VITA 67.3. The backplane interface is compliant with the Sensor Open Systems Architecture™ (SOSA) Technical Standard, and VITA 46/65 OpenVPX.

3U Plug In Cards (PICs): Payload Profiles –I/O-Intensive (SBC, GPGPU, etc.)

Ą 4 channel 3U OpenVPX wideband microwave tuner

Ą 20 MHz to 18 GHz frequency coverage

Ą 500 MHz BW/Ch

Ą 1 GHz analog IF output

Ą MORA & SOSA compliant

Ą Industry leading channel density

Ą Independent and phase coherent tuning

CyberRadio Solutions www.cyberradiosolutions.com  sales@cyberradiosolutions.com  (240) 421-0754  www.linkedin.com/company/cyber-radio-solutions/  @cyberradios

3U Plug In Cards (PICs): Payload Profiles –I/O-Intensive (SBC, GPGPU, etc.)

NDR374

The NDR374 digital tuner is a 4-channel, superheterodyne Wideband Digital Tuner that covers RF signals from 2 MHz to 8 GHz. It is a rugged 3U conduction cooled VPX module, per VITA 46/48/65/67.

FEATURES

Ą 4-channel 3U OpenVPX wideband digital tuner

Ą MORA & Sensor Open Systems Architecture™ (SOSA) compliant

Ą 2 MHz to 8000 MHz frequency coverage

Ą 125 MHz BW/Ch

Ą 16-bit internal ADC, 368 Msps

Ą Full bandwidth Digital IF Output over P1 data plane

Ą Internal FPGA-based signal processing with variable rate DDCs

https://cyberradiosolutions.com/products/VPX.php

CyberRadio Solutions www.cyberradiosolutions.com

www.linkedin.com/company/cyber-radio-solutions/

www.opengroup.org/sosa SOSA Special Edition 2023 | 71

FEATURES

WOLF is developing a new 3U VPX video I/O module that uses a hybrid 75 Ohm NanoRF/optical connector. This new connector with its 75 Ohm contacts and cabling can support up to 18+ GHz, making it ideal for 4K video streams, such as 12G-SDI and higher bandwidth ARINC 818 video protocols. Previous modules used a 50 Ohm connector, commonly used for RF applications and lower bandwidth 2K video streams. However, 75 Ohm is preferred for digital video due to lower attenuation (less loss) and lower capacitance (less distortion).

The VITA 67.3 working group is discussing the addition of this 75 Ohm connector, which leverages the existing 50 Ohm NanoRF interface currently defined in the standard. The VITA 65.1 working group is also discussing the addition of new dash numbers to existing VITA slot profiles to define the addition of the new connectors.

The WOLF-1471 will use two of these new connectors, integrating them into a 3U VPX air flow through module. This WOLF module has been designed to capture two 12G-SDI video inputs and two CVBS inputs and to output four 12G-SDI. The integrated WOLF FGX video format conversion technology enables the module to support additional video formats, such as STANAG 3350 and ARINC 818. The WOLF module provides PCIe Gen4 connectivity, as well as an advanced NVIDIA Ampere GPU for video processing, providing the data throughput and processing power needed to handle 4K resolution video frames.

“The new connector provides 75 Ohm coaxial video inputs and outputs compatible with various sensors, providing the interoperability that is key to the overall mission of standards bodies. The connector allows video sensors to be directly connected to the compute hardware, for sensorto-edge processing efficiency,” says Keith Menezes, Director of Technical Sales Engineering. “Working with industry partners on this new connector ensures a path to meet standards-based technical requirements for various ISR applications.”

About WOLF:

WOLF designs and manufactures rugged high-performance computing, AI, and video I/O boards, modules and systems using the high-speed processing available from advanced NVIDIA GPUs and APUs and Xilinx FPGAs.

FEATURES

Ą NVIDIA RTX™ A2000, 2560 CUDA cores, 80 Tensor cores, 20 RT cores

Ą 12G-SDI and CVBS inputs, 12G-SDI outputs

Ą 75 Ohm coax connectors for video I/O

Ą HPEC Parallel Processing, CUDA Toolkit 12, CUDA Compute Capability 8.6

Ą OpenCL™ 3.0, DirectX® 12 Ultimate, OpenGL 4.6, OpenGL ES 3.2, Vulkan™ 1.2

Ą 80 Tensor Cores (3rd Gen) with 34/66 TOPS (dense/sparse), 20 Ray Tracing cores (2nd Gen)

Ą 8 GB GDDR6 128-bit memory, up to 256 GB/s

Ą NVIDIA GPUDirect RDMA support

Ą NVENC (7th Gen) and NVDEC (5th Gen) video encoding and hardware decoding support

Ą Configurable PCIe Gen4 switch, 8 lanes to P1

Ą Rugged air flow through, 1.5” pitch, Operating temperature: -40° to +71°C

VPX3U-A2000E-FGX2-COAX (WOLF-1471)

The V6061 is a next-generation, high-performance embedded computing 3U VPX module featuring the Xilinx® Versal® Adaptive System-on-Chip (ASoC), NVIDIA® Mellanox® ConnectX®-5 (MC-X5) network interface device, rugged optical and electrical I/O, and Sensor Open Systems Architecture™ (SOSA) aligned profile options. This dense combination of devices and technologies maximizes the effectiveness of the deployed applications and algorithms while eliminating design efforts required to establish truly high-bandwidth and low-latency Ethernet, PCIe controllers, PCIe switches, efficient DMA engines, or low overhead software drivers. The V6061 is designed for applications requiring a combination of high-speed data interfaces, network protocol offloads, onboard processing, and data distribution to adjacent processing resources. With its proven performance in 10/25/40/50/100Gbs Ethernet applications, the V6061 benefits sensor interfacing, data processing and distribution, and FPGA co-processing in systems such as radar, signals intelligence, electronic warfare, video, storage, medical imaging, and embedded communication systems. The V6061 includes hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, among many other protocol stacks, and excels at high-bandwidth interface applications where data can be processed locally and/or distributed efficiently across the VPX backplane. The V6061 is a standout sensor interface and heterogeneous computing solution whether used standalone or adjacent to other processing elements.

3U Plug In Cards (PICs): Payload Profiles –I/O-Intensive (SBC, GPGPU, etc.)

FEATURES

Ą Xilinx® Versal® ASoC (FPGA): VM1502/VM1802/ VC1902

Ą NVIDIA® Mellanox® ConnectX®-5 Network Interface Device Hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, + more

Ą Up to eight (8) 1G to 25G optical ports via MPO front panel I/O or VITA 66 optical backplane I/O

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą PCIe Gen3/Gen4 support

Ą Onboard embedded PCIe Switch device

Ą Advanced APIs that support multi-core and multi-processor architectures

https://newwavedv.com/products/fpga-interface-cards/vpx-cards/v6061-3u-vpx-versal-asoc-fpga-ethernet-offload-optical-io-module/

3U Plug In Cards (PICs): Power Supplies

VPX336DMS

WIENER VPX power supplies are commercial off-the-shelf (COTS), rugged, conduction cooled, single stage converters according to the ANSI/VITA 62.0 specification. They can be used to power a VPX chassis and will fit into the standard envelope defined by VITA 48.0 specifications.

WIENER VPX power supplies are designed and built to satisfy the most challenging application requirements. Using state of the art switching power technology combined with multi-stage input filtering, a wide input voltage range as well as high overall efficiency is achieved.

The new VPX336 series is designed in compliance with MIL-STD-461, 704 and 1275 as per VITA 62. An embedded microprocessor allows monitoring and control via I2C bus (IPMI) and USB. The VPX power supply mechanical dimensions are 3U x 4HP (0.80” slot). It is outfitted with connectors, keying and alignment mechanism as per VITA 62.

The Sensor Open Systems Architecture™ (SOSA) aligned VPX336DMS version provides 12V main with 20A and 3.3V aux with 20A as well as IPMC for system management integration.

FEATURES

Ą Outputs: 12V main /20A, 3.3Vaux / 20A

Ą High efficiency up to up to 90%, 87% at full load

Ą Wide input voltage range: 15 V … 40 V DC (nominal 28V), reverse polarity protection, optional 48V

Ą Voltage sense controlled, Over Voltage, Under Voltage, Over Current, Over Temperature protection

Ą Microprocessor controlled, with I2C bus / IPMB for VITA48.11 system management, USB port

Ą MIL-STD-461, MIL-STD-704, MIL-STD-1275 compliance as per VITA 62, ruggedized to MIL-STD-810

Ą No liquid / wet / aluminum electrolytic capacitors

www.wiener-d.com/product/vpx336-medium-power-flexible-configuration-vpx-power-supply/

W-IE-NE-R Power Electronics wiener-d.com | wiener-us.com

 sales@wiener-us.com

 +1 937-324-2420

 www.linkedin.com/company/w-ie-ne-r-power-electronics-gmbh/

M2192 Series DC-DC Power Supply

Introducing the M2192: A cutting-edge 3U VPX DC to DC power supply aligned with the Sensor Open Systems Architecture™ (SOSA) Technical Standard. Designed to meet the demanding requirements of military applications, this power supply is compliant with the VITA 62 mechanical standard, ensuring seamless integration and optimal performance.

The M2192 offers an impressive steady-state power output of 600W and is capable of handling a wide input range from 18 to 48VDC. Whether it's air or ground-based operations, this power supply is fully compliant with the relevant industry standards, guaranteeing reliability and performance in any environment: MIL-STD-704 for aircraft power and MIL-STD-1275 for ground vehicle power. It also complies with environmental specifications outlined in MIL-STD-810 and maintains EMI compliance as per MIL-STD-461G.

With support for 1275E 12V and 100V surges, it's prepared to withstand power fluctuations and surges that may occur in demanding military applications. For an extra layer of security to your mission-critical systems, the M2192 comes equipped with built-in NED (Nuclear Event Detection), providing enhanced safety and protection by detecting and responding to nuclear events or radiation levels.

To ensure efficient cooling in rugged environments, the M2192 is designed for conduction cooling, enabling optimal thermal management and reliable operation in harsh conditions.

Milpower Source offers the industry’s most complete line of 3U and 6U tailorable VPX product supplies, including DC-DC, AC-DC, and dual input solutions in VITA, SOSA™ aligned, and customizable configurations.

FEATURES

Ą Wide range input

Ą Up to 600W output steady state power

Ą VITA 46.11 defined system management: output voltage and currents, temperature, card system status

Ą Supports MIL-STD-1275E

Ą NED (Nuclear Event Detection)

Ą Remote sense

Ą Fixed switching frequency (220 kHz)

Ą Indefinite short circuit protection

Ą Reverse battery protection

Ą Over-temperature shutdown with auto-recovery

Ą Included EMI filters

3U Plug In Cards (PICs): Power Supplies

SOSA Aligned 3U VPX NVMe Solid State Disk Module

The VPI-250-eSSDC 3U VPX NVMe SSD is designed to align with the Sensor Open Systems Architecture™ (SOSA) Technical Standard. It delivers extremely high performance via a Fat Pipe (PCIe x4). Designed from the ground up to remove legacy layers of hard drive interfaces such as SAS and SATA, it takes full advantage of the speed and parallelism of solid state nonvolatile memory. Streamlined efficient queuing protocol combined with an optimized command set register interface enables low latency and high performance. Data is delivered fast and efficiently with minimal burden on the host CPU.

The VP1-250-eSSDC optionally supports TCG compliant AES-256, CSfC and FIPS 140-2 validated encryption and military grade data elimination as well as hardware and/or software write protect.

The conduction cooled VP1-250-eSSDC is also available in a rugged aircooled configuration.

FEATURES

Ą Capacities up to 30TB

Ą Streamlined protocol with efficient queuing mechanism to scale for multi-core CPUs

Ą Supports 12V-only and +3.3 AUX

Ą Optional TCG compliant AES-256, CSfC and FIPS-140-2 Validated Encryption

Ą Military grade data elimination

Ą Operating 100G shock, 16.3G vibration

Ą Made in USA

https://www.phenxint.com/vpx-vme/

FEATURES

Ą Capacities up to 32TB (0 to 70C) and 20TB (-40 to 85C)

Ą NVME transfer rates of 3500MB (0-70C), 1500MB/S (-40 to 85C)

Ą Conduction and air-cooled options

Ą Removable SSD module rated for 100,000 mating cycles

Ą TLC, MLC, pSLC NAND for NVME and TLC, MLC, SLC for SATA

Ą Military erase, FIPS140-2, FIPS197, TCG Opal options

Ą 6U VPX SSD modules also available

3U VPX NVME and SATA SSD Modules

Your SOSA™ Partner, Today and Tomorrow. The acceleration of new technology demands our deployed platforms evolve into adaptable systems.

Sensor Open Systems Architecture™ (SOSA) Technical Standard alignment transitions sensor systems to expedite interoperability, reuse and disruptive agility. OpenVPX-based SOSA™ facilitates subsystem SWaP-C improvements and rapid technology upgrades.

To implement new technology faster at reduced cost is a core priority at Dawn. Dawn VME Products is committed to leadership in SOSA™ modules and infrastructure.

We can modify our existing platforms, or incorporate your requirements into a customized solution for prototyping and development. We are dedicated to maximizing customer satisfaction through on-time delivery of zero-defect products.

Rugged, reliable and ready. You need it right. You want Dawn. Basic specs on some of our available SOSA™ aligned products are shown here.

Backplanes (3U & 6U)

FEATURES

Ą VPX-0354 25Gbps SOSA™ 14.2.16 Single Slot Backplane

Ą VPX-0557 25Gbps SOSA™ 14.6.11 Single Slot Backplane

Ą VPX-0650 25Gbps SOSA™ 14.8.8 Single Slot Backplane

Ą VPX-9909 6U VITA 67.3 J3 & J6 Single Slot Backplane

Ą MERITEC VPX3 Deployable Backplane

Ą Hercules to VPX3 Cabling solution allows speeds of 25 Gb/s+ per line

www.dawnvme.com/sosa-products/

High Performance Backplanes Aligned to SOSA™

Elma’s comprehensive line of backplanes aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard enable complex, high speed signal processing in rugged environments. They provide the foundation for high-performance mission-critical systems requiring lower lifecycle costs and rapid technology insertion.

The 3U and 6U backplanes enable complex, high speed signal processing with the latest optical fiber and RF connectivity. They offer support for precision network timing (PNT), and slot profiles for SBCs, switches, radial clock(s) and expansion.

The backplanes support high-speed signals on all data paths and RF and optical connectors. Developers can use the backplanes as configured or work with Elma to identify specific profile configuration needs.

FEATURES

Ą Field-proven designs in slot configurations from 2 to 14 slots aligned to SOSA

Ą Designs support VITA 66 & 67 optical & RF apertures for connectivity

Ą Support for all slot profile options support critical multimission applications

Ą Support for dual domain Ethernet switch 1/10/40 & 25/100

Ą IPMC chassis management support

Ą PNT timing support

Backplanes: (3U & 6U) www.elma.com

Ą Support the DoD's MOSA initiative as well as CMOSS

Dawn SOSA™ Products

Connectors & Cabling: Board Level Connectors ("VITA 66, 67, …" or "Optical, RF")

MIL-HD2 Next-Gen SOSA™/ VITA 91 Aligned Connector Series

Developed in alignment with The Open Group Sensor Open Systems Architecture™ (SOSA) Technical Standard, MIL-HD2 provides developers with a readily available, robust open architecture solution for tighter card pitches and chassis designs where space requirements and density are critical.

These connectors are available in 3-, 4-, and 6-pair configurations, providing the MIL-embedded market with the highest count of differential pairs available today in a 3U configuration at 56Gb/s PAM 4 speeds.

This series was selected by the SOSA Consortium and provides a SOSA aligned solution for Next-Gen switch and payload card requirements enabling the MIL-embedded market to meet next-gen performance levels while still meeting COTS requirements.

Configurations to meet SOSA/VITA 91 requirements for HD Switch.

www.amphenol-aerospace.com/products/mil-hd2

FEATURES

Ą Data rates scalable to 56Gb/s PAM4 to support system upgrades without costly redesigns

Ą 15.7mil drill compliant pin allows deeper backdrilling Optimized footprints

Ą Differential pairs 28-84 per inch (11-33 differential pairs per centimeter)

Ą Highest density with 1.80mm pitch

Ą Shielded contacts mate before signal contacts

Ą Proven EMI and signal integrity advantages

Ą Shielded contacts mate before signal contacts, providing up to a 4mm minimum wipe.

Connectors & Cabling: Board Level Connectors ("VITA 66, 67, …" or "Optical, RF")

SMPM VITA 67.3 14 Port Backplane Module

Amphenol SV Microwave’s SMPM VITA 67.3 14 Port Backplane Module, Aperture H (part number SF9321-60086) aligns with the VITA 67.3 specification in that the floating contacts have been moved to the Backplane side (versus the Plug-in side in the 67.1 and 67.2). SV Microwave’s VITA 67.3 product lines are the latest addition to the RF / coaxial section of the VPX platform.

These modular solutions include contacts, cable assemblies, adapters and connector Backplane and Plug-in modules that support the entire RF signal path of your embedded system. SV’s VITA products are designed for side-by-side implementation with other VITA connector standards. Available in SMPM and SMPS series.

SV Microwave is an associate member of The Open Group Sensor Open Systems Architecture™ (SOSA) Consortium and an active participant of the SOSA Electromechanical hardware group. In stock through distribution.

SV Microwave www.svmicro.com

FEATURES

Ą Backplane module

Ą 14-Port Configuration

Ą SMPM RF Series

Ą VITA 67.3

Ą Aligned to the SOSA™ Technical Standard

Ą VITA 65.1 Connector Module 6.4.5.6.4

Ą Accepts Ø.047 and Ø.086 cabled connections

https://bit.ly/3q6VuWb

Connectors & Cabling: Board Level Connectors ("VITA 66, 67, …" or "Optical, RF")

Space ABLE® 28G SL Series 4TRX, 12TX, and 12RX

The SpaceABLE® 28G SL Series radiation resistant transceivers are engineered to withstand radiation doses >100 krad (Si).

The SpaceABLE 28G SL Series low profile screw-in module mounts to the board via an LGA connector (interposer). It is offered as either a (4+4)-lane transceiver (100G full-duplex) or as separate 12-channel transmitter and 12-channel receiver modules (300G half-duplex, as a pair) that operate at up to 28 Gbps per channel over a recommended operating temperature range of –40 ºC to 85 ºC at ultra-low bit error rates of 10-9.

FEATURES

Ą Small: less than 6 mm high (module and interposer)

Ą Rugged: withstand radiation doses >100 krad (Si) and qualified per MIL-STD 883 shock and vibration

Ą Expected life: up to 20 years

Ą Performance: up to 28 Gbps/channel over a recommended operating temperature range of –40 ºC to 85 ºC

Ą Low power consumption: 160 mW/channel (<6 pJ per bit)

Ą Link budget: >7 dB with BER 10-9 (measured at 25.7 Gbps)

Ą High-throughput communication satellites, GEO satellites, LEO satellite constellations

www.smithsinterconnect.com/products/optical-transceivers/embedded-transceivers/spaceable-28g-sl-series-4trx,-12tx,-and-12rx/

Smiths Interconnect www.smithsinterconnect.com/

Connectors & Cabling: Board Level Connectors ("VITA 66, 67, …" or "Optical, RF")

Light CONEX® LC Series

The LightCONEX® series of optical plug-in and backplane module connectors for VPX systems is Smiths Interconnects’ answer to the stringent SWaP requirements of today’s defense applications in which fiber optics are replacing high bandwidth copper interconnects.

This VPX series of active, blind-mate optical interconnects solution offers flexibility, light weight, very high bandwidth, and forward compatibility.

The LightCONEX active blind-mate optical interconnect is a revolutionary solution for VPX systems that includes a fixed, plug-in module connector and a floating backplane connector compatible with proposed VITA 66.5 standard.

FEATURES

Ą Increases volumetric density of 3U and 6U high-speed switch and payload VPX boards by integrating optical transceiver into plug-in connector

Ą Intermateability with VITA 66.5-defined backplane connectors enables multiple sources and drives faster design cycles

Ą Reduces optical interconnect SWaP with rugged MIL-STD qualified, edge-mounted, optical interconnects

Ą Enables ultra-high port bandwidth density of up to 720 Gbps full-duplex in a half-width slot

Ą Simplifies VPX board assembly and rework by eliminating fiber pigtail on edge-mount transceiver

Ą 10G and 28G per channel datarates in TRX, TX-only, and RX-only configurations

Ą VPX single board computing, C4ISR Embedded Systems

ttps://www.smithsinterconnect.com/products/optical-transceivers/vpx-optical-interconnects-en/lightconex-lc-series/

Smiths Interconnect www.smithsinterconnect.com/

focom.uscsr@smithsinterconnect.com

www.linkedin.com/company/smiths-interconnect/  @smithsinterconn

CMFF Platform with SAVE Tray Aligned to SOSA™

This CMFF Reference Platform supports application development efforts for systems designed to meet Army hardware requirements of CMOSS (C5ISR/ EW Modular Open Suite of Standards) initiatives. An optional SAVE mounting tray is available.

At the heart of the system is Elma’s 12-slot backplane (12 payload + 2 power slots) with all profiles aligned to the Sensor Open Systems Architecture™ (SOSA) Technical Standard, with high-speed RF and optical I/O support. The system features an integrated VITA 46.11 Tier 3 Out of Band chassis manager and meets MIL-STD-810G and MIL-STD-461E, MIL-STD-1275E environmental requirements.

Streamline your development efforts and shorten your time to deployment. Payload boards are available as part of the platform. Choose from a growing ecosystem of processor, network, network timing and power supply modules designed to align with CMOSS and aligned to the SOSA™ Technical Standard.

FEATURES

Enclosures: Deployable

Compact HPEC at the Edge – ISR / EW Operation

For HPEC requirements at the tactical edge, this dual slot system addresses demanding RADAR, SIGINT, EW and EA applications. It features 3U Sensor Open Systems Architecture™ (SOSA) Technical Standard aligned payload modules including high performance Intel Xeon Processor, Xilinx UltraScale+ FPGA module or RF tuner / transmitter module.

The rugged design offers an ample I/O complement including 11 receiver and transmitter channels including clock and sync, with DisplayPort, USB, LVDS and a 1Gigabit Ethernet Fiber data interconnect making it ideal for C4ISR Modular Open Sensor Systems for harsh environments. A high performance Intel Xeon processor with I/O intensive profile provides 518 GFLOPs of computational power to meet the high bandwidth signal I/O requirements in critical deployments. A second slot utilizes the compute intensive profile with full aperture VITA 67.3 D NanoRF connectivity.

The system leverages LCR’s 200 Series AoC3U-210 chassis for VITA 48.2 conduction cooled modules supporting 2 payload and 1 VITA 62 PSU slots (28V, 270V with integrated hold up options) with SATA connection routed to I/O connector.

Ą 12-slot SOSA aligned 25/100Gb dual domain backplane (available in 7 slots)

Ą Architecture supports VICTORY and MORA implementations

Ą Rugged 3U chassis to meet CMOSS with optional SAVE tray

Ą Chassis designed to fit Standard A-Kit Vehicle Envelope (SAVE)

Ą Conduction/convection cooling approach

Ą Rugged I/O connectors & EMI filter on removable front panel

Ą Redundant VITA 62 28V DC power supplies

Enclosures: Deployable

FEATURES

Ą 3U VPX and SOSA Aligned Modules

Ą Intel 1.5GHz 12 Core Xeon D processor

Ą Xilinx UltraScale+ XCVU9P FPGA

Ą Multiple tuner board options

Ą I/O panel with MIL-STD 38999 options for high-speed copper, optical / RF signals

Ą Cooling for up to 200W of total power

Ą Rugged SWaP optimized design for operations at the tactical edge

https://www.lcrembeddedsystems.com/2-slot-hpec/

Enclosures:

SOSA™ Aligned 3U OpenVPX Chassis Platforms

Pixus offers various MIL rugged and COTS enclosure solutions for 3U or 6U OpenVPX boards. There are several Sensor Open Systems Architecture™ (SOSA) Technical Standard aligned profiles to choose from, with backplane designs to PCIe Gen4 and 100GbE. The company also has quick-turn SOSA aligned and VITA 66/67 development chassis and backplanes for rapid prototyping.

The chassis shown in the photo was designed specifically for the high power requirements of SOSA aligned systems. With cooling of at least 100W/slot, the chassis features up to a 16-slot OpenVPX backplane with speeds to 100GbE and various VITA 66/67 optical and RF interface options. A mezzaninebased SOSA aligned VPX chassis manager is optional.

FEATURES

Ą SOSA Aligned OpenVPX chassis in ATR, MIL rugged rackmount, and lab/test formats

Ą Backplane design expertise up to and above 100GbE speeds, RT3 connector

Ą SlotSaver mezzanine-based VPX chassis manager to VITA 46.11 / SOSA aligned

Ą Options for VITA 48.8 Air Flow Through and other cooling configurations

Ą Vast array of COTS, quick-turn prototyping platforms

Ą Pixus USA is a proud member of SOSA Consortium

V1161 Programmable 100G Rugged Ethernet XMC ASoC Card

The V1161 100G Ethernet card is a high-performance embedded computing module with the Xilinx® Versal® Adaptive System-on-Chip (ASoC) and NVIDIA® Mellanox® ConnectX®-5 (MC-X5) network interface device. It offers rugged optical and electrical IO options and is ideal for applications needing high-speed interfaces, network offloads, and onboard payload processing. The combination of the MC-X5 device and the Versal ASoC device allows for system designers to leverage the off-the-shelf world-class Ethernet performance of the MC-X5 while deploying unique data processing and security algorithms in the onboard Versal® ASoC device.

The V1161 excels in 10/25/40/50/100Gbs Ethernet applications, featuring hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, and other protocols. Combining the MC-X5 and Versal® ASoC maximizes algorithm effectiveness without additional design efforts for Ethernet, PCIe controllers, DMA engines, or software drivers.

The Versal® ASoC's FPGA fabric supports IP cores for Fibre Channel, ARINC-818, sFPDP, Aurora, and more, making it suitable for mixed protocol needs. In XMC or 3U VPX form factors, the V1161 enables a single-slot solution, turning a VPX-based computer into a sensor interface and computing solution with 100G optical interfaces, FPGA fabric, and ARM processor cores.

XMC Mezzanine Cards

FEATURES

Ą Up to eight (8) 1G to 25G optical ports via MPO front panel I/O or VITA 66 optical backplane I/O. Electrical I/O via Pn6 also available.

Ą Xilinx® Versal® ASoC (FPGA)

Ą NVIDIA® Mellanox® ConnectX®-5 Network Interface Device

Ą Hardware offloads for UDP, TCP, RoCE v2, DPDK, GPUDirect, NVMEoF, + more

Ą Supports PCIe Gen4 x16, Gen4 x8, Gen3 x16, Gen3 x8

Ą 2 banks of 4GB up to 1866MHz LPDDR4 SDRAM

Ą Onboard embedded PCIe Switch device

https://newwavedv.com/products/fpga-interface-cards/pmc-xmc/v1161-programmable-100g-ethernet-xmc-asoc-card/

 952-224-9201

 www.linkedin.com/company/new-wave-design-and-verification

524 Open Series Development System

3U 11 Slot Open Series Development System, with Slot Profile Aligned to the SOSA™ Technical Standard

The 524 Open Series development system from Atrenne offers a feature-rich design that combines functionality and flexibility with aesthetic detail.

Designed with the engineering developer in mind, the 524 Open Series development system incorporates a 9 slot OpenVPX Backplane (9 payloads + 2 power slots) with profiles aligned to Sensor Open Systems Architecture™ (SOSA) Technical Standard and CMOSS (C4ISR/EW Modular Open Suite of Standards) initiatives.

Unobstructed accessibility to cards under test is enabled for probe access with intelligent system monitoring capabilities. The front of the 524 Open Series development system chassis is configured with LEDs for each voltage and a corresponding test jack for ease of monitoring DC voltages and probing. An AC on/ off switch and a system reset switch are also accessible via the front panel.

The 524 Open Series development system incorporates innovative thermal capabilities via the high-performance fans which are placed below the card cage to produce maximum unrestricted airflow while using side-entry air plenums. No matter where the test station is placed, the station will provide optimal cooling required for some of the most demanding cards aligned to the SOSA™ Technical Standard manufactured today. The 524 Open Series development system can be configured with a system monitoring board (SMB) with an LCD display. The SMB provides system fan speeds, DC voltage outputs, and monitoring for two temperature sensors. External access to the SMB is available through a rearmounted USB connector or an optional RS-232 port.

FEATURES

Open frame for easy card access

Maximum unrestricted airflow and cooling for high-powered cards

Supports air- cooled modules using IEEE 1101.10 card guides

Supports 3U x 160mm Modules

Supports air- cooled modules using IEEE 1101.10 card guides

Supports conduction-cooled modules using VITA 48.2 aluminum slot guides

Front mounted LED Array for DC Voltages

DC voltage test jacks

Front mounted power switch and system reset switch

High volume, speed-controlled cooling fans

Fan fail monitored

System Monitoring Board with LCD display

https://www.atrenne.com/products/524?utm_source=mes&utm_ medium=media&utm_content=wbp&utm_campaign=st_sosa

Services and Tools: Integrated PIC Sub-Systems

100GbE SOSA™ Aligned Development Kit Includes Gen 3 RFSoC or 64 GS/s Direct RF Capability

This next-generation 3U OpenVPX Benchtop Development Platform (WS3A01-Sx) is both aligned with the Sensor Open Systems Architecture™ (SOSA) Technical Standard and 100Gb Ethernet capable, and is designed from the ground up to economically speed development of 100GbE applications that are aligned with SOSA™

The stock Kit includes a 3U Chassis, Backplane, Chassis Manager, FPGA Board, 100GbE Switch, SBC, VITA blocks, and MIL-DTL-38999 cable. Also included are two ADC/DAC options: Gen 3 RFSoC Card or Jariet 64 GS/s Direct RF Card.

OVERALL SYSTEM FEATURES

• Front-loading, air-cooled system with conduction-cooled boards

• Seven 3U OpenVPX slots with SOSA™ aligned backplane profiles

– One 14.6.11 Payload

– Three 14.6.11 Empty Payload (for expansion)

– One 14.2.16 I/O-intensive SBC

– One 14.4.14 100GbE Switch

– One VITA 62 Power Supply – 12V-Heavy

• 25 Gbps Line Rates on Data and Expansion Planes

– 25/40/100Gb Ethernet

– SDR/DDR/QDR/EDR InfiniBand

– Gen 3/4 PCI Express

– Custom protocols up to 25Gbps per lane

• VITA 66.5C and VITA 67.3C for payload slots

• Four MIL-DTL-38999 SOSA™ aligned circular connectors with 19 RF connections, and one MIL-DTL-38999 Cable

• Multiple levels of hardware and software security

CHASSIS MANAGER

• SOSA™ aligned and VITA 46.11 compliant

• Enables control, maintenance, and security functions

• One Xilinx® Zynq® UltraScale+™ MPSoC (XCZU5EG)

• Supports MIL-STD-1553

100Gb ETHERNET SWITCH

• 40/100Gb Ethernet Data Plane Switch

– 6.4Tb/s switching capacity

– Industry-leading, true cut through latency

• 1/10/25/40/100Gb Ethernet Control Plane Switch

– Layer-2 Wire-Speed Switching Engine

• Two Xilinx Zynq UltraScale+ MPSoCs (XCZU5EG)

FPGA PROCESSOR + I/O CARD

• One Xilinx Virtex® UltraScale+ FPGA (XCVU7P)

• One Xilinx Zynq UltraScale+ MPSoC (XCZU7EV)

• ADC/DAC Option #1: Xilinx Zynq UltraScale+ Gen3 RFSoC

– ADC: 4 Channel, 5.0+GSps Sample Rate, 14 bit Resolution

– DAC: 4 Channel, 10.0+GSps Sample Rate, 14 bit Resolution

• ADC/DAC Option #2: Jariet Technologies Electra-MA

– ADC: 2 Channel, 64.0GSps Sample Rate, 10 bit Resolution

– DAC: 2 Channel, 64.0GSps Sample Rate, 10 bit Resolution

SINGLE BOARD COMPUTER (SBC)

• Intel® Xeon® E-2176M

• Up to 32 GB DDR4 at 2,400 MT/s with ECC

• Up to 256 GB high-performance NVMe onboard storage

APPLICATION DEVELOPMENT

• Standard support delivered with all systems

• Optional full Board Support Package

– Enables customization of Zynq PS, PL for security

– Provides fast and robust HDL-based environment

For a virtual or in-person Demo, contact us.

https://www.annapmicro.com/products/WS3A01-S1/

Services and Tools: Software Development Tools

helux™ MORA Development Tools

Sciens offers a comprehensive set of hardware-agnostic MORA development tools comprised of the helux™ Tool Suite, Development Kits and Development Box. These robust solutions allow hardware vendors, application developers and system integrators to efficiently – and confidently – create and interact with their devices, reducing cost and risk.

Available as a powerful application package or used as individual applications, the helux Tool Suite includes MORA Explorer, which provides intuitive graphical representations for complex MORA interactions, and MSRP Generator, which simplifies MSRP creation and modification.

The heart of all Sciens’ MORA products are the helux Development Kits, comprised of helux Core and Client Core, providing software and FPGA library implementations of the VICTORY and MORA specifications and associated client libraries for engagement with devices across the VDB and ML2B. The combined kits facilitate full system development from MORA aligned device creation through device integration with other applications, frameworks and specifications.

Hardware vendors and system developers can better focus on building their hardware platform functionality and capabilities, while relying on Sciens’ development tools to handle standard software and firmware requirements. Ultimately, this results in a more efficient and predictable development process producing a more stable, long-term solution.

To further support its customer and industry partners, Sciens Innovations provides system development, integration and sustainment services backed by an extensive support infrastructure, including an artifact repository, service desk, and Sensor Open Systems Architecture™ (SOSA) Technical Standard/MORA experts to streamline the development process.

• MORA Explorer: Provides visualization and control of MORA aligned hardware enabling development, evaluation, integration and demonstration. Using standard MORA interfaces, automatically discovers device capabilities via zero-configuration networking, provides device information, enables resource configuration and offers sample data plotting. Can easily switch between multiple MORA configurations made available by the device MSRP.

• MSRP Generator: Graphical interface simplifies interactions with new and existing MSRPs, eliminates errors from manual editing and ensures profile compliance. Create, view and modify MSRPs for MORA devices with automatic validation and bounds checking for all data fields. Seamless engagement and ease of use for hardware manufacturers to system integrators at each stage of solution development.

• helux Core: Collection of software libraries and FPGA modules providing implementations of VITA 49, VICTORY and MORA specifications, enabling rapid implementation of MORA aligned hardware platforms (i.e. SOSA aligned VPX cards). Provides foundation to create MORA and VICTORY component types for various device types (i.e. PNT, SDR, RF Conditioning and Distribution, Radiohead devices) communicating over the VDB and ML2B.

• helux Client Core: Software libraries that simplify MORA aligned device interaction and orchestration within a system, expediting device and application integration. Provides functions to browse MORA devices on the network, inspect device capabilities, and reserve and configure MORA resources. Users can leverage the ingest/egress engines to process and generate data and context messages on the ML2B to develop a comprehensive MORA device client solution.

• MORA Development Box: Low-cost, MORA aligned multi-channel RF transceiver that simplifies the process of creating RF signal processing and accelerates integrating existing applications within the MORA space. Uses helux Core to integrate high-performing RF hardware and provide MORA aligned interfaces for the VDB and ML2B. Graphical tools from helux Tool Suite, including MORA Explorer and MSRP Generator, enrich the user experience.