VITA Technologies Summer 2024 with Resource Guide

Pg Advertiser

3 Behlman Electronics, Inc. –When it comes to VPX, one company has the most flavors

28 Behlman Electronics, Inc. – No one powers the Army like Behlman

17 AirBorn – Introducing Power Blade 2000W+ power module

10 Dawn VME Products –Dawn powers VPX

11 LCR Embedded Systems, Inc. –Checks all the boxes – VPX and SOSA aligned solutions for any mission

1 Elma Electronic –Elma’s deployable CMFF ATR chassis with SAVE compliant tray

13 Elma Electronic –Leaders in modular open standards enabling the modern warfighter

15 Milpower Source – Your design partner for field-proven mil-grade power & networking solutions

WEBCASTS

SOSA and CMOSS: Driving Interoperability Sponsored by Curtiss-Wright and New Wave Design https://tinyurl.com/mr3fpujs (This is an on-demand event.)

Revolutionizing Robotic Computing: Modular Architecture to Support the Future of Industrial Autonomy Sponsored by Congatec and Sealevel Systems https://tinyurl.com/furjaaux (This is an on-demand event.)

EVENTS

MOSA Industry and Government Summit & Expo  June 17-18, 2024 National Harbor, MD https://events.techconnect.org/ MOSA_2024/

IEEE MTT-S International Microwave Symposium (IMS 2024) June 16-21, 2024 Washington, DC https://ims-ieee.org/

VITA EDITORIAL DIRECTOR Jerry Gipper jerry.gipper@opensysmedia.com

GROUP EDITORIAL DIRECTOR John McHale john.mchale@opensysmedia.com

ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com

TECHNOLOGY EDITOR – WASHINGTON BUREAU Dan Taylor dan.taylor@opensysmedia.com

CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com

WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com

EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com

WEBCAST MANAGER Marvin Augustyn marvin.augustyn@opensysmedia.com

SALES/MARKETING

DIRECTOR OF SALES Tom Varcie tom.varcie@opensysmedia.com (734) 748-9660

STRATEGIC ACCOUNT MANAGER Rebecca Barker rebecca.barker@opensysmedia.com (281) 724-8021

STRATEGIC ACCOUNT MANAGER Bill Barron bill.barron@opensysmedia.com (516) 376-9838

STRATEGIC ACCOUNT MANAGER Kathleen Wackowski kathleen.wackowski@opensysmedia.com (978) 888-7367

SOUTHERN CAL REGIONAL SALES MANAGER Len Pettek len.pettek@opensysmedia.com (805) 231-9582

DIRECTOR OF SALES ENABLEMENT Barbara Quinlan barbara.quinlan@opensysmedia.com AND PRODUCT MARKETING (480) 236-8818

INSIDE SALES Amy Russell amy.russell@opensysmedia.com

STRATEGIC ACCOUNT MANAGER Lesley Harmoning lesley.harmoning@opensysmedia.com

EUROPEAN ACCOUNT MANAGER Jill Thibert jill.thibert@opensysmedia.com

TAIWAN SALES ACCOUNT MANAGER Patty Wu patty.wu@opensysmedia.com

CHINA SALES ACCOUNT MANAGER Judy Wang judywang2000@vip.126.com

www.opensysmedia.com

PRESIDENT Patrick Hopper patrick.hopper@opensysmedia.com

EXECUTIVE VICE PRESIDENT John McHale john.mchale@opensysmedia.com

EXECUTIVE VICE PRESIDENT AND ECD BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com

DIRECTOR OF OPERATIONS AND CUSTOMER SUCCESS Gina Peter gina.peter@opensysmedia.com

GRAPHIC DESIGNER Kaitlyn Bellerson kaitlyn.bellerson@opensysmedia.com

FINANCIAL ASSISTANT Emily Verhoeks emily.verhoeks@opensysmedia.com

SUBSCRIPTION MANAGER subscriptions@opensysmedia.com

• Tel: (480) 967-5581

® OFFERS THE LARGEST SELECTION OF

Most manufacturers offer just a few VPX power supplies off the shelf, with high costs for full-custom. The Behlman the most COTS AC to DC and DC to DC units configured for a wide range of high-end industrial and military applications. All feature our state-of-the-art new engineering standard, Xtra-reliable design and Xtra-rugged construction.

Insist on the leader. Not just VPX,

Jerry Gipper, VITA

Jerry Gipper, VITA

MOSA Summit review

By Jerry Gipper

I have been involved with VITA standards development and marketing activities since the mid-1980s. Never have I seen as much activity in new standards development in the VITA Standards Organization (VSO) as what is happening right now. We recently wrapped up the May VSO bimonthly review and working group meetings in Frederick, Maryland, hosted by DRS Technologies. The event was extremely well-attended with a full agenda for two days. Besides the current list of activities that are detailed in the VITA Standards Update article (see page 6), there were two proposals to consider for new standard development opportunities. VITA is also seeing a steady increase in new memberships, indicating the high level of activity.

The scope of new VITA standards efforts ranges from 6U form factors, such as VPX, to much smaller board form factors. One of the new proposals was a request to stand up a new study group to evaluate developing a standard for a board size that could be used in wearable devices. While many form factors for wearables do exist today, they lack in several key parameters. The VITA community adds the unique ability to address needs for systems that need to function in tough environments at a very high performance level.

A second proposal was to define additional capabilities for the popular FMC standard to make it more suitable for today’s complex systems by adding system-management interfaces that can help manage power, thermal load, and other factors in a system.

The development of VITA standards depends on subjectmatter experts from companies in the industry who are willing to invest time in contributing their knowledge to the collaborative efforts. Standards development requires a blend of experience and innovation to ensure that the rules, recommendations, suggestions, permissions, and observations detailed in the documents can achieve the desired outcomes. The creators often have to sort through many application scenarios to select the best possible path to a solution. It takes a special combination of many skills beyond engineering to be a contributor to the effort.

Participants in standards organizations such as VITA develop camaraderie that makes such collaboration a special career experience; in a way it even becomes addictive. Engineers interested in expanding their skills and careers are encouraged to seek out standards-development opportunities. VITA encourages

observers who might be interested in standards development to attend a few meetings, either virtually or in person, to get a feel for what it takes to become a contributor. There is no shortage of individuals willing to mentor anyone with an interest in participating in the process.

In this issue of VITA Technologies, you will find a summary of Embedded Tech Trends 2024, which was held in late January (see page 8). Thought leaders in the embedded computing industry gathered to discuss technologies, trends, and products that are at the forefront of the industry.

Rock ‘n Gipp started on the Great Loop on December 15 from Perdido Key, Florida. As of this writing, we have progressed to Norfolk, Virginia, completing about one-third of the Great Loop. We look forward to finishing the East Coast and traversing the Great Lakes this summer, hopefully making it to Chicago by Labor Day. We have a plan but not a schedule; the weather, the boat, and the experience set the pace for us each day. Our plans rarely have much detail beyond two or three days into the future. A high priority for us has been reaching out to friends and family so that we can spend time with them as we pass through. It has been a great learning experience as we develop our boating and navigation skills. There have been challenges, and the trip is not without stress and anxiety, but it is also filled with moments of reflection and relaxation. We still have long way to go before crossing our wake (and finishing the loop), hopefully in December.

Fair Winds and Following Seas!

VITA Standards Update VITA standards activity updates

By Jerry Gipper, Editorial Director

Note: This update is based on the results of the May 2024 VITA Standards Organization (VSO) meeting, held in Frederick, Maryland, and hosted by DRS Technologies. Contact VITA if you are interested in participating in any of these working groups. The full reports can be accessed at www.vita.com/StandardsUpdates. Visit the VITA website (http://www.vita.com) for details on upcoming VITA meetings.

ANSI accreditation

Accredited as an American National Standards Institute (ANSI) developer, VITA provides its members with the ability to develop and promote open technology standards.

The following standards have recently been ANSIand VITA-approved via public VITA consensus ballot:

› ANSI/VITA 67.3-2023, Coaxial Interconnect on VPX – Spring-Loaded Contact on Backplane

› ANSI/VITA 87-2024: MT Circular Connectors – Type 1

› ANSI/VITA 91-2024: Connector for Higher Density VITA 46 Applications

All published standards are available for download by VITA members and are posted at the online VITA Store for purchase by nonmembers.

VSO study and working group activities

Standards within VITA may be initiated through the formation of a study group and developed by a working group. A study group requires the sponsorship of one VITA member, while a working group requires sponsorship of at least three VITA members.

Several working groups have current projects underway. Here’s a roundup of these projects:

Draft/VITA 46.31: Higher Data Rate VPX –Solder Tail in Blind Via

Abstract: This document defines a standard for a VPX connector that supports higher data rates, to at least 25 Gbaud – for protocols such as 100GBASE KR4 Ethernet and PCIe Gen 4. The connectors feature a short solder tail intended to be soldered into a blind via. The higher-data-rate connectors compliant to VITA 46.31 are intermateable to legacy VITA 46.0 connectors and follow the same form factor.

Status: VITA 46.31 is approved for VITA Standard Draft Trial Use available to VITA members and is available at the VITA online store. The plan is to complete

the ANSI process and release once further connector qualification testing is completed.

Draft/VITA 47.1-2023: Common Requirements for Environments, Design and Construction, Safety, and Quality Standard

Abstract: The VITA 47 group of standards defines environmental, design and construction, safety, and quality requirements for commercial off-the-shelf (COTS) plug-in modules intended for ground and aerospace applications. VITA 47.1 addresses requirements common across the VITA 47 group of standards. This revision updates the operating and non-operating temperature requirements, adds cold wall requirements for VITA 48.2 conduction-cooled Plug-In Modules, and adds additional temperature cycling and cold start requirements.

Status: Multiple additions and changes are being made to improve the usability of this standard. Revision draft is in review.

Draft/VITA 48.5-R2010 (S202x) Revision: Mechanical Standard for VPX REDI AFT Cooling – Multi Pitch Air Flow Through Cooling, 1.52” Pitch

Abstract: This standard establishes the design requirements for an air-flow-through (AFT) cooled plug-in unit. Unlike ANSI/VITA 48.1, which uses cooling air impinged directly upon the components and circuit boards, this plug-in unit uses a compact core heat exchanger located within the central heat sink of the unit and uses a mil-/aero-qualified seal on the inlet and outlet of the heat exchanger eliminating any direct air contact with the PWB and components. This seal also provides ability for chassis-level flow balancing, allowing plug-in units with different cooling requirements in the same chassis. This standard defines both a 3U and 6U form factor in various pitches and air inlet sizes, providing a high-performance thermal solution for existing or new CCA [conduction-cooled assembly] designs.

Status: This standard is open for revisions to more clearly define some of the rules and recommendations. Verification method notation being added.

Draft/VITA 48.9: VPX AFT Cooling – Retractable Seals

Abstract: This standard defines an AFT module format (3U & 6U) that uses retractable module rack seals to improve chassis seal durability, simplify the design by eliminating tapered module and chassis features, and allow easy migration of existing CCA designs to an air-cooled module format.

Status: Working group is developing a draft document.

VITA 51.4: Reliability Component Derating

Abstract: The goal of this working group is to develop a new component derating standard.

Status: The working group is reviewing draft comments from public consensus ballot through IEEE.

VITA 65.x: OpenVPX System Standard

Abstract: The OpenVPX standard uses plug-in module mechanical, connectors, thermal, communications protocols, utility, and power definitions provided by specific VITA standards to define a series of slot, backplane, module, and standard development chassis profiles.

Status: The working group is adding additional profiles to this standard.

ANSI/VITA 67.3-2020: VPX: Coaxial Interconnect on VPX, Spring-Loaded Contact on Backplane

Abstract: The VITA 67.3 standard defines an open standard for configuration and interconnect (within the structure of VITA 67.0) enabling an interface compatible with VITA 46 containing multiposition blind-mate analog connectors with coaxial contacts, having fixed contacts on the plug-in module and spring action on the backplane.

Status: Now open for modifications to SMPS interface.

VITA 68.x: Reference SI Model Standard for Gen 4 and Higher Speeds

Abstract: This family of standards documents a reference model approach for OpenVPX signal-integrity compliance at baud rates above 10.3125 Gbaud. It defines reference OpenVPX plug-in module and backplane s-parameter models that can be used to create end-end OpenVPX reference channels in conjunction with reference VPX connector and device s-parameter models.

Status: The working group is addressing signal-integrity compliance for Gen4 and higher speeds for VPX and making general updates to remove errata from previous releases.

Draft/VITA 78.0-2022 Revision: SpaceVPX System

Abstract: This document describes an open standard for creating high-performance fault-tolerant interoperable backplanes and modules to assemble electronic systems for spacecraft and other high-availability applications. Such systems support a wide variety of use cases across the aerospace community. This standard leverages the OpenVPX standards family and the commercial infrastructure that supports these standards.

Status: The standard is open for revisions to the 2022 edition.

Draft/VITA 86-2019 Revision: High Voltage Input Sealed Connector Power Supply

Abstract: This standard defines an environmentally sealed connector pair which is compatible with the backplane footprint as defined in VITA 62.0 for 3U power supplies operating in harsh environments operating off of a high-voltage input.

Status: The standard is open for revisions.

Draft/VITA

89-202x: MT Circular Connectors – Type 2

Abstract: The VITA 89 MT circular connector standard defines a standard for circular connectors with optical MT. Circular connector shells are compliant to MIL-STD-38999. MT offer options for up to 48 fibers per MT and for physical contact or lensed MT.

Status: VITA working group to develop a new standard for circular connectors with optical MT. Working group is developing draft document.

Draft/VITA 90.x: VNX+

Abstract: The VITA 90.x (VNX+) family of standards builds on the foundation established by VITA 74 VNX. VNX+ significantly increases performance and system versatility beyond VITA 74, while following its mechanical framework.

Status: Working groups are developing drafts for each level of VNX+.

Draft/VITA 92: High Performance Cable –Ruggedized 10 Gbaud Bulkhead High Speed, D-Sub, Rectangular Connector for Copper Cables

Abstract: This standard defines a rugged standardized 10 Gbaud interconnect system with a high pin count and high-density lightweight rectangular connector (meets MIL-DTL-24308 physical envelope) for I/O. It can support multiple high-bandwidth protocols and power while optimizing size/weight/power in smaller systems with limited panel space.

Status: The working group is reviewing a draft document.

Draft/VITA 93.x: QMC – Small Form Factor Mezzanine

Abstract: This standard defines a Small Form Factor mezzanine (SFFm) that is significantly smaller than XMC with host and I/O interface connectors. The host interface supports modern highspeed serial fabrics. The I/O interface supports either frontpanel or backplane I/O. Multiple SFFm modules can be installed on various carrier-card form factors including 3U/6U Eurocards (VPX, cPCI, VME, etc.), VNX+, PCIe expansion cards, and others. It is suitable for deployment in commercial, industrial, space, or military-grade rugged environments with air-cooled or conduction-cooled formats.

Status: The working group is developing draft documents.

For a complete list of VITA standards available for purchase and their status, go to www.vita.com/Standards.

Embedded Tech Trends 2024 Wrapup

By Jerry Gipper, Editorial Director

In January, VITA held Embedded Tech Trends 2024 in Fort Lauderdale, Florida.

Embedded Tech Trends is a small, but extremely effective, forum where suppliers of components, boards, and system-level solutions can meet exclusively with members of relevant industry media to discuss technologies, trends, and products.

The following is a synopsis of the presentations at this year’s event:

Market Research Update

By Brian Arbuckle, Analyst, Embedded Market Research

Brian started off the event by reviewing highlights from market research he recently conducted for VITA. VITA publishes quarterly reports reviewing activity from financial performance to new products, contracts, and mergers in the VITA technology market. An annual report goes deeper into revenue estimates of VITA technology suppliers forecasting market sizes and shares across the various VITA technologies. The 2023 annual report is now available. (www.vita.com/MarketData)

VITA 57.4: Cost-Effective Technologies to Broaden FPGA Use

By Romanne Sailleau, Techway

In 2008, Techway pioneered the use of FMC on PCIe boards to extend the FPGA technology outside the military and aerospace arena. Thanks to VITA 57 FMC, engineers can now select the best FPGA [field-programmable gate array] and adapt I/O to their needs. This presentation demonstrated how easy it is to design “evolutive and reusable” systems for real-time applications.

Enabling Cutting-Edge Capabilities in Open Architecture Systems

By Simon Collins, Abaco Systems, Inc.

Open architecture systems demand cutting-edge capabilities to be competitive. Commercial applications continue to drive the need for increasing performance, standardization of core technologies drives interoperability, while a hierarchy of industry standards builds a robust ecosystem. The relentless increase of performance and data availability in a SWaP- [size, weight, power, and cost]-constrained environment enables new capabilities each year. Simon discussed how open architecture systems leverage cutting-edge capabilities.

Performance at the Edge: Emerging Trends in Embedded HPC

By Jake Braegelmann, New Wave Design

As the amount of sensor data describing the world around us continues to surge, the need for high-performance processing at the edge becomes increasingly important. “Performance at the Edge: Emerging Trends in Embedded HPC” offered a comprehensive exploration into the evolving world of embedded high-performance computing (HPC). This presentation shed light on the advancements in embedded architectures at the system, board, and chip level along with the increasing role of AI and machine learning integration at the edge. As industries from industrial to defense demand real-time data processing and decision-making, embedded HPC requires greater performance per watt of power used than ever before.

The Latest Trends in Open Standards SoM Interfaces

By Matthew Burns, Technical Marketing Manager, Samtec, Inc.

System-on-modules (SoMs) come in all shape and sizes. Applications using SoMs include test and measurement, transportation, entertainment, medical, industrial automation, and many others. SoMs also support a variety of compute engines including

x86, Arm, power, GPUs, FPGAs, RISC-V, and more. The integration of RF ADCs/ DACs and signal chains will influence SoM architectures in the years to come.

As compute engines increase in performance, pin count and density, SoM designers are challenged to define component placement, PCB layout, pinout, and interconnect options for digital, analog, RF, power, and control signals. Additionally, routing I/O expansion protocols on SoMs and SoM carrier cards enable rapid prototyping and system emulation.

In this presentation, Matt detailed popular open-standards SoM interfaces growing in popularity. Additionally, he summarized popular I/O expansion protocols common on compute engine evaluation kits, high-performance embedded SoMs, and SoM carrier cards.

Built per Spec, Design for Performance

By Scott Poole, AirBorn

Moving the industry to simplify the complex integration challenges of the power system is achieved through highefficiency, low-noise, and low-emission power engine design. The result is faster time to market and ease of installation for the integrator while reducing the engineering challenges.

10

Years

of

Ethernet Networks in VPX Embedded Systems

By Pierre Ansquer, Interface Concept

In 10 years, the incredible technological innovations (integrated circuits, PCB materials, connectors …) which have made it possible to increase Ethernet performance tenfold have directly impacted the standardization and architectures

of embedded systems. While hybrid switches primarily offered PCIe (or SRIO) for the data plane, limiting Ethernet to system-control signaling, 10G/40G Ethernet fabrics have gradually authorized the control/data planes mix. Then, dual-fabric Ethernet products arrived to meet the needs for plane isolation (control/data) for security reasons, so central for SOSA applications. On the media side, optical fiber, previously limited to front-end connectivity, has appeared on the backplane. Today, new signaling, allowing transfer speeds to be further doubled (25/50/100G), is now spreading across product offerings as time sensitive networking (TSN) technologies like Precision Time Protocol and scheduling/ traffic shaping are being called on to allow systems to meet demanding realtime tasking and latency requirements.

Leveraging Artificial Intelligence to Enable Decision Superiority

By Timothy Stewart, Aitech Defense Systems, Inc.

Recent operations in Ukraine have proven that introducing new technologies, tactics, techniques, and procedures can significantly affect the 21st-century battlefield. The U.S. military is integrating the lessons learned from this and other recent conflicts into the Joint All Domain Command and Control (JADC2) warfighting concept. The U.S. Department of Defense (DoD) is seeking to achieve decision superiority through JADC2 “to produce the warfighting capability to sense, make sense, and act at all levels

and phases of war, across all domains, and with partners, to deliver information advantage at the speed of relevance.” While this definition captures what JADC2 aims to achieve, it says little about how to achieve it. In this presentation, Tim used the OODA [observe, orient, decide, and act] loop and a Project Convergence use case (specifically, wet gap crossing) to show how AI will enable decision superiority by reducing risk in this complex and relevant scenario.

New Direct RF Technologies Boost Defense Systems

By Rodger Hosking, Director of Sales, Mercury Systems

The numerous game-changing benefits of directly digitizing wideband RF analog signals have altered the trajectory of future software radio architectures. By eliminating complex and costly analog RF tuners and upconverters, Direct RF ADCs and DACs can digitize K-band RF signals at 64 GS/sec, and capture signal bandwidths up to 30 GHz. By boosting performance while reducing latency plus SWaP-C, Direct RF specifically addresses the most critical needs of advanced radar and EW systems. However, these many benefits can only be realized with judicious allocation of specialized digital processing resources to support the wealth of critical information in the fire hose of data to and from these data converters. Widespread interest and rapid adoption of Direct RF technology is inspiring new silicon device solutions with higher levels of integration to meet this objective. This presentation offered the latest strategies and technologies to take advantage of Direct RF in critical defense applications.

COTS in Space: AMD, TI, NASA, and SpaceVPX Enable an Industry

By Kevin Roth, Alpha Data

Computing systems for the space market have historically been highly optimized for their intended application with little priority given to commonality or reuse. A new modular approach that balances flexibility with interoperability using open standards and commercial off-the-shelf (COTS) products will speed development and reduce costs. Combine this approach with the latest radiation-tolerant Adaptive Compute Acceleration Platforms (ACAP), which include FPGA fabric, rich feature sets, and powerful I/O in a scalable power architecture – all powered by TI – and the potential is sky-high.

Cores & Threads: Understanding Hybrid Processors for Today’s Multitasking World

By Aaron Frank, Curtiss-Wright Defense Solutions

The growth of processing parallelism has resulted in a corresponding explosion of performance and capabilities, but not all processor cores and threads are created equally. For designers of critical real-time processing systems, what happens under the hood matters. Aaron presented insight into performance and system implications of today’s latest multicore and hybrid-core processors which software developers and systems designers need to understand to so they can exert tight control over the processing systems used in embedded aerospace and defense (A&D) systems.

Taking the Guesswork out of RF Specifications

By Steve Devore, Leonardo DRS

RF is very complex and difficult to grasp all its nuisances. RF signals are used in many aspects of embedded computing. Steve walked the group through the most important concepts and what they mean to embedded computing.

Solving the Unsolvable: How Technology Acceleration is Transforming Information Delivery for New Capabilities

By Ken Grob, Director, Elma Electronic

Rapid increase of compute performance from edge to network to cloud. Acceleration of new technology like generative or predictive AI that can be distributed throughout

Simon Collins of Abaco Systems discussed open architecture and innovation.

the end-to-end compute chain. New security paradigms required to ensure data security up and down; driving the need to plan and implement specific use case security considerations from end-to-end. Quantum computing, on the horizon and possibly entering with-in a standard business-planning window of five to seven years, adds a transformative and potentially disruptive computing domain. Ken illustrated the progress being made with new technologies to solve these complex problems.

Designing Modularity into Rugged Optical Transceivers Enables Flexible System Solutions

By Mark Benton, TE Connectivity

Many aerospace, defense, and marine system applications exist with unbalanced input and output channel counts that need to be configured to match different platform needs, or where the multiple input and output link endpoints are physically

Dawn Powers VPX

distributed within a platform. TE’s expert provided an overview of its MULTIGIG RT fiber-optic (FO) chiclet based optical transceiver (CBOT) platform, illustrated its modular flexibility to address these various system applications, and outlined future extensions of this product’s capability for longer reach, higher density, and increasing data rates.

Considerations in Architecting an HPEC GPGPU AI/ML System that Aligns to SOSA’s Goals

By Chris Fadeley, EIZO Rugged Solutions

SOSA’s impact on the rugged embedded market is now being seen more clearly than ever with many vendors aligning their products technical needs to SOSA’s goals. One of those goals is that VPX systems and the software that runs on them must be designed for reuse and flexibility both in mission and during maintenance. Deploying Ethernet as the full stack digital backbone has been the de facto method to achieve these goals, but it is important to also consider the limitations and potential performance impacts of a packetized network architecture on system resources. System architects looking to deploy cutting-edge AI/ML processing with GPGPUs to process the actual RF (VRT, MORA) and/or EO/IR data serviced by these high-bandwidth Ethernet backbones must fully understand the full architecture stack (hardware and software) to be successful. This talk detailed examples of factors to consider in architecting an AI/ML GPGPU system and what the industry needs to address NOW to avoid offering a false promise of capability to the mission set.

Achieving the Pipe Dream

By Nigel Forrester, Concurrent Technologies

Over the last few years, we’ve heard a lot about high-bandwidth Ethernet. Nigel’s presentation examined the benefits that can be realized by using separate control and data planes based on Ethernet and why using an analogous architecture to other markets and industries will pay dividends. Some of these benefits can be realized through flexible software applications and others through the use of real-time extensions.

New Kids on the Supply Chain Block: LEMs

By Ethan Plotkin, GDCA

The shock waves created by electronics obsolescence are profound. Typically beginning with component discontinuation and cascading up to end-users’ fielded equipment, the avalanches of cross-industry costs and inefficiencies throughout the supply chain are relentless and ubiquitous. In response to the chronic pain that electronics obsolescence continues to inflict throughout supply chains on individual companies and their customers, there has emerged a new category of service providers: Legacy Equipment Manufacturers, or LEMs. Many OEMs and end users embrace the idea of forming new strategic supplier relationships in support of their internal capabilities. LEMs have emerged as new type of strategic sourcing partner, because they present an innovative capability for all affected companies to deal with electronics obsolescence. Ethan laid out the LEM business model and what its emergence means to achieving feasible and resilient supply chains through the embedded electronics industry, all the way up to end users.

OpenVPX Trends and Updates

By Greg Rocco, Member, Technical Staff, MIT Lincoln Laboratory

OpenVPX is a living standard quickly adapting to the needs of the market. Greg Rocco is the father of OpenVPX (VITA 65): His open VPX tutorial is the beginning point for anyone new to the VPX concept and is a handy reference source for anyone designing with VPX. He reviewed the latest enhancements and changes to OpenVPX that will be in the 2023 release, now in its final approval stage.

A Bigger Tent: Expanding VITA into Broader Markets

By David Jedynak, Curtiss-Wright Defense Solutions

The strength of VITA standards over the last couple of decades has resided mostly in the A&D industry. While the A&D market benefits from large defense budgets, there is continuous downward cost pressure. In comparison to industrial/ commercial markets, however, the cost of A&D solutions is significantly higher.

For the A&D market, cost is typically less of a consideration than performance. Beyond the A&D market, there is growing demand for sophisticated, reliable, and secure electronics, closer in requirements to defense solutions than consumer electronics. Trends such as AI/autonomy, Internet of Things, and intelligent critical national infrastructures are driving new opportunities to apply the benefits of ruggedness, reliability, repeatability of designs, and road maps that support governmental long-term budget cycles that VITA has learned in the A&D market. David told the group: Now is the time to explore these new markets and grow the use of VITA standards in other industries.

All of these presentations, with video, are posted at www.EmbeddedTechTrends.com. It is highly recommended that you view the videos to get the maximum information.

To view all Embedded Tech Trends 2024 presentations and videos, visit https://www.embeddedtechtrends.com/2023/2023-Presentations.htm.

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Recent VITA Standards Releases

By Jerry Gipper, Editorial Director

Three standards have recently been ANSI- and VITA-approved via public VITA consensus ballot and published by VITA. Each has a unique background as to why it became a published standard. The following is a short synopsis of each of the standards.

ANSI/VITA 67.3-2023

Coaxial Interconnect on VPX – Spring-Loaded Contact on Backplane

This release is an update to a previous version of this standard. VITA standards are constantly monitored per the development process and updates can be requested at any time. This presents opportunities for improvements, revisions, or corrections to these standards, making them more relevant to the user community.

The VITA 67.3 standard defines coaxial connector modules used within the VPX architecture. The aperture concept defined in the base standard makes it possible to define new connector schemes that fit within the defined aperture opening. This revision adds 75-ohm SMPM and 75-ohm NanoRF contact interfaces to support video applications.

The primary goal of this standard is to build upon the framework laid out in VITA 67.0, VITA 67.1, and VITA 67.2 for detailing blind-mate analog interfaces. VITA 67.1 and VITA 67.2 only allow for a cable termination on the plug-in module’s contacts. Routing cables to another connector on the Plug-In Module can be difficult and unnecessary. The driving objective is to allow fixed contacts on the Plug-In Module and spring-loaded contact action on the backplane. This functionality allows for alternate packaging of the connector modules, potentially eliminating all cables on the Plug-In Module.

As the industry has progressed since the initial VITA 67 standards, the need for higher-contact densities has arisen. In addition to the physical space reductions by eliminating cable management, the VITA 67.3 backplane connector modules further increase space efficiency by taking advantage of the full 1.00-inch slot pitch. The contact position within the housings are no longer constrained to the fixed 2x2 and 2x4 SMPM arrays for greater flexibility and contact count.

The VITA 67.3 standard was written with future expansion and backward compatibility in mind. The standard structure defines the contacts in Section 3, connector modules in Section 4, and integration in Section 5. The contacts available are SMPM as described in Section 3.1, with higher-density interfaces SMPS in Section 3.2 and NanoRF in Section 3.3. The connector module rules within Section 4 allow for application specific implementation, and when combined with Section 5, ensure interoperability.

The connector module definition within Section 6 is designed with overarching VPX compliance in mind and included in connector modules specified in VITA 65.1 for use in VITA 65 OpenVPX slot profiles. These slot profiles support an ever-evolving ecosystem without ever needing to alter the backplane. Payload plug-in modules could be replaced as new capabilities, integrated within a slot, or require additional contacts with different arrangements. The upgrade is as simple as replacing the existing backplane connector module with the vendor provided replacement.

Integration of RF and optical contacts within a single connector module is defined in VITA 66.5. This motivation is supported to optimize the SWaP [size, weight, and power]

INTEGRATION OF RF AND OPTICAL CONTACTS WITHIN A SINGLE CONNECTOR MODULE IS DEFINED IN VITA 66.5.

of the VPX ecosystem. This aspect is of particular importance in 3U applications where backplane I/O is a limited resource. Sharing the connector module makes the best use of the available space while providing the flexibility designers require.

ANSI/VITA 87.0-2024

MT Circular Connectors – Type 1

As high-speed, high-bandwidth applications increase, so does the demand for high density interconnect solutions. Bridging the gap between active devices on the backplane and external equipment requires a rugged high-density small form factor interface.

This is a new standard that defines highdensity circular MT connectors utilizing plug and receptacle shells from the MIL-DTL-38999 family.

Circular MIL-DTL-38999 plug and receptacle shells provide a stable proven platform for thru-panel and inline applications. Pairing the commercial industry-standard MT ferrule with the MIL-DTL-38999 shells and unique inserts establish the groundwork for a reliable I/O connector family. This standard addresses a new connector interface that will support rugged highdensity MT applications.

The objective of this standard is to describe the mechanical structure surrounding the optical MT interface, alignment features, and physical parameters

required to provide optimal optical performance of the mated connector pair.

The interconnect system defined in this standard consists of MIL-DTL-3899 plugs and receptacles in sizes 11, 13, and 15. The scope of this standard includes shell size 11 with 1 MT ferrule, shell size 13 with 2 MT ferrules, and shell size 15 with 4 MT ferrules. The inserts for each shell size are keyed to provide multiple ferrule orientations with respect to the shell master key. Larger shell sizes might be added in the future for higher-density requirements. Included in this scope are plugs and receptacles with fiber lens or physical contact (PC) MT ferrules.

ANSI/VITA 91.0-2024

Connector for Higher Density VITA 46 Applications

Higher data-rate protocols are being designed into OpenVPX systems, enabled by processor technology advancements supporting higher signal speeds and more cores. Newer protocols such as PCIe Gen 5 and 200GBASE-KR4 Ethernet are being implemented and these protocol standards have road maps for higher data rates, in some cases doubling every two or three years.

As signaling rates increase above 25 Gbaud, the VPX slot connector needs to evolve to support signal-integrity requirements in the channel. The VITA 91.0 standard defines such a higher performance connector while also doubling pin density. Other alternative footprint connectors may also be standardized in the future.

This is a new standard that defines a higher-density and higher-speed alternative connector to the one specified in the VITA 46.0 VPX baseline standard. Because the VITA 46.0 and VITA 91.0

connectors are not intermateable, a VITA 91.0 plug-in module will not plug into a VITA 46.0 backplane and vice versa. This standard is written to address mechanical interoperability. Users can refer to VITA 65.0 and VITA 91.1 for slot profile definitions.

The format of this standard follows VITA 46.0. While not intermateable with VITA 46.x connectors, they are mate-height compatible with VITA 46.x connectors. Therefore, VITA 91.0 connectors can function adjacent to VITA 46.x VITA 66.x and VITA 67.x connectors in a VPX slot. (Figure 1.)

This standard is a great example of how hybrid standards can evolve to accommodate new technologies and application requirements within a standard definition. The market for hybrid configurations may be unique, but a standard gives a way for a broader base of suppliers to exist.

Leaders in Modular Open Standards enabling the Modern Warfighter

Go from development to deployment with the same backplane and integrated plug-in card payload set aligned to SOSATM and CMOSS. Includes chassis management, power and rugged enclosure for EO/IR, EW, SIGINT and C5ISR applications.

Figure 1 | Example of a mixed VITA 46/ VITA 91 3U Module

Can SOSA bring back interoperability?

By Jim Tierney

The new SOSA [Sensor Open Systems Architecture] Technical Standard – aimed at creating a common framework for transitioning military electronics sensor systems to an open systems architecture –is positioned to bring back interoperability by keeping the OpenVPX high-performance architecture while replacing the myriad of design options with a limited set of industry-agreed choices.

Military C4ISR [command, control, communications, computers, intelligence, surveillance, and reconnaissance] programs moving to the newest computing technologies face “forklift upgrades” or major overhauls because interoperability is long gone. Back in the days of VME, systems were built using components from many vendors; the standard enforced a plug-and-play commonality in designs. Today’s OpenVPX standard supports orders of magnitude increases in performance, but its wide-open flexibility means every system design is unique, driving up lifecycle costs and stretching out upgrade timeframes.

Longstanding issues continue to plague DoD programs

Most defense electronics programs struggle with long technology upgrade cycles that involve replacing complete systems, which could include a new chassis populated with updated computing modules and supported by more recent power and communications cabling. These complex upgrades take years to design and implement, driving up program life cycle costs. Long upgrade timeframes also mean that deployed processors, analog-to-digital (A/D) converters, and memory chips fall behind state-of-theart commercial components, often by several generations.

The underlying cause is a lack of technology interoperability. Customizations in hardware and unique supporting software make upgrading individual modules or specific components impossible. Interoperability, a stated goal in many programs, has rarely been achieved in any practical sense, at least not recently.

Interoperability and a look back at VME

In any technology, consistent component interoperability is based on adherence to a rigorous design standard. Embedded electronics once had such a standard – VME. For 25 years, the VME architecture defined commercial off-the-shelf (COTS) systems, while VME bandwidth increased from 40 Mbytes/sec on the original VMEbus to 80 Mbytes/ sec, then 160 Mbytes/sec and finally 320 Mbytes/sec on 2eSST. These bandwidths

MOSA Virtual Summit

Sponsored by Abaco, Aitech, Annapolis Micro Systems, Elma, LDRA, Lynx Software Technologies, New Wave Design, RTI, SV Microwave

Powered by Military Embedded Systems, the MOSA Virtual Summit is designed to drive awareness and thought leadership around MOSA initiatives like the Sensor Open Systems Architecture (SOSA), the C5ISR/EW Modular Open Suite of Standards (CMOSS), and the Future Airborne Capability Environment (FACE) and aims to study how they impact signal-processing, software, hardware, AI, and RF designs. (This is an on-demand event.)

Watch this webcast: https://tinyurl.com/2dbn4jcc

1 | Slot count was the only variable in 6U

seem small to us today, but they were able to keep up with the contemporary processing components.

A great strength of the VME ecosystem was true interoperability, supporting systems that combined components from many contributors into effective solutions. This was possible because VME was a mature and unambiguous standard. But eventually, after an incredibly long run, the VME connector eventually ran out of gas. (Figure 1.)

OpenVPX: Fast and (too) flexible VME’s successor was VPX, a standard created to deliver very high bandwidth

Figure

VME backplanes.

communications using a new high-speed connector concept. VPX, which morphed into OpenVPX, also uses the concepts of pipes, planes, and profiles to define an architecture capable of supporting multiple data transfer protocols, including Ethernet (in all its flavors), Serial RapidIO, and PCIe.

While clearly able to meet the data movement demands of today’s most advanced C4ISR programs, OpenVPX is also very much “open,” so much so that interoperability is not a real possibility. There are literally dozens of profile options, further complicated by many user-defined connector pins.

“We’ve designed and manufactured several hundred OpenVPX backplanes.” said my colleague and Atrenne Director of Engineering Keith Vieira. “No two of them are the same; the level of flexibility allowed by the standard still surprises me. Moving a board from one backplane to another is pretty much impossible without significant redesign.”

Design costs go up when every program uses a unique, essentially custom backplane, upgrade cycles are stretched out, and component reuse can’t happen.

SOSA’s goal: Bring back interoperability

The Sensor Open Systems Architecture (SOSA) Technical Standard is a comprehensive standard addressing long upgrade time frames and life cycle cost issues. Driven by the U.S. Department of Defense (DoD) with industry support, SOSA’s goals are to:

› Enable upgrades of system elements without redesigns

› Drive more competitive, cost-effective acquisitions

› Lower system life cycle costs

› Encourage commonality and reuse of components

› Enable interoperability between systems

SOSA is leveraging other, already-existing standards efforts: Starting at a high level, it is aligned with the DoD’s modular open systems approach (MOSA), focusing on using standardized hardware and software. SOSA also brings together elements from standards developed by each of the three military services, specifically the Army’s CMOSS (C4ISR Modular Open Suite of Standards), the Navy’s HOST (Hardware Open Systems Technology), and the Air Force’s SOA (Service Oriented Architecture) and UCI (Universal Command and Control Interface). The SOSA standard includes both business architecture and technical architecture; our focus here is on the technical side.

At a technical level, the SOSA standard adopted concepts and definitions from the OpenVPX standard, including a taxonomy of planes, pipes, and profiles. However, SOSA accepted only a small subset of the OpenVPX profile options. OpenVPX has quite a few plug-in card profiles (PICPs) that are, in many cases, largely redundant. To simplify that situation, SOSA employs the concept of a pinout “overlay” to define the functionality of previously undefined pins.

SOSA also reduces the number of protocol implementations defined within OpenVPX. However, the new standard does expand on the OpenVPX “Alternate Profile Module Scheme” with specific fields for RF pinouts, XMC overlay, and switch front panel fiber I/O.

The result is that SOSA systems will look like OpenVPX systems, but with a huge reduction in variability. A much more tightly defined technical specification means that cards will be interoperable between systems, and backplanes will be pin-compatible with a wide range of cards from a whole ecosystem of vendors. (Figure 2.)

Moving forward with SOSA

Today’s troops face a global adversary that is technically agile and futurefocused. If DoD programs cannot respond competitively, warfighters will lose the powerful technology advantage they now wield. Key to maintaining that advantage is the ability to rapidly insert new, more powerful technology into deployed sensor-enabled systems for radar, EO/IR [electro-optic/infrared], SIGINT [signals intelligence], EW [electronic warfare], and communications.

Jim Tierney is Vice President of Aerospace and Defense Systems at Atrenne Computing Solutions. He has been with the company for nearly 15 years.

Atrenne Computing Solutions https://www.atrenne.com/

Introducing Power Blade® 2000W+ Power Module

AirBorn’s new VPX Power Supply is a VITA 62, Open VPX compliant, 6U system with models for a 270 VDC input IAW MIL-STD-704. Power Blade is a SOSA aligned, rugged, highly-reliable, conduction-cooled, switch-mode unit built for high-end defense applications. Let’s go to work!

• Auxiliary DC Output: +3.3V/60A

• Efficiency of >94% Typical Above 50% Load

• Input-Output Isolation 2100VDC

• Main DC Output: +12V/180A

• Overvoltage, Overload, & Overtemperature Protection

• Programmable Regulated Current Limit

• VITA 46.11 System Management

2024 RESOURCE GUIDE INDEX

Acromag’s new VPX7600 is a SOSA aligned I/O Intensive single board computer. This SBC features Intel’s 11th Generation Tiger Lake-H Xeon W-11000E Series processor. The high-performance 8-core processor supports up to 32GB of dual-channel, soldered-down DDR4 ECC memory. It also contains an integrated Intel Gen12 UHD Gfx-32 graphics engine. A wide variety of I/O peripherals are supported. The XMC expansion site enables advanced computation capabilities with plug-in mezzanine modules. A DisplayPort 1.4 interface on the backplane with HBR3 data rates supports 4K resolution. NVME SSD on-board storage holds up to 1TB of data. Other peripheral interfaces include a 2.5GBASE-T port, USB 3.2, USB 2.0, SATA III, 4x GPIO, and an RS422 or dual RS232 ports. Air-cooled and conduction cooled versions are available. Board support packages facilitate use with Microsoft Windows®, Linux®, and VxWorks™ operating systems.

FEATURES

Ą Intel 11th Gen Xeon-W Tiger Lake-H 8-Core CPU

Ą 32GB of dual channel DDR4 SDRAM with ECC

Ą Up to 1TB NVMe SSD on-board storage

Ą 100Gb Ethernet Data Plane

Ą 10Gb Ethernet Control Plane

Ą x4 PCIe Gen3 Expansion Plane

Ą IPMC VITA 46.11 Tier-3 System Management

https://www.acromag.com/vpx7600

VPX7600 3U VPX SBC with Intel Tiger Lake-H Xeon W CPU

OpenVPX

Power Blade VPX Power Supply

AirBorn’s new VPX Power Supply is a VITA 62, Open VPX compliant, 6U system with models for a 270 VDC input IAW MIL-STD-704.

Power Blade is a SOSA aligned, rugged, highly reliable, conduction-cooled, switch-mode unit built for high-end defense applications. Let’s go to work!

FEATURES

Ą 2000W+, That's Nearly 2X Other 6U Power Supplies

Ą Auxiliary DC Output: +3.3V/60A

Ą Efficiency of >94% Typical above 50% Load

Ą Input-Output Isolation 2100VDC

Ą Main DC Output: +12V/180A

Ą Overvoltage, Overload, & Overtemperature Protection

Ą VITA 46.11 System Management, Open VPX compliant

AirBorn Inc. www.airborn.com

blanchfieldm@airborn.com

512-863-5585  www.linkedin.com/company/airborn-inc

Chassis Manager / SoM Optimized for VITA 65/SOSA™ Profiles

The VITA 46.11-aligned WILD™ VPX Chassis Manager / System on Module (WABGM0/2) enable critical chassis control, maintenance, and security functions, are optimized for VITA 65/SOSA profiles, and offer commercial-off-theshelf (COTS) availability.

Shown mounted to a 3U VPX Backplane

FEATURES

Ą Capability: Provides control and access to Plug-In Card JTAG and Maintenance ports, CLK1 usage, network functions & optional advanced security functions

Ą FPGAs: Xilinx UltraScale+™ Zynq (ZU5EG or ZU11EG) & MicroSemi PolarFire

Ą Mounting: Directly on backplane, or via 3U or 6U VPX plug-in carrier card

Ą Power: Only requires 3.3V

MADE IN U. S. A.

They are highly-integrated modules. They provide access to plug in card (PIC) JTAG and Maintenance ports, CLK1 usage via on-board Zynq FPGA, network functions, and some optional advanced security functions. For security, the Chassis Managers implement security signal interfaces and a Xilinx UltraScale+ Zynq MPSoC and latest Microsemi PolarFire FPGA, which can be end-user modified with the optional BSP.

Annapolis Micro Systems, Inc. www.annapmicro.com

Ą Optional BSP: For customizing Zynq PS & PL for security

Ą Standards: VITA 46.11 & MIL-STD-1553

Ą Availability: Commercial off-the-shelf

www.annapmicro.com/product-category/chassis-and-backplane-accessories/

 marketing@annapmicro.com  410-841-2514

Versal FPGA Boards are SOSA™ Aligned

Annapolis WILDSTAR™ Versal Premium Boards are the highest performing OpenVPX COTS FPGA Processing Baseboards on the market, with capability for 100Gb Ethernet over copper on the VPX backplane. Blind mate optical and/or RF (VITA 66/67) is also available. All 100GbE boards are VITA 65-compliant and align with SOSA Technical Standard 1.0.

High Performance

These SOSA aligned Plug-In Cards (PIC) integrate the latest Versal Premium FPGAs up to VP2502 with 472 AI Engines. AMD’s new Versal ACAP FPGAs are engineered for processing-intensive applications like Radar, EW, and SIGINT.

High-performance digitization is via Mezzanine Card(s) connected to FMC+ based I/O site(s). Choose between a JESD-based (bandwidth optimized) or LVDS-based (latency optimized) approach.

Rugged

Annapolis rugged FPGA boards are designed from the ground up to perform at the highest levels in the harshest environments. They are designed and tested for reliability, utilizing high performance air, conduction, or air-flow-through cooling for thermal control.

Designed & Manufactured in USA

All Annapolis products are engineered and manufactured under one roof in the United States. This co-location of engineering and manufacturing allows for more aggressive design, and better quality control and production flexibility.

Choose between Bandwidth or Latency-optimized Versal Boards

Ą General Features

• Up to two AMD Xilinx Versal Premium FPGAs

• Multiple levels of hardware and software security

• A Full Board Support Package for fast and easy Application Development

� BSP options include traditional RTL and new DFX RTL and Vitis™ paths

Ą Mezzanine I/O

• Optimized for VITA 66/67 interfaces

• Based on FMC+

• Available options:

� Jariet Electra-MA: 2TX (64GSps)/2RX (64GSps)

� Xilinx RFSoC: 2TX (5GSps)/8RX (5GSps)

� Xilinx RFSoC: 4TX (5GSps)/4RX (5GSps)

� TI 2TX (3.2 GSps)/2RX (3.2 GSps)

� Others covered under NDA

Ą Mechanical and Environmental

• Air, conduction, or AFT cooled: -55°C to +85°C Operating

• Available in extended temperature grades

• Hot swappable for air-cooled variants

• Only requires +12V and +3.3VAUX from backplane

www.annapmicro.com/versal-products/ WILDSTAR Boards are cooled via Air, Conduction, or Air-Flow-Through

100GbE

Direct RF Products: 64 GSps Rates + Wide Coverage

Direct RF sampling is transformative for Signal Acquisition and Signal Processing. Direct RF data converters operate directly at the antenna frequency, reducing latency and eliminating the need for intermediate frequency stages. Also, Direct RF conversion can instantaneously tune across a very wide frequency span – from 0.1 to 36 GHz. Now you can directly digitize and process wideband signals, simplifying system architecture and enabling new EW, SIGINT, and spectrum processing capabilities.

Annapolis is now offering the lowest latency and highest bandwidth 64 GSps Direct RF solutions on the market:

• WILD FMC+ DME1 (top) – an OpenVPX Mezz Card

• WILDSTAR 3AE1 (right) – a 3U OpenVPX Baseboard

• WILDSTAR SAF1 (below) – a Small Form Factor Module

Ą WILDSTAR SAF1 Small Form Factor Module (photo below)

• Ideal for edge applications close to the sensor and in other tight envelope man-packable environments

• Intel Altera Agilex 9 MCP1 Direct RF-Series AGRW014 FPGA

• ADC: 4 Channel, 64 GS/s, 10 bit Resolution

• DAC: 4 Channel, 64 GS/s, 10 bit Resolution

• Mates with modular RF and digital I/O cards

Ą WILD FMC+ DME1 ADC & DAC Mezz (photo above)

• Pair one with a 3U Baseboard or two with a 6U Baseboard

• One Jariet Technologies Electra-MA Transceiver

• ADC: 2 Channel, 40-64 GS/s, 10 bit Resolution

• DAC: 2 Channel, 40-64 GS/s, 10 bit Resolution

• Analog Input Bandwidth: 20GHz (-6dB) typical

• Maximum Instantaneous Bandwidth: 6.4GHz

• Run Time Selectable ADC Decimation: 8-1024x

• JESD204B/C interface with 16 lanes up to 30Gbps

• Developed in alignment with SOSA™ 1.0

Ą WILDSTAR 3AE1 3U OpenVPX FPGA Processor (photo above)

• SOSA aligned 3U VPX Plug-In Card

• Intel Altera Agilex 9 MCP2 Direct RF-Series AGRW014 FPGA

• ADC: 8 Channel, 64 GS/s, 10 bit Resolution

• DAC: 8 Channel, 64 GS/s, 10 bit Resolution

• Supports Analog Interface Cards for front-end personalization

• Air, Conduction, or Air-Flow-Through cooled

• Developed in alignment with SOSA™ 1.0

Contact us today to request block diagrams and additional specifications. The 3AE1 provides VITA 67 backplane RF support

www.annapmicro.com/direct-rf-products/

Chassis/Switches Support 8x or 4x Gen4 PCIe, Plus Eight LVDS or Dual 100Gb Ethernet

The WILD100™ 13-Slot 3U OpenVPX Chassis (WC31DH) is a COTS 19" rackmount Chassis, Backplane, and Chassis Manager.

It includes two HD Switch slots that feature high-density VITA 91 connectors with double the available density, up to 64 lanes of Ethernet or PCIe or 128 LVDS pairs. The two HD switch slots allow the chassis to handle all Data and Control Plane Ethernet via one slot, with the second switch slot dedicated to the expansion plane – Ethernet, PCIe and/or LVDS. This enables deployment for low latency jamming or radar applications.

VITA 91 high-density connectors allow for a completely switched backplane. This enables all the slots to be on the same nonblocking Ethernet switch instead of two switches chained together, and it facilitates a flexible, programmable expansion plane. This supports either 8x or 4x Gen 4 PCIe, plus eight LVDS or dual 100Gb Ethernet.

Optional Switches, FPGA Boards, Storage Cards, VITA blocks and cables are also available. The following Switches include the same high density VITA 91 connectivity:

• WILDSTAR 3E20 3U Ethernet Switch – Up to fourteen 40/100GbE ports

• WILDSTAR 3P20 3U PCIe/LVDS Switch – Up to 128 LVDS or eight 8x PCIe interfaces

• WILDSTAR 3H20 3U Combo Switch – Combines 40/100GbE, Gen4 PCIe and/or LVDS

plane switches and processors support encrypted secure communication

www.annapmicro.com

Ą Chassis & Backplane Features

• Front-loading, air-cooled Chassis with conduction-cooled slots

• Thirteen 3U OpenVPX Slots

� Eight 14.6.11 Primary RF/Compute Intensive profile

� Two HD Switch profiles

� One 14.9.2 Timing profile

� Two 12V-only VITA 62 Power Supply Slots

• Input power is 28VDC per MIL-STD-704F

� 25 Gbps Line Rates on Data and Expansion Planes

� 25/40/100Gb Ethernet

� SDR/DDR/QDR/EDR InfiniBand

� Gen 3/4 PCI Express

� Custom protocols up to 25Gbps per lane

• SOSA™-aligned Backplane profiles

� Payload Profile: SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-n

� Timing Profile: SLT3x-TIM-2S1U22S1U2U1H-14.9.2

• VITA 66.5C and VITA 67.3C for payload slots

• Integrated ultra-low skew AUXCLK/REFCLK radial distribution

• Support for CLK1 direct connection between payload slots to Chassis Manager FPGA

• Optional WAB3X0 for two additional 100GbE optical connections

Ą Chassis Manager

• VITA 46.11 compliant WABGM2

• Plugged directly onto backplane, or cabled

• Xilinx UltraScale+ ZU11EG MPSoC running Linux for CHmC

� Processing Subsystem (PS)

� Programmable Logic subsystem (PL)

• Integrated JTAG access/control from chassis manager to each slot

� External JTAG connection with SW selectable multiplexing from each slot

� Xilinx JTAG over ethernet via Chassis Manager

• VPX slot maintenance ports (UARTs) aggregation

• Includes three 10/100/1000 BASE-T external connections which are bridgeable to switch slots

• Supports dual redundant MIL-STD-1553 interfaces

• Optional advanced security features

Ą Application Development

• Standard Chassis Manager support delivered with all systems

• Optional Full Board Support Package for Chassis Manager

� Enables customization if needed of Zynq PS and PL

� Provides fast and robust HDL-based application development environment

www.annapmicro.com/products/wc31dh/

marketing@annapmicro.com

410-841-2514

PSC-6236 3U VITA 62 OpenVPX 400-W

Dawn’s VITA 62 Compliant PSC-6236 is designed to operate in a military environment over a wide range of temperatures at high power levels. Can be special ordered to produce SOSA Voltage rails (12V & 3.3V Aux), or three separate (Positive) custom voltage outputs up to 400 Watts.

Dawn’s embedded RuSH (Rugged System Health Monitor) technology provides the “smarts” for monitoring and control of critical system performance parameters including Voltage, Current, Temperature, control of power sequencing and shutdown of all voltage rails.

Custom firmware enables additional features such as on board accelerometer access, shock /vibration events or customer specified monitoring windows, power sequencing, alerts, alarms, status and control, I2C GPIO functions, etc. The RuSH monitor is interfaced into the OpenVPX (I2C) management plane, providing an I2C communication link with system cards. FAIL# and DEGRADE# status output for direct system alert. Optional LED / Status / Power Good output.

FEATURES

Ą True 7 Channel supply provides full Open VPX support.

Ą Available in air cooled or Reverse Side wedge lock conduction cooled models.

Ą Factory programmable power sequencing of all voltage rails.

Ą Optional configuration provides up to 400W on single Rail.

Ą The only 3U VITA 62 power supply with all VPX Voltage rails and +28V output option for chassis holdup/ fan drive.

Ą The only 3U VITA 62 power supply with on board ADX375 3-axis accelerometer high resolution measurement up to ±200 g.

Ą Custom power capacity and voltage input range configurations available.

ww.dawnvme.com/shop/power-supplies/psc-6236-conduction-cooled/

The IC-INT-VPX3l is a 3U VPX Single Board Computer based on the Intel Xeon® W (Tiger Lake-H) processor and designed in alignment with the SOSA™ Technical Standard. It is aimed at large bandwidth and high-demanding edge applications. This board leverages the latest Intel 10nm Intel® Xeon® W processor enhancements to provide high-computing performance and high speed interfaces to system integrators with power, fast IO and latest generation video interfaces. The IC-INT-VPX3l can manage and process a significant number of IO throughput for graphics, networking and storage owing to the processor’s 8 cores, the Intel® Xe graphics engine, a large number of Ethernet ports and the DDR4 memory. The XMC slot enables to report IOs on the rear to extend IO system-specific interface requirements. Also, it supports the well-proven Intel® Advanced Vector Extensions 512 (AVX-512) instruction. BSP are provided for Linux® and VxWorks®. It is available in air-cooled and conduction-cooled versions.

FEATURES

Ą 3U VPX

Ą Intel Xeon® W (Tiger Lake-H) processor

Ą DDR4 with ECC up to 32GB

Ą 1 * 100G Ethernet port (Data Plane)

Ą 1 * PCIe x4 (Expansion Plane)

Ą Aligned with the SOSA™ Technical Standard

https://www.interfaceconcept.com/products/single-board-computers/3U-VPXSOSA/391-IC-INT-VPX3l-SOSA-aligned-3U-VPX-Intel-Xeon-W-SBC

ComEth4682e - SOSA aligned 3U VPX GbE Ethernet Switch

The SOSA aligned ComEth4682e is a 3U OpenVPX Ethernet switch capable of 25/100Gb Ethernet transfers. It is aimed at high-computing radar, sensor network processing applications. The ComEth4682e integrates a Layer 2 & 3 Ethernet switch, as well as a control processor to support Control and Data Planes that are virtually separated for highly secured 3U VPX systems. The switch features a total of 56 x 25Gbps SerDes: 32 lanes are routed to the rear VPX connectors as 1/10/25Gbs Ethernet ports or can be merged into 4-lane Fat Pipes to obtain 8 lanes as 40/100Gbs Ethernet ports. Likewise for the 24 optical fiber ports, they are routed to the front panel (2*MPO connectors) as 1/10/25Gbs Ethernet ports or can be merged in set of 4 fibers to obtain 3 lanes as 40/100 Gbs Ethernet ports. It can be remotely configured by the network management application switchware web interface, SNMP or CLI interfaces. This product is available is air-cooled, conduction-cooled and AFT (Air-Flow-Through) grades.

Interface Concept www.interfaceconcept.com

FEATURES

Ą 3U VPX Managed Layer 2+/3 switch

Ą Aligned with the SOSA™ Technical Standard

Ą Compliant with the VITA 65.0

SLT3-SWH-2F24U-14.4.3

Ą Compliant with the VITA 65.0

SLT3-SWH-6F1U7U-14.4.14 (option)

Ą Up to 56 ports

Ą 24 optical fibers (front MPO connector)

Ą 1GBASE-KX, 10 & 25GBASE-KR, 40 & 100GBASE-KR4 ports (rear)

info@interfaceconcept.com  510-656-3400  www.linkedin.com/company/interface-concept

The new IC-ARM-VPX3c 3U VPX SBC is based on the NXP Arm® Cortex®-A72based LX2080A/LX2160A Multicore Communications Processor and is aligned with the SOSA™ Technical Standard. This board design meets systems integrators needs with 25 Gbit/s Ethernet interfaces on a 3U VPX system backplane currently specified by the SOSA™ working group. Thanks to its Ethernet retimers with autonomous KR link training, the IC-ARM-VPX3c interfaces are immediately available under UBoot firmware. No specific driver is needed to support backplane’s communications. The NXP Arm® LX2160A processor supports up to 100 Gbit/s Ethernet routed on the backplane. The IC-ARM-VPX3c features 32GB of DDR4 memory, local storage options, PCIe Gen 3.0, SATA3, USB, UART and multiple 10/40 and 25/100 Gigabit Ethernet interfaces on the backplane. This board complies with VITA 65.0 standard and comes with a boot loader and a Linux or VxWorks Board Support Package. It is available in air-cooled and conduction-cooled versions.

FEATURES

Ą 3U VPX

Ą NXP Arm® LX2080A/LX2160A processor

Ą VITA 65.0 Slot Profile SLT3-PAY1F1F2U1TU1T1U1T-14.2.16

Ą 10, 25, 40 and 100 GbE interfaces with KR support

Ą Aligned with the SOSA™ Technical Standard

Ą Air-cooled and conduction-cooled versions

Introducing the Kontron VX307H Computing Node, the ultimate SOSA™ Architecture Booster

Offering best-in-class performance and XMC support on VITA 48.8 Air Flow Through (AFT) models, this rugged 3U embedded server card redefines the SWaP-C limits and enhances the capabilities of your HPEC architectures. Designed as a reusable building block with numerous innovations and extensions to fulfill the most demanding mission profiles.

Powered by the Intel® Xeon® D-2700 Platform, the VX307H is offered with a 12, 16, or 20-core processor with features like 100Gb Ethernet, PCIe gen4, and an on-chip DMA engine. AVX-512 VNNI support is engineered for AI, signal processing, and cryptography, offering double the performance over previous generations for critical applications like computer vision and media processing.

The VX307H is available in VITA48.8 AFT and conductioncooled versions, operating in extended temperature ranges and aligned with industry standards. Leveraging the VX307H architecture is a sure way to deploy a vast choice of applications and serve demanding programs with a single computer blade for years to come, optimizing development efforts and long-term logistics.

Unleash the potential of your engineering projects with the SOSA™ Architecture Booster – Kontron VX307H Computing Node.

Contact us to explore how this rugged solution can transform your defense applications.

FEATURES

Ą Intel® Xeon® D-2700 HCC processor with 100Gb Integrated Ethernet

Ą From 12 to 20 processing cores to be adapted to SWaP-C applications

Ą Enhanced instructions for Artificial Intelligence and Signal processing (Intel AVX-512, VNNI)

Ą Up to 64GB DDR4 memory with ECC

Ą New VITA48.8 AFT (Air Flow Through) and VITA47 CC3 (Conduction-Cooled) support

Ą XMC support on VITA48.8 AFT versions

Ą Security enforced by Hardware Root of Trust

Ą Designed in accordance with SOSA™ requirements

Ą Meets VITA 47 class EAC4 V2 (extended temperature environments up to of 0 °C/+55 °C)

Ą Long term availability with 10-years of typical lifecycle

Ą Ensures trustable data with M.2 NVMe SSD Boot storage

VX307H: SOSA™ Aligned 3U VPX PIC

SAVE-820, SAVE Compliant Chassis Solution

Standardized A-Kit/Vehicle Envelope (SAVE) chassis, conform to size, weight, power, connector requirements and electrical interfaces for C5ISR systems identified under the SAVE standard. Chassis compliant to the SAVE standard are intended to address rugged electronic system packaging and connectivity requirements for deployment in Army ground vehicles.

In response to this requirement LCR has introduced the SAVE820. The 820 is a SAVE compliant deployment chassis that enables insertion of mission systems into critical battlefield applications including EW, SIGINT, RADAR, weapons control systems and others.

The chassis supports 3U VPX SOSA aligned and CMOSS payloads common to systems conforming to the standard. It includes the complete front panel connector complement outlined under the standard. It also may include custom I/O complements and modifications in addition to those addressed in SAVE chassis requirements. Custom backplanes accommodate 8 payload modules and 2 VITA 62 power supplies including all VPX CMOSS and SOSA aligned modules and their associated profiles. It is designed to accommodate integrated payload combinations including Ethernet switch, I/O intensive SBC, and compute intensive full aperture FPGA/RF cards. The rugged design is intended for deployment in a wide range of application environments as noted in the SAVE standard and its robust air / 48.2 conduction cooling arrangement cools payloads drawing up to 650W total power.

The chassis along with optional shock isolation tray and cabling meets SAVE dimensional requirements: 9.3” (H), 15.9 (W) x 16.1" (D) with 2" x 4" notch / keep out space, top rear.

Using your payload modules or our own VPX and SOSA aligned module suppliers, LCR will work with your team to provide payload selection and system integration services and as needed.

At LCR, our experienced and engaging engineering team will work with you to ensure mission success and LCR program managers are industry professionals who provide highly effective management from program start to finish.

• SAVE compliant for Army ground vehicles

• Intended for integrated C5ISR applications

• Supports SOSA aligned module profiles

• I/O complement meets SAVE requirements

• 8 payload and 2 power supply 3U VPX backplane

• Insertion into the SAVE (Standardized A-kit Envelope) Backplane supports switch, SBC and RF SOSA aligned modules

• Complies with SAVE SWaP mounting and I/O requirements

• Designed to meet MIL-STD-810, MILSTD-461, and MIL-1275

• Cooling for up to 650W of TDP

• Designed to meet 55C ambient temperature requirements with max operation of 71C

SOSA Aligned, OpenVPX, and SpaceVPX Products

Pixus offers high-performance chassis platforms, backplanes, and chassis managers. Specialists in advanced cooling solutions and high-speed backplane designs, Pixus offers MIL rugged and commercial grade modular configurations.

Our SOSA Aligned products include multiple 100GbE and PCIe Gen4 designs and cooling solutions from airflow over conduction, Air Flow Through, Air Flow By, and Liquid Cooling options. The company has various SpaceVPX and rugged ATR solutions, contact Pixus for details today!

Pixus USA is a member of the SOSA Consortium.

Pixus Technologies www.pixustechnologies.com

FEATURES

Ą SOSA Aligned OpenVPX chassis in ATR, MIL rugged rackmount, and lab/test formats

Ą Backplane design expertise up to and above 100GbE speeds, RT3 connector

Ą SlotSaver mezzanine-based SOSA aligned chassis manager Tier 3+

Ą 100% US based software/firmware for SOSA / OpenVPX chassis manager, versatile design

Ą SpaceVPX test/dev and deployable rugged systems

www.pixustechnologies.com

 sales@pixustechnologies.com  519-885-5775 | 516-344-5459

Trusted Computing and Security Within the SOSA Technical Standard

Sponsored by Curtiss-Wright and LDRA

The Sensor Open System Architecture (SOSA) Technical Standard is known for enabling interoperability and commonality within military sensor and mission-computer applications, but a critical part of SOSA not often discussed is how it provides for security in SOSA aligned solutions.

This webcast featuring industry experts covers how the SOSA Technical Standard enables security and trusted computing from both a hardware and a software perspective. (This is an on-demand event.)

Watch this webcast: https://tinyurl.com/t2k35yp7

Introducing the VPXtra® 400DW-IQI, Behlman’s first power supply with a wide range DC input that is fully compliant for all platforms in the Army CMFF program. This rugged, highly reliable switch mode 3U VPX unit meets a new standard of adaptability, and is backed by unmatched integration support from the Behlman team.

> Developed in alignment with the SOSA™ Technical Standard and VITA 62.0

> Delivers over 400 watts of DC power via two outputs

> 90% typical efficiency

> Features cutting-edge Tier 3 software

> System management integration via VITA 46.11 compatible IPMC