p. 5 Editor’s Foreword VPX ecosystem steps up
p. 14
Road maps VPX road map
Advertiser Index Page Advertiser
15
Alphi Technology Corporation – Mission-critical solutions
1
Annapolis Micro System – SOSA-aligned 100GB Ethernet 6U VPX switch
ASSISTANT MANAGING EDITOR Lisa Daigle lisa.daigle@opensysmedia.com ASSOCIATE EDITOR Emma Helfrich emma.helfrich@opensysmedia.com
24
Behlman Electronics – 3 Phase. 3U. 1 Choice.
13
Elma Electronic Inc. – VITA 48.4 Liquid Flow Through Cooling
3
VITA EDITORIAL DIRECTOR Jerry Gipper jerry.gipper@opensysmedia.com GROUP EDITORIAL DIRECTOR John McHale john.mchale@opensysmedia.com
DIRECTOR OF E-CAST LEAD GENERATION AND AUDIENCE ENGAGEMENT Joy Gilmore joy.gilmore@opensysmedia.com ONLINE EVENTS SPECIALIST Sam Vukobratovich sam.vukobratovich@opensysmedia.com CREATIVE DIRECTOR Stephanie Sweet stephanie.sweet@opensysmedia.com SENIOR WEB DEVELOPER Aaron Ganschow aaron.ganschow@opensysmedia.com
Embedded World Exhibition & Conference – … it’s a smarter world
7
Vector Electronics – VME/VXS/cPCI chassis, backplanes & accessories
17
Verotec Integrated Packaging – Continuing 50 years of excellence in functional and elegant electronic packaging
WEB DEVELOPER Paul Nelson paul.nelson@opensysmedia.com CONTRIBUTING DESIGNER Joann Toth joann.toth@opensysmedia.com EMAIL MARKETING SPECIALIST Drew Kaufman drew.kaufman@opensysmedia.com
SALES/MARKETING SALES MANAGER Tom Varcie tom.varcie@opensysmedia.com (586) 415-6500 MARKETING MANAGER Eric Henry eric.henry@opensysmedia.com (541) 760-5361
Profile Index
STRATEGIC ACCOUNT MANAGER Rebecca Barker rebecca.barker@opensysmedia.com (281) 724-8021
Advertiser
Page
COMMUNICATIONS Alphi Technology Corp Interface Concept
21 21
OPENVPX Sponsored by Annapolis Micro Systems Acromag
21 22
STRATEGIC ACCOUNT MANAGER Bill Barron bill.barron@opensysmedia.com (516) 376-9838 STRATEGIC ACCOUNT MANAGER Kathleen Wackowski kathleen.wackowski@opensysmedia.com (978) 888-7367 SOUTHERN CAL REGIONAL SALES MANAGER Len Pettek len.pettek@opensysmedia.com (805) 231-9582 ASSISTANT DIRECTOR OF PRODUCT MARKETING/SALES Barbara Quinlan barbara.quinlan@opensysmedia.com (480) 236-8818 STRATEGIC ACCOUNT MANAGER Glen Sundin glen.sundin@opensysmedia.com (973) 723-9672 INSIDE SALES MANAGER Amy Russell amy.russell@opensysmedia.com
RADAR Sponsored by ADLINK
22
RUGGED Interface Concept TE Connectivity
22 22, 23
TEST & MEASUREMENT Dawn VME Products UAV Dawn VME Products
ASIA-PACIFIC SALES ACCOUNT MANAGER Patty Wu patty.wu@opensysmedia.com EUROPEAN MARKETING SPECIALIST Steven Jameson steven.jameson@opensysmedia.com +44 (0)7708976338 BUSINESS DEVELOPMENT EUROPE Rory Dear rory.dear@opensysmedia.com +44 (0)7921337498
23 www.opensysmedia.com
23
PRESIDENT Patrick Hopper patrick.hopper@opensysmedia.com EXECUTIVE VICE PRESIDENT John McHale john.mchale@opensysmedia.com EXECUTIVE VICE PRESIDENT Rich Nass rich.nass@opensysmedia.com CHIEF FINANCIAL OFFICER Rosemary Kristoff rosemary.kristoff@opensysmedia.com
WEBCASTS Air Force, Army, Navy Convergence on Military Open Architectures Sponsored by Annapolis Micro Systems, Elma Electronic, Kontron, and Pentek https://bit.ly/2rQeH0l
EMBEDDED COMPUTING BRAND DIRECTOR Rich Nass rich.nass@opensysmedia.com SENIOR EDITOR Sally Cole sally.cole@opensysmedia.com ECD EDITOR-IN-CHIEF Brandon Lewis brandon.lewis@opensysmedia.com SENIOR TECHNOLOGY EDITOR Alix Paultre alix.paultre@opensysmedia.com TECHNOLOGY EDITOR Curt Schwaderer curt.schwaderer@opensysmedia.com ASSOCIATE EDITOR Perry Cohen perry.cohen@opensysmedia.com CREATIVE PROJECTS Chris Rassiccia chris.rassiccia@opensysmedia.com PROJECT MANAGER Kristine Jennings kristine.jennings@opensysmedia.com FINANCIAL ASSISTANT Emily Verhoeks emily.verhoeks@opensysmedia.com
The Evolution of Higher Speed and Density in Rugged Electronic Packaging Sponsored by TE Connectivity https://bit.ly/2reaHqr
2 | VITA Technologies Application Guide Winter 2019
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On the cover The VITA Technologies 2020 Application Guide showcases technologies based on VITA standards, including FMC, OpenVPX, XMC, and related rugged boards, systems, and components. Also discussed: SOSA-aligned products showing the capabilities of open architectures. Featured on the cover: The Annapolis Micro System SOSA-aligned 100 GB Ethernet 6U VPX switch.
Is Arm the future for airborne platforms in military and aerospace? » p. 10
FEATURES
By Rick Hearn, Mike Slonosky, Geoffrey Waters, and Lisa Sarazin
10 Special Feature Is Arm the future for airborne platforms in military and aerospace?
By Rick Hearn, Mike Slonosky, Geoffrey Waters, and Lisa Sarazin
Technology Features 14
VPX road map
18
Mezzanine madness: The future of VITA mezzanines
By Jerry Gipper, Editorial Director By Jerry Gipper, Editorial Director
DEPARTMENTS
5 Editor’s Foreword
VPX road map » p. 14
By Jerry Gipper, Editorial Director
Jerry Gipper
VPX ecosystem steps up
6 VITA News
Jerry Gipper
SOSA demonstration system aims to show what open architectures are made of
8 VITA Standards Update VITA Standards Organization activity updates
21 2020 VITA Technologies Application Guide Communications OpenVPX Radar Rugged Test and Measurement UAV
Mezzanine madness: The future of VITA mezzanines » p. 18
By Jerry Gipper, Editorial Director
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4 | VITA Technologies Application Guide Winter 2019
10/1/08 10:44:38 AM
www.vita-technologies.com
Editor’s Foreword By Jerry Gipper, Editorial Director @VitaTechnology
jerry.gipper@opensysmedia.com
VPX ecosystem steps up The first serious blast of winter just hit my area! It made me realize that we are not far away from the ninth annual Embedded Tech Trends forum. Scheduled for January 27 and 28 in Atlanta, Georgia, it promises to be an intense couple of days. I always look forward to the presentations and catching up with everyone. So much networking and information exchange happens so fast, it often takes a few days to decompress when I get home!
of my mission with the presentations is to develop better voices and thought leaders for our ecosystem.
For those that are not familiar, Embedded Tech Trends is an industrywide forum where suppliers of component-, board-, and system-level solutions can meet exclusively with members of relevant industry media to discuss technologies, trends, and products.
This year debuts a key event for the VPX ecosystem: Immediately following Embedded Tech Trends is the Tri-Service Open Architecture Interoperability Demonstration (TSOA-ID) – a new, exclusive event for the media, acquisition community, and industry influencers, hosted by the Georgia Tech Research Institute at the GTRI Conference Center in Atlanta, Georgia.
The Georgia Tech Hotel and Conference Center in Midtown Atlanta will be home for Embedded Tech Trends. The theme for 2020 is “Inventing. Connecting. Inspiring. Thriving.” We always choose a theme that ties into both the local area and our technology. The city of Atlanta has been marketing this theme and I think it fits our messaging as well. The goal of Embedded Tech Trends is to educate the media covering the community of embedded computing developers in target vertical markets on the application of system, board, and switch fabric technologies. The forum also provides an outstanding networking opportunity between the media and ecosystems supporting the embedded systems computing industry. Ultimately, it’s all about inventing, connecting, inspiring, and thriving for the embedded computing industry. The presentations are in the TED Talk style: short, with minimum slides (I hope!). I push the presenters out of their comfort zone a bit, but in the end, they understand the value of this format. Part www.vita-technologies.com
The media representatives in attendance love this event because in a very short time, a firehose-full of information comes their way, an efficient use of their time. This event allows them to develop plans with the sponsors and commit content for the upcoming year. We have built a deep library of past presentations and videos of the presentations. I encourage you to check some of them out at the Embedded Tech Trends website (http://www.embeddedtechtrends.com). The presentations are posted at the completion of the event, with the videos to follow.
This first-time event will have several keynote presentations from U.S. Department of Defense (DoD) department representatives discussing the importance of wellsupported open architecture computing solutions to their acquisition plans going forward. The DoD recognizes the acute need to move quickly with embedded computing and is trying to embrace the COTS strategy in the best way possible. Live demonstrations will guide the audience from Systems Acquisition and Integration, on to Module Specification and Development, then Conformance (qualification), and finally, Open Systems Realization. Joining Tri-Service representatives in demos will also be industry vendors representing industry and government partnership with CMOSS, HOST, SOSA, and VITA standards development organizations. TSOA-ID supports the tenets of the “Modular Open Systems Approaches for our Weapon Systems is a Warfighting Imperative” tri-service memo issued by the Secretaries of Air Force, Army, and Navy in January 2019. Demonstrations will reveal the ease of interoperability (exchange of hardware and software modules), faster incorporation of innovation, and delivery of new capabilities or replacement technology. It will demonstrate the maturity and acceptance of open architecture development. The event will feature both hardware and software that is key to advancing the use of COTS technology. The DoD has invested in Small Business Innovation Research (SBIR) programs to encourage R&D that has the potential for changing the way open architectures are used. Of particular interest: configuration and testing software tools. I hope to be able to talk more about these after the event. I have been involved in the planning of the TSOA-ID event for most of the past two years. It was driven by the need to both expand the ecosystem to fill gaps in the technology and to provide real proof that the open concept we preach is the best viable solution for today’s challenging technologies. Because of the audience with both media and key purchase decision makers, the suppliers have had to step up their game considerably. I look forward to participating in TSOA-ID. VITA Technologies Application Guide Winter 2019 |
5
VITA News By Jerry Gipper exec@vita.com
SOSA demonstration system aims to show what open architectures are made of Pentek, Herrick Technology Laboratories (HTL), and Kontron have developed products aligned with the Sensor Open Systems Architecture [SOSA™] Technical Standard that are used in a new 3U VPX demonstrator system designed to illustrate the capabilities of open systems architectures. This flight-qualified system is ideal for electronic warfare (EW), SIGINT, radar, and communications applications. The SOSA Consortium is chartered with creating a common framework for transitioning sensor systems to an open systems architecture, based on key interfaces and open standards established by industry–government consensus. The benefits of such an architecture include improved interoperability as well as reduced development time, deployment, and costs. The SOSA approach establishes guidelines for command, control, communications, computers, intelligence, surveillance, and reconnaissance (C4ISR) systems. The objective is to allow flexibility in the selection and acquisition of sensors and subsystems for use over the full life cycle of a C4ISR system.
FIGURE 1
Pentek/SOSA Collaborative Demonstration System. Source: Pentek, Inc.
Acie Vickers, CEO and president of HTL, says “By providing key components for this design, Kontron and Pentek are helping to deliver on the open systems architecture promise of faster and simplified technology updates for defense sensor platforms.”
Open architecture modules The demonstrator system – in an HTL HTLv-C-19 chassis with 16 payload slots and three power-supply slots – includes two slots with Kontron VX305C 40G SBCs with 12-core Xeon D processors and Pentek 71813 data-converter XMC modules with Xilinx Kintex Ultrascale FPGAs; eight RF/payload slots; one slot with a Herrick PNTRv PNT reference module with radial clock; two slots with 40/100 Gigabit Ethernet switches; two slots with PCIe Gen 4 and 1/10 Gigabit Ethernet switches; and three 100-watt power supply slots. (Figure 1.) The system-level interfaces are also aligned with the SOSA Technical Standard to maximize the chassis-level interoperability. The HTLv-C-19 chassis is designed to the VITA 48.2 VPX REDI conduction-cooling standard for rugged environments. “The Jade Model 71813 directly addresses I/O needs called out in the emerging SOSA standards,” said Paul Mesibov, Pentek’s chief technical officer and SOSA standard contributor. “Herrick Technology Laboratories and another major U.S. system integrator have received shipments of this Kontron SBC for U.S. defense community applications,” said Mark Littlefield, Kontron’s vertical product manager for defense and a SOSA standard contributor. “Herrick is integrating the VX305C-40G SBC with a Model 71813 XMC board from Pentek, which will provide customizable I/O signal status and control for their new SOSA C4ISR demonstrator system for the U.S. Army.”
6 | VITA Technologies Application Guide Winter 2019
The following modules are designed to support the open systems architecture of the SOSA approach: › The Herrick Technology Laboratories HTLv-1 and HTLv-2 are 3U OpenVPX quad- and dual-channel HF/VHF/ UHF software-defined radio (SDR) transceiver modules designed to support various missions. › The Kontron VX305C-40G 3U VPX single-board computer uses a 12-core Intel Xeon D processor, with 40 Gigabit Ethernet data plane (40GBASE-KR4), a four-lane PCI Express 3.0 expansion plane, dual 10 Gigabit Ethernet control plane (10GBASE-KR), and a rich assortment of user I/O including SAT III, USB (2 and 3), serial links, video (HDMI, with DisplayPort available in 2019), GPIO, and an XMC site with backplane user mapping. › The Pentek Model 71813 features 28 pairs of LVDS digital I/O to meet the requirements of emerging standards from the SOSA Consortium.
What’s to come The two-year efforts of the SOSA Consortium are starting to bear fruit. While the actual program platforms are not available to publicly discuss, demonstration platforms show what is possible with the family of standards developed by VITA, SOSA, and other organizations targeted at rugged environment markets. Stay tuned for news on future programs and products using this technology. www.vita-technologies.com
VITA Standards Update By Jerry Gipper jerry.gipper@opensysmedia.com
VITA standards activity updates The November VITA Standards Organization (VSO) standards meeting was held in Tempe, Arizona. This update is based on the results of that meeting. Contact VITA if you are interested in participating in any of these working groups. Visit the VITA website (http://www.vita.com) for details on upcoming VSO meetings.
ANSI accreditation
VITA 46.30: VPX: Higher Data Rate
Accredited as an American National Standards Institute (ANSI) developer and a submitter of Industry Trade Agreements to the IEC, VITA provides its members with the ability to develop and promote open technology standards. The working groups meet face-to-face every two months to address embedded bus and board industry standards issues.
Objective: The VITA 46.30 standard defines a standard for a VPX connector that supports higher data rates, to at least 25 Gbaud – for protocols such as 100GBASE-KR4 Ethernet and PCIe Gen 4. The higher data rate connectors compliant to VITA 46.30 are intermateable with legacy VITA 46.0 connectors and follow the same form factor.
The following standards have recently been ANSI and VITA ratified via public ballot.
Status: This document has been approved by the working group and submitted for ANSI ballot.
› ANSI/VITA 47.0-2019 Construction, Safety, and Quality for Plug-In Modules Standard › ANSI/VITA 47.1-2019 Common requirements for Environments, Design and Construction, Safety, and Quality for VITA 47 Plug-In Modules Standard › ANSI/VITA 47.0-2019 unique requirements defined in IPC J-STD-001, Class 2 Standard › ANSI/VITA 47.0-2019 unique requirements defined in IPC J-STD-001, Class 3 Standard
VITA 46.31 VPX: Higher Data Rate, Solder Tail
These standards are available for download by VITA members and are posted at the VITA Store for purchase by non-members.
Objective: The VITA 46.31 standard defines a standard for a VPX connector that supports higher data rates, to at least 25 Gbaud – for protocols such as 100GBASE-KR4 Ethernet and PCIe Gen 4. The connectors feature a short solder tail intended to be soldered into a blind via. The higher data rate connectors compliant to VITA 46.31 are intermateable with legacy VITA 46.0 connectors and follow the same form factor. Status: This document has been approved by the working group and submitted for ANSI ballot.
VITA 48.xx: VPX REDI: cooling VSO study and working group activities Standards within VITA may be initiated through the formation of a study group and developed by a working group. A study group requires the sponsorship of one VITA member, and a working group requires sponsorship of at least three VITA members.
Objective: The VITA 48.xx VPX REDI standards define various cooling schemes for VPX. Status: The standards are open for revisions. The documents have completed public ANSI/VITA review and are in the comment resolution phase.
Several working groups have current projects underway; the following roundup summarizes those projects:
VITA 51.4: Reliability Component Derating
VITA 40: Service and Status Indicators
Objective: The goal of this study group is to develop a new component derating standard.
Objective: This standard defines the colors, behaviors, placement, and labeling of service indicator lamps for boards, field replaceable units, and enclosures. Status: This standard was withdrawn several years ago. VITA has been requested to revive the standard. The original document has been updated to the current format for VITA standards. Minor updates have been made to correct errors in the original document. The document was submitted for ANSI approval. Comments have been resolved and resubmitted to the voters for final approval.
8 | VITA Technologies Application Guide Winter 2019
Status: The study group has been meeting to discuss the scope and outline potential sources of data for this activity. This working group is joining forces with the IEEE to jointly develop this standard.
VITA 62.x: Modular Power Supply Objective: The VITA 62.0 standard describes requirements for building a power supply module that can be used to power a VPX chassis. The modules fit within the standard envelope defined for VPX modules in the VITA 48.0 standards. www.vita-technologies.com
Status: The original standard is being revised to be in line with additions made to the VPX standards. Additional working groups are on dot standards. VITA 62.1 is focused on a threephase high voltage power supply for 3U and VITA 62.2 is developing a 270-volt connector standard. Both working groups have draft documents in review.
the backplane and plug-in module contain spring-supported MT ferrules, enabling an interface compatible with the ANSI/ VITA 46.0 Baseline Standard and the VITA 65.0 OpenVPX System Standard.
ANSI/VITA 65: OpenVPX System
VITA 68.2: VPX: Compliance Channel
Objective: The OpenVPX System standard is a living document that is regularly updated with new profile information and corrections.
Objective: This standard defines a VPX compliance channel including common backplane performance criteria required to support multiple fabric types across a range of defined baud rates. This allows backplane developers to design a backplane that supports required Bit Error Rates (BER) for multiple fabric types. This also allows module developers to design plug-in modules that are interoperable with other modules when used with a compliant backplane.
Status: New profiles based on work with Sensors Open Systems Architecture (SOSA) are being developed. The document has completed the ANSI/VITA public ballot and is expected to be published by year end.
Status: The working group is developing the draft document.
VITA 66.5: VPX: Optical Interconnect, Spring-Loaded Contact on Backplane
Status: The working group is updating the draft of this standard.
Objective: This document describes an open standard for configuration and interconnect within the structure of VITA 66.0 enabling an interface compatible with VITA 46 containing blind mate optical connectors with fixed contacts on the Plug In Module and floating displacement on the backplane.
VITA 78.1: SpaceVPX Lite Systems
Status: The working group is developing the draft document.
Objective: This document leverages the work done on ANSI/ VITA 78 to create a standard with an emphasis on 3U module implementations. The most significant change from SpaceVPX is to shift the distribution of utility signals from the SpaceUM to the System Controller to allow a radial distribution of supply power to up to eight payload modules.
Working Group
Description
VITA 40
Service and Status Indicators
VITA 46.30
VPX: Higher Data Rate
VITA 46.31
VPX: Higher Data Rate, Solder Tail
VITA 47.x
Environments, Design and Construction, Safety, and Quality for Plug-in Units
VITA 48.0, .1, .2
VPX REDI: cooling
VITA 51.4
Reliability Component Derating
VITA 62.0
Modular Power Supply
VITA 62.1
Power Supply Front-end for High-voltage/3-phase 3U Module
VITA 62.2
Modular Power Supply Standard for 270v Applications
VITA 65.0
OpenVPX System
VITA 65.1
OpenVPX System Profile Tables
VITA 66.5
VPX: Optical Interconnect, Spring-Loaded Contact on Backplane
VITA 66.6
VPX: Optical Interconnect, Half-Width MT Variant, Spring-Supported Ferrules in Both Backplane and Plug-In Module Connectors
VITA 68.2
VPX Compliance Channel
VITA 78.1
SpaceVPX Lite Systems
VITA 86
High Voltage Input Sealed Connector Power Supply
www.vita-technologies.com
Published Standard
ANSI Approved
Copies of all standards reaching ANSI recognition are available from the VITA online store (www.vita.com/Purchase). For a more complete list of VITA standards and their status, go to www.vita.com/Standards. ANSI Ballot
Objective: This document describes an open standard for configuration, and within the VITA 66 family of blind-mate fiber optic interconnects, half-width connector modules for two or more MT ferrules, where the connector modules on both
VITA Ballot
Status: The working group has developed a draft document of the standard that is currently under review.
Draft
VITA 66.6: VPX: Optical Interconnect, Half-Width MT Variant, Spring-Supported Ferrules in Both Backplane and Plug-In Module Connectors
ANSI/VITA 47.1-2019 ANSI/VITA 47.2-2019 ANSI/VITA 47.3-2019 Study Group
ANSI/VITA 86-2019 VITA Technologies Application Guide Winter 2019 |
9
SPECIAL FEATURE
Arm for airborne platforms
Is Arm the future for airborne platforms in military and aerospace? By Rick Hearn, Mike Slonosky, Geoffrey Waters, and Lisa Sarazin
In recent years, Arm processors have made a quiet, understated entry into the military/aerospace market. With a well-established reputation in commercial markets for bringing high performance to low-power mobile devices – such as smartphones, tablets, and wearables – it’s no surprise that Arm’s potential was recognized in an industry where size, weight, and power (SWaP) constraints heavily influence technology selection. Arm, once an acronym for “Advanced RISC Machine,” employs reduced instruction set computing (RISC) to decrease cycles per instruction, which in turn lowers the processor’s power consumption and dissipates less heat. Consequently, Arm architectures deliver an unparalleled power-to-performance ratio to meet the requirements for many defense and aerospace applications. Even so, Arm chips are far from ubiquitous in the mil-aero industry, a world that has been long dominated by Intel and Power Architecture processing units. These incumbents offer rugged processors that are optimized for maximum performance, are implemented in boards with a minimal physical footprint, and have been
proven to maintain reliability in harsh environments. What’s more, because Intel and Power Architecture processors have powered many avionics systems to date, a variety of these chips provide the service history and design artifacts required for DO-254 certification. But with a SWaP-friendly nature and proven history in commercial technology (Arm Limited reports 50 billion chips were shipped from 2013 to 2017), do Arm processors have what it takes to meet the highest DO-254 requirements? (Figure 1.)
Filling the power architecture void The company Arm, unlike Intel, does not make or sell Arm processors, but owns the architecture intellectual property and licenses it to manufacturers such as NXP Semiconductors, NVIDIA, Apple, Qualcomm, and Samsung. Similarly, the term Power Architecture describes a processor architecture as opposed to a brand of product. Power Architecture processors have been most commonly produced by NXP (formerly Freescale and Motorola) and IBM. Power Architecture processors also use RISC to provide low-power computing, and those manufactured by NXP have been proven in a wide range of DO-254 safety-
10 | VITA Technologies Application Guide Winter 2019
www.vita-technologies.com
CURTISS-WRIGHT DEFENSE SOLUTIONS www.curtisswrightds.com
NXP SEMICONDUCTORS www.nxp.com
SPECIAL FEATURE
FIGURE 1
Processor architecture performance and power consumption comparison.
with Intel chips have been an ideal fit for radar and signal-processing applications, which demand powerful and complex computing.
certifiable applications, both commercial and defense, often to the highest design assurance level (DAL). But with no NXP Power Architecture devices planned for introduction after the currently released QorIQ T-series of products, this landscape is set to change in the future. In particular, the absence of new Power Architecture offerings creates an opportunity for both Arm and Intel, especially in programs with DO-254 requirements. The selection process for embedded computing technology in these safetycertifiable programs has typically prioritized reliability and determinism, which made Power Architecture processors’ non-throttling performance an ideal fit. Now, with computing technology evolving at a more rapid pace than in the past, performance has become another key criterion.
The challengers Historically, Intel processors have touted the highest performance levels for rugged embedded computing applications. Single-board computers (SBCs) and digital signal processors (DSPs) equipped www.vita-technologies.com
In the area of determinism, Intel processors are at a disadvantage compared to Power Architecture: Intel processors are known to throttle their clock speed (and thus their performance) based on the processor workload and their thermal environment. This operation is done automatically to reduce power consumption and protect the hardware from overheating if not adequately cooled. However, for demanding defense applications where predictability is essential, Intel processors can be set to constant clock speeds. Furthermore, choosing boards engineered with advanced cooling techniques and designed to ensure consistent performance is essential. (For more on this subject, read the white paper “Understanding Intel Processor Throttling for Defense Applications” by Aaron Frank of Curtiss-Wright.) Arm processors, on the other hand, deliver many of the benefits that make Power Architecture an ideal fit for DO-254 safety-certifiable applications, but with significant SWaP advantages. Compare, for example, NXP’s QorIQ Layerscape 1043A (LS1043A) Arm processor with its T2080 Power Architecture chip. Relatively, the LS1043A provides approximately the same processor core performance at one-third of the power of the T2080 in applications with restrictive SWaP requirements. Arm processors rival Intel’s performance levels, making them equally suitable for radar and signal processing applications – instances where Power Architecture has historically fallen short. What’s more, Arm processors deliver this level of complex computing at a lower performance per watt, without the threat of throttling.
Arm and power: Cut from the same cloth When it comes to manufacturing, Arm processors bear another similarity to Power Architecture that make them a prime candidate to fill the void in the DO-254 certifiable hardware space. With IBM introducing its last series of general-purpose Power Architecture processors in 1997, NXP secured its spot as the leading producer in the market. Now with decades of experience and expertise designing chips for a variety of applications, including DO-254 DAL A certifiable hardware, NXP has increased its focus on delivering Arm solutions that meet the demanding requirements of these applications as Power Architecture solutions have, with even higher-caliber performance. VITA Technologies Application Guide Winter 2019 |
11
Arm for airborne platforms
SPECIAL FEATURE
Not all cores are created equal In order to understand Arm’s fit in the DO-254 world, it’s important to note there are three types of Arm architectures: › Application profile (A-profile): implemented by cores in the Cortex-A series and designed for application use › Real-time profile (R-profile): implemented by cores in the Cortex-R series and designed for real-time and safety- critical applications › Microcontroller profile (M-profile): implemented by cores in the Cortex-M series and designed for microcontrollers For DO-254 safety-certifiable applications, it’s logical to assume that Cortex-R series cores would offer the ideal profile. However, while there’s nothing inherently preventing Cortex-R and -M cores from meeting DO-254 requirements, A-profile architectures in fact provide the best solution for avionics. Cortex-A cores offer the only profile that can run a 64-bit operating system and provide the level of performance needed to handle the workload and computing requirements of avionics systems. The Cortex-A series offers several 64-bit cores, ranging from Cortex-A35 to Cortex-A76. The sweet spot for military and aerospace applications lies in the Cortex-A53, Arm’s first Armv8-A (the most recently released version of Arm architecture) core designed specifically for providing power-efficient 64-bit processing. While commercially the Cortex-A53 is most commonly known for powering Raspberry Pi 3 computers and Roku media players, Arm Limited describes the Cortex-A53 as a highefficiency processor ideal for devices requiring high performance in powerconstrained technologies, such as smartphones, aerospace applications, and automotive infotainment systems. Not only is this balance between power and performance ideal for managing both the workload and SWaP constraints of airborne systems, the CortexA53’s proven service history provides
the reliability required for DO-254 certification. Its deterministic processing prevents throttling in challenging mil-aero environments, ensuring consistent levels of performance for safety-critical systems with DAL A requirements, such as flightcontrol computers.
From automotive to aerospace In recent years, NXP Arm cores have played an integral role in safety-critical automotive systems, such as advanced driver-assistance systems, in-vehicle networking, powertrain components and safety applications. Cortex-A53 processing cores, in particular, power NXP’s family of vision processors designed for object detection and recognition, machine learning, and sensor fusion applications. The process of designing electronics in the automotive industry is not unlike that in the aerospace industry: Similar to the Technical Standard Orders (TSOs) that guide certification in avionics, the automotive industry relies on specifications from the International Organization for Standardization (ISO) when designing and testing safety-critical components. In lieu of DALs, the automotive industry classifies risk levels through Automotive Safety Integrity Levels (ASILs). The similarities are so evident that many ASIL descriptions compare its safety levels to DO-254 DALs. Establishing compliance to the safety requirements outlined in ISO 26262, which prescribes functional safety standards for road vehicles, involves assessing failure modes and testing hardware in a variety of environmental and operational conditions. Interestingly, many areas of the ISO26262 ASIL assessment process align with the hazard-analysis and safety-assessment requirements for DO-254 certification. This credible experience in safety-critical applications has given NXP a solid foundation for turning its Arm focus to the skies.
The power of collaboration On the path to being deemed airworthy, the collection of data artifacts to support DO-254 typically starts at the board level, especially with some hardware vendors now offering to deliver commercially designed boards with data artifact packages for certification. This area is where NXP’s experience providing evidence to support certification for its Power Architecture products is again beneficial in its Arm offerings. Working with NXP from the start of the design process, hardware vendors determine which processor delivers the performance and reliability required for a board’s target applications. Often these applications call for specific system-level protections that require additional logic built into the processor to achieve them, necessitating a level of familiarity with the product only NXP can provide. NXP’s transparency and collaboration with hardware vendors enables such modifications. Furthermore, a variety of hardware tests required for DO-254 compliance must test functions that originate within the processor itself and are therefore difficult for board manufacturers to conduct on a finished chip. NXP provides documentation from the processor’s design, development, and manufacturing stages that allows board manufacturers to demonstrate adherence to DO-254 requirements without the complex and time-consuming undertaking of conducting these internal tests themselves. NXP’s support also allows hardware vendors, who interface directly with system integrators and designers working on certifiable systems, to voice specific customer questions and receive detailed answers from the source in order to eliminate confusion and concerns. This partnership and collaboration played a key role in Curtiss-Wright’s development of what would become the industry’s first announced DO-254-certifiable Arm SBC, the LS1043A-powered VPX3-1703. Leveraging four Cortex-A53 cores, along
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with cybersecurity and real-time debug features, the LS1043A has layers of reliability built into its specifications. Delivering the output and processing levels demanded by most DAL A applications, the VPX3-1703 balances deterministic high performance with SWaP-friendly power consumption; it also has a reputable service history with a design for longevity. Having worked closely with NXP throughout the development phase, Curtiss-Wright is able to deliver a full DAL A certification artifacts package with the VPX3-1703.
for the same success with Arm. Moreover, as a key player in safety-critical automotive systems, NXP has already manufactured a variety of Arm cores compliant with stringent safety regulations that provide a solid foundation for DO-254 certification. Ultimately, the Arm processing architecture seems ready for takeoff in the mil-aero arena, and it won’t be long before Arm establishes its spot as a key player in DO-254 applications. Rick Hearn is Senior Product Manager, Curtiss-Wright Defense Solutions; Mike Slonosky is Senior Product Manager, Curtiss-Wright Defense Solutions; Geoffrey Waters is Senior Systems Engineer, NXP Semiconductors; and Lisa Sarazin is Marketing Portfolio Manager, Curtiss-Wright Defense Solutions.
Going forward Reliability and determinism have always been the paramount criteria in the selection process for DO-254-certifiable avionics. As commercial technology has rapidly evolved, yielding even higher output from increasingly shrinking form factors, performance has emerged as another key factor for evaluation – especially since building with the best technology today can add longevity to a program by (theoretically) extending the time between required upgrades. With no roadmap on the horizon for Power Architecture devices, Arm is a prime candidate to become the new leading processor architecture powering DO-254 DAL A-certified computing modules. Boasting higher performance capabilities than Power Architecture at lower levels of power consumption, Arm offers an unbeatable power-to-performance ratio to bring substantial outputs to SWaPconstrained environments. In particular, Cortex-A processing cores like the Cortex-A53 provide the ideal performance and power levels for mil-aero applications and have a reputable service history to support DO-254 certification. Further establishing Arm as a viable alternative to Power Architecture, NXP is devoting the expertise that made it the leading provider of Power Architecture processors toward Arm products. With a breadth of experience designing high-quality processors and supporting board manufacturers on the path to DO-254 certification, NXP’s background in helping Power Architecture-based boards meet DAL A standards primes it www.vita-technologies.com
VITA 48.4
Liquid Flow Through Cooling Power hungry OpenVPX modules require a cooling solution that keeps the mission on course. From the experts in packaging for extreme environments comes the VITA 48.4 LFT development chassis. • Test up to 6 OpenVPX modules • Built in heat exchanger • Liquid flow indicator • VITA 62 power module option • Slot count extensible
With you at every stage! Elma Electronic Inc.
elma.com VITA Technologies Application Guide Winter 2019 |
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TECHNOLOGY FEATURE
VPX road map By Jerry Gipper
The original work on VPX started in 2004 with the formation of the VITA 46 working group. Since then, many enhancements have been added to the family of standards supporting the VPX architecture. Features such as advanced cooling schemes and connectivity – for RF and optical – have greatly extended the capability of VPX-based platforms, enabling them to be implemented in many high-performance embedded computers.
One of the primary directives of a standards body in the embedded computing space is to ensure that there is a road map in place to guide the technology through a very long product life. Platforms using technology such as VPX can expect to be viable for well over 30 years. Such longevity requires some serious thought behind the road map. In the days of VMEbus, the performance upgrades were relatively straightforward: VME32 became VME64 with a new and backwards-compatible connector that added two rows of contacts; VME 64 became VME 2eSST by clocking data on both edges of the clock, again, with the connector remaining the same. All of this work doubled the data transfer at each step. Things are not as easy with VPX. Higher data-rate protocols are being designed into VPX systems, enabled by
processor technology advancements supporting higher signal speeds and more cores. Newer protocols such as PCIe Gen 4 and 100GBASE-KR4 Ethernet are being implemented and these protocol standards have road maps for higher data rates, in some cases doubling every two or three years. The teams working on the VPX standards monitor these road maps to determine what needs to be done in future updates. Ensuring that the VPX performance road map can accommodate these protocols is vital to the future of VPX.
Communication plane performance When the VPX connector was standardized under VITA 46.0 in 2006, it supported signaling rates for protocols running up to 3.125 Gbaud with a path toward reaching 6.25 Gbaud. As signaling rates increase above 10 GBaud, the VPX connector solutions need to evolve to support tougher signal integrity (SI) requirements. The VPX working group is now wrapping up the work necessary to boost the communication plane protocol performance to the 10 Gbaud level through advances in board technology and system design that improve SI. Two efforts, under the VITA 46.30 and VITA 46.31 working groups, have developed standards calling out VPX connectors that support higher data rates, to at least 25 Gb/s – for protocols such as 100GBASE-KR4 Ethernet and PCIe Gen 4. The primary challenge with these speeds is maintaining signal integrity at these speeds. Every single trace, bend, and connection takes an incredible toll on overall SI at these data rates. The
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TECHNOLOGY FEATURE
A smaller diameter PCB hole size requires compliant pins to be reduced in diameter size to reduce crosstalk and minimize impedance discontinuity at the connector/PCB interface.
Contact tails extend below the connector surface to enter into blind vias in the printed circuit boards and are soldered. This termination approach is intended to reduce crosstalk and also frees up space for components on the opposite side of the board with the elimination of plated thru-holes.
Hybrid connectors with power, single-ended and higher data rate differential pair signals in a common connector, have a mix of compliant pin sizes, implementing the smaller pins only where applicable for the higher data rate signaling.
Hybrid connectors with power, singleended and higher data rate differential pair signals in a common connector, can have a mix of solder tails and compliant pins to provide retention of the connector during processing or to support power or lower speed signal contacts.
With smaller compliant pins, the retention force for the connector on the PCB will be reduced and this must be considered in implementation. Retention forces are specified by the connector manufacturer.
Solder process optimization is the responsibility of the manufacturer and this standard does not document processing methods.
Physical Difference
VITA 46.31
Pin Geometry
All of the changes described in the new standards affect the interface between the PCB and the connector, but not between plug-in module to backplane connectors, thus maintaining intermateability with legacy VITA 46.0 connectors. The VITA 46.31 standard defines a higher-performance connector, with short solder tails designed to be soldered into blind vias in the printed circuit boards. This is an alternate approach to VITA 46.30, which uses smaller-diametercompliant pins at the board termination. VITA 46.30-compliant connectors are part of a complete system, supporting a channel with SI definitions per VITA 68.2 standards. Both of these documents are under review by the respective working groups. Other alternative footprint connectors may also be standardized in the future as improved methods emerge to address the SI challenge.
VITA 46.30
Manufacturing Considerations
latest work focused on improving the SI of the entire signal path.
Note: It is possible to achieve higher data rates such as PCIe Gen 4 and 100GBASE-KR4 without having to use VITA 46.30 or VITA 46.31 connectors.
TABLE 1
Overview of the higher data rate VPX connectors.
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TECHNOLOGY FEATURE
What does this mean for VPX? In short, a huge boost to bandwidth: First-generation products were capable of up to 10 Gb/s per lane. Second generation is 2.5 times faster, supporting up to 25 Gb/s per lane. The maximum number of differential pairs, or lanes, for 3U and 6U modules remains unchanged at 64 and 192 lanes, respectively. This update adds tremendous headroom to performance while still maintaining compatibility with no architectural changes required. (Table 1.)
Industry-leading I/O density The VPX road map includes much more than improving the switched fabric performance capability of the communication channels. VPX is the highest I/O density slot card solution available anywhere. Space is reserved for coaxial and optical connections between plug-in modules and backplanes. Over the past few years, tremendous amounts of work have been performed to add and increase the coaxial RF I/O capability and the optical capability of VPX. A particular focus has been placed on improving the blind mate capability between plug-in modules and backplanes to improve serviceability of VPX systems. (Figure 1.)
Coaxial I/O VPX is extremely popular in high-end sensor applications that deal with large amounts of data and challenging operating environments. The high bandwidth capability and rugged packaging options work well with both stationary and mobile applications. These sensors frequently require RF connectivity via coax to the computing platform. The VPX working groups saw this need early and developed the VITA 67 standards for RF connectivity to address these needs. The initial solutions defined a standard that could support up to four RF contacts in a half module at a maximum 26.5 GHz. Issues with cabling have kept the working group focused on improved solutions. VITA 67.1 and VITA 67.2 allow only for a cable termination on the plug-in module’s contacts. Routing cables to another connector on the plug-in module can be difficult. The driving objective of the most recent effort was to allow fixed contacts on the plugin module and spring-loaded contact action on the backplane. This functionality allows for alternate packaging of the modules, such as edge launching RF contacts directly from the boards, potentially eliminating all cables to the plug-in module. The primary goal of the working group is to build upon the framework laid out in earlier standards for detailing blind mate analog interfaces. Because the industry has progressed since the initial VITA 67 standards, the need for higher contact densities has arisen. In addition to the physical-space reductions realized by eliminating cable management, the VITA 67.3 backplane modules further increase space efficiency by taking advantage of the full 1.00-inch slot pitch. The
FIGURE 1
Example coaxial and optical connector. Source: TE Connectivity.
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contact position within the housings are no longer constrained to the fixed 2 by 2 and 2 by 4 arrays for greater flexibility, up to 12 SMPM contacts. The VITA 67.3 standard was written with future expansion and backwards compatibility in mind. The initial contacts available are SMPM, but the current draft revision is adding alternate higher-density RF interfaces: SMPS and NanoRF. The final vision of this working group is the integration of coaxial RF and optical contacts within a single module. This motivation is supported by the continuous drive to optimize the size, weight, and power of the VPX architecture. This is of special importance in 3U applications where backplane I/O is a more limited resource. Sharing the I/O module makes the best use of the available space while providing the flexibility designers require.
Optical I/O To truly reach the next plateau of I/O performance, one has to look to optical connectivity. Optical has many benefits over copper, which is nearing its bandwidth limits. Fortunately, VITA members had the vision to start developing optical interconnects for VPX under the VITA 66 working group several years ago. This work defined optical connections for VPX modules that are widely used in high-speed data paths. More effort continues as the working group looks for ways to improve the connector interfaces and to add more fibers to the reserved I/O space on VPX modules. The latest efforts are concentrated on increasing the fiber count to 72 and adding spring-loaded contacts. VITA 66.5, “VPX: Optical Interconnect, Spring-Loaded Contact on Backplane,” defines an interface compatible with VITA 46 containing blind mate optical connectors with fixed contacts on the plug-in module and floating displacement on the backplane. VITA 66.6, “VPX: Optical Interconnect, Half-Width MT Variant, Spring-Supported Ferrules in Both Backplane and Plug-In Module Connectors,” defines an interface compatible with VITA 46 containing blind mate optical connectors, where the www.vita-technologies.com
connector modules on both the backplane and plug-in module contain springsupported MT ferrules.
OPENVPX IS THE KEY TO TYING TOGETHER THE COMPLEX
As the road map for optical improves, the headroom is there for tremendous bandwidth. VITA members continue to vigilantly work on technology that may someday enable a practical backplane capable of optical connectivity between slots.
THAT DETERMINE THE MULTITUDE OF DATA PATH AND I/O
Summary of working groups VPX is the only blind mate plug-in module standard that supports highspeed serial, coaxial RF, and optical connectivity to a backplane in the embedded computing space. The efforts by the VITA working groups are doing everything possible to improve the performance and functional density of these connectivity options to ensure that VPX continues to be the premier plug-in module solution. In addition, there are several other working groups that are applying the same diligence to standards for power supplies, high-speed mezzanines, and chassis I/O for critical embedded systems.
www.vita-technologies.com
VPX ARCHITECTURE. NEW PROFILES WILL BE DEFINED COMBINATIONS POSSIBLE WITH VPX. OLD PROFILES WILL BE REPLACED AS NEW ONES EMERGE TO TAKE THEIR PLACE. OpenVPX is the key to tying together the complex VPX architecture. New profiles will be defined that determine the multitude of data path and I/O combinations possible with VPX. Old profiles will be replaced as new ones emerge to take their place. Staying involved in the process is going to be key for companies to stay abreast of future developments. Connector modules – designed with overarching VPX compliance in mind – are included in new VITA 65 OpenVPX slot profiles. These slot profiles will support an ever-evolving architecture without ever needing to alter the backplane. Payload plugin modules could be replaced as new capabilities, integrated within a slot, require additional contacts with different arrangements. The upgrade is as simple as replacing the existing backplane connector module with the vender-provided replacement. Engineering for signal integrity is an absolute must as we continue to bang against the ceiling of copper transmission mediums. We can no longer afford to take shortcuts of any kind and must continue to look at the entire data path as a complex system that needs total optimization to get the required quality of a signal at tomorrow’s data speeds.
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TECHNOLOGY FEATURE
VITA mezzanines
Mezzanine madness: The future of VITA mezzanines By Jerry Gipper
It has been several years since the introduction of a new mezzanine form factor for low-profile applications. The VITA membership has been doing some soul-searching to determine what should be next. Plenty of controversy is in the air, with everything from simple right-angle edge connections and optical links to the carrier being thrown into the fray. Standards for mezzanine boards were among the first to be ratified by VITA members and ANSI when VITA first gained ANSI accreditations status in 1993. Since the inception of VMEbus, there was always a need for mezzanine boards to add functionality to 3U and 6U VME boards. There was never enough board space for all the needed functionality, plus there was the added challenge of very limited z-axis space on a VME board. Early board designers created their own custom mezzanines to add memory, I/O, or processing capability. Unfortunately, it also meant that most of this work was unique to every company designing boards. It didn’t take long before industry players started developing standards to address the need for interchangeable mezzanine
modules. Over time, PMC, XMC, and FMC emerged to be the primary solution, that have carried into the world of VPX. While the form factors are still highly desirable, the performance of the interconnect has had to improve, often at the cost of different connector technology. There is no sign that this will subside anytime in the near future. This situation has introduced the “mezzanine madness” dilemma that is challenging the standards working groups, and has led to a resurgence in efforts to introduce change to the popular VITA mezzanine standards. At the September VITA standards meeting, David Givens, standards director at Samtec, launched into a discussion of this mezzanine madness. If you have never seen a presentation by David, you are missing out! He has a colorful way, almost musical, with words that must be heard to be appreciated. His presentations alone are often worth the price of admission. David’s view on mezzanines is that of a connector supplier, where he describes connectors as “the mortar between the bricks” or the boards in a system. He led off his mezzanine madness discussion with the question “What are we studying here?” Depending on your perspective – as either a board designer or a connector supplier – might answer the following way:
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Board designer › Lossy lumps of dielectric filled with temperamental conductors. › Highest failure-mode component on my board. › Nightmare-inducing electromechanical demons.
Connector supplier › Critical disconnect points in a modular electrical system. › Passive components that determine the form, fit, and function of modern packaged electronics. VITA standards define two mezzanine families, XMC and FMC, that are used in computer designs over a broad range of products. Both have served designers well for years, supporting escalating signal demands that have consumed surplus headroom. Both have different requirements driving their strategy, however: XMC technology is driven by serial communication protocols such as Ethernet and PCIe, while FMC is driven by FPGA requirements that have growing bandwidth needs. PCIe moved from Gen 1 to Gen 5 in 16 years; PCIe’s roadmap continues to squeeze more bandwidth out of each generation. FMC needed more bandwidth, so the standard defined a higher pin-count connector, moving from 800 pins for FMC to 1,280 pins in FMC+. (Figure 1.) Pin-in-socket connectors drove the industry for several decades, but blade and beam contacts are now used on both the backplane and mezzanines. Their acceptance has been driven by the critical need for higher pin density and proven signal-integrity (SI) advantages. SI requirements and hardware trends imply that next generations will drive upgrades in PCB materials, layout techniques, and an emphasis on channel integrity, not just signal integrity. Designers will need to spend more time considering the most innate details of every single signal trace. Ultimately, onchip equalization will ease some pressure on connectors, but new Gen 3 standards for XMC and FMC will be needed. The new standards will be optimized even www.vita-technologies.com
FIGURE 1
XMC and PCIe performance.
more for high-speed, high-density channels with low crosstalk. SI engineers will soon be spending a disproportionate amount of time on designs getting clean signals. VITA has several active working group projects: › VITA 42.0 – XMC: The working group has opened up the standard to make some minor revisions to performance tables and possibly add information at about standoffs that define mounting to a carrier board. › VITA 42.3 – XMC PCIe Physical Layer: This version does not support applications above PCIe Gen 2 performance capability. Other inputs that have been collected over the past few years need to be considered. This work group is at present updating the standard to support designs up to PCIe Gen 5. › VITA 57.1 – FMC and VITA 57.4 – FMC+: Minor errata have been reviewed and approved for release to address questions with dimensional concerns and image quality. › VITA 57.5 – FMC+ Development Tools: Three application notes have been completed and posted: 1. JSOM Ejector Standoffs for VITA Mezzanines. 2. FMC+ Extension Cables for benchtop development. 3. FMC+ Loopback Cards for system testing and development. These notes are targeted at developers to aid in the design of FMCs and carriers. › VITA 61.0 – XMC 2.0: Requires revisions similar to VITA 42.0 and VITA 42.3. › VITA 88 – XMC+: The desire to bring XMC up to performance parity with FMC+ motivated members to form the VITA 88 working group. Here, the same connector family used in FMC/FMC+ can be soldered to the existing XMC footprint, offering backward compatibility in most applications. New layouts will benefit from an electrically optimized via-in-pad design, familiar to FMC+ developers. Universally, low mating/unmating forces and rugged IPC Class 3 solder joints will directly benefit all XMC+ users.
Deep thoughts David closed his presentation with some thoughts about what we can conclude: › Over time, new processors that employ evolving transmission protocols drive an increase in the system hardware. VITA Technologies Application Guide Winter 2019 |
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TECHNOLOGY FEATURE
› Periodically, technology upgrades converge to cause inflection points that require major redesigns. There is no choice but to bite the bullet and make wholesale changes. In an industry that is so specialized and moves at such a slow pace as critical embedded computing, changes such as this can be hard to embrace. › The next “3.0 generation” of connectors is emerging into a full-channel SI challenge. New connector fundamentals are going to drive change: Footprints will be optimized, pin counts higher, tall stack heights avoided where possible, routing strategies may reduce rows. Anything that reduces noise and crosstalk will be an asset. › We expect the entire ecosystem will need a thorough upgrade: High-performance PCB materials, active equalization (which may be on-chip), attention to trace and layout techniques, and full-channel budget management.
FIGURE 2 Samtec SeaRay connectors used in V57.4 FMC+ and V88 XMC+.
› V88 XMC+ gives backward-footprint compatibility with forward-looking electrical and mechanical benefits. (Figure 2, right.) › The next generation … a completely new “VPX 3.0” architecture? Maybe the day for “drop-in” improvements is at its end. Now is the perfect time to get involved if you are concerned about the future of mezzanine standards for low-profile carrier boards. In order to move to the next level, we know that changes are required and standards are going to be needed.
OpenSystems Media works with industry leaders to develop and publish content that educates our readers. Strategies for Deploying Xilinx’s Zynq UltraScale+ RFSoC By Robert Sgandurra, Director, Product Management, Pentek RFSoC brings new possibilities for addressing some of the most challenging requirements of high-bandwidth, high-channel-count systems. Understanding how this new technology can specifically address SWaP-C and low latency applications is key to matching it to many applications that can benefit from it the most. In this white paper, learn how Pentek uses Xilinx’s Zynq UltraScale+ at the center of its board architecture to leverage the power of RFSoC, streamlining the path from RFSoC to a deployed system solution. Read this paper at https://bit.ly/2P94xzB
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Check out our white papers at http://vita.mil-embedded.com/ white-papers/ www.vita-technologies.com
OpenVPX Sponsored By:
Alphi Technology Corporation PCIe-Mini-CAN-FD
The PCIe-Mini-CAN-FD is a PCI Express Mini board with an integrated CAN FD transceiver delivering data rates up to 8Mbps. It provides an interface between the CAN bus and the system processor, supporting both classical CAN and CAN FD. The board provides CAN FD transceiver differential transmit receive capability from the bus. It also supports local wake up (LWU) and bus wake up (WUP). The PCIe-Mini-CAN-FD has many protection features, including failsafe mode, internal dominant state timeout, wide bus operating range and a timeout watchdog. Size: 30mm x 50.95mm, Operating temperatures: 0C to +70C (commercial); -40C to +85C (industrial).
SOSA™- Aligned WILDSTAR™ 100GbE 6U VPX Switch
www.alphitech.com/doc/PCIe-Mini-CAN-FD.pdf
Communications
Interface Concept ComEth 4082e
The ComEth4082e is a 3U VPX 1/10/40 Gigabit Ethernet Switch for hybrid copper-optical backplanes, supporting legacy 10/100/1000Base-T Ethernet over twisted pair, 1/10/40GEthernet over copper backplane as well as 1/10/40G Ethernet over optical backplane. It offers a high density of 1GbE, 10GbE & 40GbE ports on a small 3U footprint, a high-level of flexibility in the switch configuration and a rich layer 1/2/3 feature-set. The ComEth 4082e is powered by a Marvell multi-layer Ethernet switch device and a highperformance dual-core ARM7 CPU controlled by Interface Concept’s field-proven network management software called «Switchware». https://www.interfaceconcept.com/products/Ethernet-Switches/ 3U-VPX/347-ComEth4082e-3U-VPX-11040-Gigabit-Ethernet-Switch-forhybrid-copper-optical-backplanes
OpenVPX
Annapolis Micro Systems WILD FMC+ GM60
RFSoC Card combines FPGA Processing and ADC/DAC • ADC: 4 Channels, 4.0 GSps, 12 bit Also: 8/8, 8/2 & 2/8 Channel Configs • DAC: 4 Channels, 6.4 GSps, 14 bit • Cooled: Air or Conduction • I/O Connectors: 50Ω SSMC or VITA 67 • BSP: VHDL or CoreFire Next Application Design Suite • Synchronized: Within and across Cards • Deployed: Standalone or pair with 3U/6U Baseboard • SWaP-C Optimized: UAVs, backpacks, handheld devices, and custom-integrated applications • Upgradable: Compatible with next-generation (Gen 3) Xilinx RFSoCs
[
www.annapmicro.com/products/wild-fmc-gm60-adc-dac/
www.vita-technologies.com
[
This next-generation 100GbE 6E10 6U Switch provides up to 6.4 Tb/s of switching between backplane slots of multiple channels of 100Gb Ethernet. It also has front panel I/O to connect to external data sources. It is VITA 65-compliant, and aligns with the SOSA™ Technical Standard. The rugged high-performance Switch is readily integrated into any SOSAaligned 6U VPX system, or deployed within Annapolis’ proven WILD100™ EcoSystem for 6U OpenVPX. Also available: • WILDSTAR 6B10 6U OpenVPX InfiniBand Switch • WILDSTAR 3E10 3U OpenVPX Switch
FEATURES: Switching • Supports 1/10/25/40/100 GbE • 6.4 Tb/s of switching capability • Industry-leading, true cut-through latency • Separate Data and Control Plane Switches I/O • 7 optional 40/100GbE optical interfaces to VITA 66 • 4 optional 40/100GbE optical interfaces to front panel FPGAs • 2 Xilinx® Zynq® UltraScale+™ MPSoCs General • Multiple levels of hardware and software security • Supports new SOSA/VITA 65 switch profile • Air, conduction or liquid-cooled • Hot swappable with air-cooled variants wfinfo@annapmicro.com • 410-841-2514 www.annapmicro.com/product-category/switch-boards/
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VITA Technologiess Application Guide
Communications
VITA Technologiess Application Guide
Radar Sponsored By:
OpenVPX
Acromag VPX4500 Series: VPX Carrier Cards for XMC and AcroPack® Modules
Rugged VPX Processor and GPGPU Solutions
The VPX4520 Series 6U carrier cards provide mezzanine slots for one XMC and four mini-PCIe or AcroPack I/O modules. The XMC module site can host a network communication, FPGA, GPU, SBC, or other I/O signal processor card. The four AcroPack slots provide a rugged PCIe mini card interface for a mix of analog, digital, serial, and other I/O functions. A PCIe Gen 3 x16 interface connects to the VPX bus either via the data plane or expansion plane. Convection and conduction-cooled versions are available with support for extended temperature ranges from -40 to 85°C. Air-cooled models offer front panel access to the I/O while conduction models route all signals to the rear backplane connectors. https://www.acromag.com/vpx4520-series
ADLINK is a premier supplier to the military and aerospace industry and has a scalable, customizable, and rugged VPX portfolio to enable compute-intensive, SWaP constrained, mission-critical applications for deployment in the world’s most demanding environments. And with GPGPU processing, ADLINK VPX solutions can handle the high workloads of demanded by image processing and analysis, compute acceleration, and artificial intelligence (AI). VPX6H10 is a 6U VPX processor blade featuring a powerful 12-core Intel® Xeon® processor and an onboard NVIDIA GPU with 512 CUDA cores, designed for image processing and AI-driven applications. • • • • •
Intel® Xeon® Processor D-1559, 32GB DDR4 NVIDIA Quadro GP107, 4GB GDDR5 Onboard SLC SSD up to 64GB 2x 10G-KX4, 2x 10G-KR and 4x 1GbE PCIe x16 Gen3, 2x PCIe x4 and PCIe x8 Gen3 to XMC
VPX3020 is a 3U VPX processor blade featuring the latest processor technologies, providing an ideal solution for nextgeneration applications demanding both computing performance and thermal efficiency. • • • •
Intel Xeon Processor E-2254ML, up to 4-core DDR4-2666 soldered ECC SDRAM up to 16GB Up to PCIe x16 Gen3 One XMC site, PCIe x8 Gen3 with rear I/O to P2 ®
®
VPX3-P5000 is a 3U VPX GPGPU blade utilizing a MXM carrier board architecture for customers to choose, bringing GPGPU capability down to compact sizes. • NVIDIA Pascal GP104/GP107 GPU with up to 2048 CUDA cores • Up to 16GB GDDR5 with NVIDIA GPUDirect™ DMA • PCIe x16 Gen3 to P1 • Four DisplayPort 1.4 outputs https://www.adlinktech.com/en/VPX.aspx
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Interface Concept ComEth 4590a
The ComEth 4590a is a 3U 1/10/40 Gigabit Ethernet Switch with Data and Control Planes. It is a high performance ruggedized dual plane 3U VPX Layer 2/3 Ethernet switch developed in alignment with the SOSATM (Sensor Open Systems Architecture) Technical Standard. It integrates two sets of independent layer 2 (Ethernet) and layer 3 switches & control processors to support physically separated Control and Data Planes for highly secured 3U VPX systems. These two Ethernet packet processors, managed by the Dual core ARM processors, offer remarkable switching capabilities with 1G, 10G and 40G Ethernet configurations. https://www.interfaceconcept.com/products/Ethernet-Switches/ 3U-VPX/309-ComEth-4590a-3U-VPX-11040-Gigabit-Ethernet-Switchwith-Data-and-Control-Planes
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TE Connectivity MULTIGIG RT 3 Connectors
The MULTIGIG RT 3 connector is a next generation rugged highspeed backplane connector that offers higher data rates, between 16-25 Gb/s. This connector meets both SOSA standards and interface dimensions for VITA 46 VPX connectors. New contact and wafer designs are optimized for signal integrity enhancements. Ideal applications for the MULTIGIG RT 3 are military electronics/C4ISR, Avionics, Ground Defense, Missile Defense and Space.
www.te.com/embeddedcomputing
www.vita-technologies.com
Test & Measurement
TE Connectivity
Dawn VME Products
NanoRF Module & Contacts
Fabric Mapping Modules
With more than twice the density of VITA 67 RF Modules, TE’s new NanoRF modules and contacts provide a high frequency nanominiature coax contact with modular packaging and are ideal for extreme rugged environments. The half and full-size modules can retain up to 12 or 18 RF contacts with options for customizing contact count and position. Featuring a floating insert in the backplane module to pre-align RF contacts before engagement, the radial and axial float assures final alignment of the contact and keeps them fully engaged for excellent RF performance under hard environments.
Dawn OpenVPX backplane Fabric Mapping Modules simplify topology customization. Dawn VME Products Fabric Mapping Modules automate optimization of OpenVPX backplane topologies.
www.te.com/embeddedcomputing
www.dawnvme.com
Newly patented FMM micro-overlays quickly customize offthe-shelf OpenVPX backplanes to mission requirements. Fabric Mapping Modules allow designers to work with flexible configurations of high-speed links. Off-the-shelf backplanes can be quickly customized to mission requirements without the time and expense required for new backplane designs, a critical advantage when schedules are compressed by late system changes. Dawn engineers have successfully used Fabric Mapping Modules to solve many OpenVPX application problems in the design phase.
UAV
Dawn VME Products
THE SPRING
PSC-6238
2020 VITA
800 Watt 3U OpenVPX Conduction Cooled Power Supply
TECHNOLOGIES
The PSC-6238 is designed to operate in a military environment over a wide range of temperatures at high power levels, is extended shock and vibration compliant per MIL-STD-810F, and features an onboard real-time clock with switchable Battleshort and NED (Nuclear Event Detect) functions. Dawn’s PSC-6238 is a wedge lock conduction cooled module on a 1 inch pitch with an operating temperature of -40°C to +85°C at the wedge lock edge. The up to 800 Watt power output true 6-channel supply provides full Open VPX support and is current/load share compatible with up to 4 PSC-6238 units. www.dawnvme.com
RESOURCE
COMING IN SPRING 2020
TECHNOLOGY UPDATES | NEW PRODUCTS
GUIDE COVERS MARKET SEGMENTS INCLUDING BOARDS, CHASSIS, ENCLOSURES, AND MODULES.
OpenSystems Media webcast Making it Cool: Solving Thermal Management Challenges in Military Electronics Sponsored by: Atrenne Computing Solutions, Kontron, nVent Schroff Modern processors, graphics processors, FPGAs, etc. provide untold performance benefits, but also generate excessive amounts of heat. This webcast of industry experts will cover various methods for solving thermal management challenges in military systems when integrating commercial processing technology. https://bit.ly/32xKaAW
www.vita-technologies.com
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3 phase. 3U.1 choice. THE MILITARY FLIES HIGH WITH VPXtra 704™ When the mission calls for a 3-phase 3U power supply that can stand up to the most rugged environments, the military chooses VPXtra 704™ from Behlman – the only VPX solution of its kind built to operate seamlessly from MIL-STD-704F power for mission-critical airborne, shipboard, ground and mobile applications. > 3-phase AC input; high-power DC output > Available holdup card stores 700W of DC power for 50 msec > Overvoltage, short circuit, over-current and thermal protection > Provides full output performance during both normal and abnormal transients
The Power Solutions Provider : 631-435-0410
: sales@behlman.com
: www.behlman.com