Advances in Microelectronic Engineering (AIME) Volume 2 Issue 4, November 2014
www.seipub.org/aime
A Simplified DC Thermal Model of Recessed Gate P-HEMTs for CAD Applications Leonardo Suriano*1, Roberto Marani*2, Anna Gina Perri*3 123
Department of Electrical and Information Engineering, Polytechnic University of Bari
via E. Orabona, 4. 70125 Bari, Italy annagina.perri@poliba.it
*
Abstract In this paper we presents a DC thermal model of recessed gate P-HEMTs in which we propose several issues to allow an easy implementation in circuit simulators. In particular we identify transistor thermal parameters, which have greater influence on the device behaviour. In order to verify the accuracy of the proposed model, the results are compared with those of a model, already proposed, obtaining a negligible relative error. However the proposed simplified model can be easily used for CAD applications, with computational time very short. Keywords HEMT; Thermal Effects; Modeling; Output Characteristics; CAD
Introduction In (Chaibi et al., 2012) a mathematical model for thermal effects on HEMT devices has been proposed. It is based on the mathematical equations for accurately modeling the drain to source current in recessed gate P-HEMT devices (Fernandez et al., 1999). However it cannot be directly and easily used for CAD applications. In this paper we present a simplied DC thermal model that reproduces the I - V characteristics for the recessed gate P-HEMT devices. In our model, based on the work described in (Chaibi et al., 2012), we propose several issues to allow an easy implementation in circuit simulators. In particular we identify which transistor parameters have greater influence on the device behaviour for temperature variations. In order to verify the accuracy of the proposed model, the results are compared with those of Chaibi model (Chaibi et al., 2012), obtaining a negligible relative error with the improvement that the proposed model can be easily used in modelling languages, such as SPICE, with computational time very short. The Proposed DC Thermal Model Generally the empirical DC models of electronic
devices for CAD purposes are developed by using mathematical functions, whose graphical representation is similar to the measured I-V curves. The use of empirical parameters enables the modeled curves to be matched to the measured curves as well as possible. The absolute error between measured and calculated current values is minimised and the parameter extraction procedure is performed. In terms of computability an empirical model is much more easily tailored to fast convergence performance, computing time and accuracy as well as second-order effects. On the other hand, this kind of model is less intuitive than a physical model. Consequently, much more assistance is needed for the parameter extraction of the model, especially to perform an initial estimation of the empirical parameters that will give low CPU time consumption and the extraction of the best set of parameters, allowing the best fit between measured and modeled current values. Moreover the drain-source current is modeled as a function of internal voltages, considering the voltage drop due to the source and drain parasitic resistances. This is a limitation of this type of model, since the resistances depend on the bias conditions. In fact the parameter extraction procedure needs very difficult measurement of parasitic resistances under many bias conditions. The problem can be overcome by assuming a constant value for these resistances, but this approach affects the model with many approximations regarding the extracted parameters (Marani et al., 2009) (Gelao et al., 2011). Moreover, the empirical parameters are generally considered independent of, or weakly dependent on, the bias conditions, reducing the model accuracy, particularly at the beginning of the saturation region (Perri, 2011), (Marani et al., 2011), (Marani et al., 2012), (Marani et al., 2012), (Marani et al., 2013) and (Marani et al., 2014).
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