Lecture12

Circuits

Adder Reloaded

Multiplexers

Signal Storage

CS 21 - Computer Organization and Assembly Language Programming Lecture 12 Levels of Abstraction: Gates to Digital Circuits

University of the Philippines - Diliman College of Engineering Department of Computer Science

Circuits

Adder Reloaded

Outline

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Circuits

2

Adder Reloaded

3

Multiplexers

4

Signal Storage

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Outline

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Circuits

2

Adder Reloaded

3

Multiplexers

4

Signal Storage

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Circuits networks of gates could be grouped and abstracted into circuits or cicuit modules while there is no standard symbol for them, a box is frequently used arrows indicate the direction of data flow: they could either be inward(input), outward(output) or bidirectional

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Data line widths widths of data lines are frequently specified by a ”slash” marking on the line itself by ”width”, we mean number of bits that constitute the input or output a line with no marking indicates a default width of 1

Circuits

Adder Reloaded

Outline

1

Circuits

2

Adder Reloaded

3

Multiplexers

4

Signal Storage

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

A Review

Solve the following, without converting any of the addends to base 10 1001 + 0101

Circuits

The solution 1001 + 0101...

Adder Reloaded

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Truth table?

What would be the truth table for a single-bit adder?

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Truth table?

What would be the truth table for a single-bit adder?

Signal Storage

Circuits

Adder Reloaded

Adder Circuit: Sum Generation What is needed?

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Adder Circuit: Sum Generation What is needed? sum becomes 1 when there is an ODD NUMBER OF 1s in the input

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Adder Circuit: Sum Generation What is needed? sum becomes 1 when there is an ODD NUMBER OF 1s in the input

How is this implemented?

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Adder Circuit: Sum Generation What is needed? sum becomes 1 when there is an ODD NUMBER OF 1s in the input

How is this implemented?

XOR gate outputs 1 when number of input with value of 1 is odd

Circuits

Adder Reloaded

Adder Circuit: Carryout generation What is needed?

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Adder Circuit: Carryout generation What is needed? carryout becomes 1 when there are AT LEAST 2 1s in the input

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Adder Circuit: Carryout generation What is needed? carryout becomes 1 when there are AT LEAST 2 1s in the input

How is this implemented?

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Adder Circuit: Carryout generation What is needed? carryout becomes 1 when there are AT LEAST 2 1s in the input

How is this implemented? to take AND outputs of all possible pairs; output of AND gates are then used as input to an OR gate.

Signal Storage

Circuits

Adder Reloaded

Complete Adder Circuit

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Abstraction of the Single bit adder

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Larger Adders

But what if we want larger adders?

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Larger Adders

But what if we want larger adders?We just connect them together

Circuits

Adder Reloaded

Larger Adders: Abstraction

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Outline

1

Circuits

2

Adder Reloaded

3

Multiplexers

4

Signal Storage

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Multiplexers Study the following circuit

if the SEL input = 1, what is the output? if the SEL input = 0, what is the output? what is the purpose of this circuit?

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Multiplexers

Multiplexers circuit that is used to choose a single output among multiple inputs could be considered as MULTIPLE INPUT, SINGLE OUTPUT switch has three three data lines, INPUT, OUTPUT and SELECT schematic symbol is an isosceles trapezoid

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Multiplexers 4-to-1 Multiplexer

width or number of bits of the SELECT LINE depends on the number of inputs input and output could be of any width, not just a single bit question: I need to choose a single 8-bit output among 5 8-bit inputs - the multiplexer that I’m going to use should have a SELECT line width of...?

Circuits

Adder Reloaded

2-to-1 Multiplexer Schematic

Multiplexers

Signal Storage

Circuits

Adder Reloaded

4-to-1 Multiplexer Schematic

Multiplexers

Signal Storage

Circuits

Adder Reloaded

8-to-1 Multiplexer Schematic

Multiplexers

Signal Storage

Circuits

Adder Reloaded

16-to-1 Multiplexer Schematic

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Example 1

What is the value at the output when the value asserted at the selector line is 000? 110?

Circuits

Adder Reloaded

Multiplexers

Example 2

What is the truth table for this circuit?

Signal Storage

Circuits

Example 2

Adder Reloaded

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Outline

1

Circuits

2

Adder Reloaded

3

Multiplexers

4

Signal Storage

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Sequential logic Transistors and gates could also be used to store signals. Logic that is used to store signals is called SEQUENTIAL LOGIC, in contrast to COMBINATIONAL LOGIC. There are two main kinds of signal storing circuits: latches flipflops

Circuits

Adder Reloaded

Multiplexers

Storage control

A signal storage device must have three parts: input output control Control signal is essential because it tells us when we can store a new signal it tells us when we can not store a new signal also called a TRIGGER

Signal Storage

Circuits

Adder Reloaded

Triggering Mechanisms

Three triggering mechanisms Level sensitive Positive-edge triggered Negative-edge triggered

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Level Sensitive

when control signal is ”1”, it can take in input when control signal is ”0”, it cannot take in input mechanism used by latches

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Positive-edge trigger

input is taken while control signal is rising(changing from ”0” to ”1”) mechanism used by flipflops

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Negative-edge trigger

input is taken while control signal is falling(changing from ”1” to ”0”) mechanism used by flipflops

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Negative-edge trigger

input is taken while control signal is falling(changing from ”1” to ”0”) mechanism used by flipflops What would make for a good control signal? How do we generate the control signal?

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Clock signal used to synchronize the operation of our sequential circuits take note that in a complete period or cycle, there is exactly ONE: high level low level positive or rising edge negative or falling edge

clock frequency = 1/clock period

Circuits

Adder Reloaded

Multiplexers

Registers Set of identical flip-flops connected to store an n-bit word

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Usual Register Operation

registers are usually connected to a clock signal for triggering a register samples the value at its input port every falling edge IMPORTANT: sampled value is NOT immediately reflected at the output port, there is some delay

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Example 1

Assuming that the output takes half a clock period to appear, what would signal B look like?

Circuits

Example 1

Adder Reloaded

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Example 2

Assuming that the output takes half a clock period to appear, what would signal B look like?

Circuits

Example 2

Adder Reloaded

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Clock signal

Assuming that we have a circuit whose total delay is N. We want to save its output to a register. What is the relationship between N and the period of the clock signal that we would use as trigger for the register?

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Clock signal

Assuming that we have a circuit whose total delay is N. We want to save its output to a register. What is the relationship between N and the period of the clock signal that we would use as trigger for the register? clock period must be long enough to accomodate ALL gate delays rising and falling edge �steepness� must be detectable by flipflops

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Clock signal

Assuming that we have a circuit whose total delay is N. We want to save its output to a register. What is the relationship between N and the period of the clock signal that we would use as trigger for the register? clock period must be long enough to accomodate ALL gate delays rising and falling edge �steepness� must be detectable by flipflops Question: Where lies the problem, in the clock going too fast, or going too slow?

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Register File

organized collection of registers registers inside a register file are numbered: register 0, register 1, etc in a processor with FP operations, there is an FP register file and an INTEGER register file

Circuits

Adder Reloaded

Register File Ports

What are the ports of a register file? read register 1 read data 1 read register 2 read data 2 write write register write data

Multiplexers

Signal Storage

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Register File: Reading

Involved ports read register 1 - INPUT PORT - what register do we want to read? read data 1 - OUTPUT PORT - content of the register that we want to read read register 2 read data 2

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Register File: Reading Notes reading process done on the same clockcycle, it is a very fast process width of read register port depends on the number of registers contained in the register file Question: What is the width of the read register port of a register file with 32 registers?

width of the read data port depends on the word size of the processor/register file a read register port is always paired with a read data port number of read register port-read data port pairs could vary from one design to another

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Example

What are the values at read data ports 1 and 2 when read register 1 = 101 and read register 2 = 010?

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Register File: Writing

Involved ports write data - INPUT PORT - what data do we want written? write register - INPUT PORT - at what register should we write the data? write - INPUT PORT -single bit, indicates whether data at write data port must be written to register indicated by write register port

Circuits

Adder Reloaded

Multiplexers

Signal Storage

Register File: Writing Notes writing/�saving� process not immediate, must undergo usual register writing delay width of write register port depends on the number of registers contained in the register file Question: What is the width of the write register register port of a register file with 32 registers?

width of the write data port depends on the word size of the processor/register file a write register port is always paired with a write data port writing does NOT automatically happen every cycle, write single bit signal must be at correct value!