Assembly Language Review
A Basic Processor
CS 21 - Computer Organization and Assembly Language Programming Lecture 13 A Basic Processor University of the Philippines - Diliman College of Engineering Department of Computer Science
Assembly Language Review
Outline
1
Assembly Language Review
2
A Basic Processor
A Basic Processor
Assembly Language Review
Outline
1
Assembly Language Review
2
A Basic Processor
A Basic Processor
Assembly Language Review
A Basic Processor
Refresher
Assembly Language just one level away from machine language directly translated by assembler to machine language via lookup tables
Assembly Language Review
MIPS Instruction Types
There are 3 types of instructions in MIPS: R Type R stands for register-to-register examples include add, addu,sub, subu, nor, and, xor
I Type I stands for immediate examples include addi, andi, xori
J Type I stands for jump examples are j and jal
A Basic Processor
Assembly Language Review
R-Type
Notes: opcode - 6 bits - always 000000 rs - 5 bits - depends on the operand register rt - 5 bits - depends on the operand register rd - 5 bits - depends on the destination register sa - 5 bits - used in shift operations, 00000 otherwise function - 6 bits - depends on the operation/function
A Basic Processor
Assembly Language Review
I-Type
Notes: opcode - 6 bits - depends on the operation/function rs - 5 bits - depends on the operand register rt - 5 bits - depends on the operand register immediate - 16 bits - contains the immediate value
A Basic Processor
Assembly Language Review
A Basic Processor
J-Type
Notes: opcode - 6 bits - 000010 for j, 000011 for jal target - 26 bits - distance of target/destination from current j/jal instruction(in number of instructions)
Assembly Language Review
Outline
1
Assembly Language Review
2
A Basic Processor
A Basic Processor
Assembly Language Review
A Basic Processor
In the beginning...
Assume that we have the instruction add $t1, $t2, $t3
Assembly Language Review
A Basic Processor
In the beginning...
Assume that we have the instruction add $t1, $t2, $t3 What would we need to execute this instruction?
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Building a processor
Is this correct?
A Basic Processor
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Building a processor
How about the other instructions?
A Basic Processor
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Building a processor
A Basic Processor
Assembly Language Review
Memories
A Basic Processor
Assembly Language Review
Memories
technically, not part of the processor where we load instructions and load/store data
A Basic Processor
Assembly Language Review
Immediate Instructions
A Basic Processor
Assembly Language Review
A Basic Processor
Immediate Instructions
need for multiplexer before ALU since not all operands would come from register file(immediate operations: addi, subi, etc) need for extender since immediate operands from instructions are not yet 32-bits
Assembly Language Review
Loads
A Basic Processor
Assembly Language Review
A Basic Processor
Loads
need for multiplexer before register since not all values to be written to register file would come from ALU: some would come from data memory(loads)
Assembly Language Review
Program Counter
A Basic Processor
Assembly Language Review
A Basic Processor
Program Counter
need for multiplexer before Program Counter since next value of PC has two possible sources
Assembly Language Review
Program Counter: Next instruction
A Basic Processor
Assembly Language Review
A Basic Processor
Program Counter: Next instruction
dedicated adder which adds 4 to the current value of PC, output used by the multiplexer when program flow is normal(instruction executed not branch or jump)
Assembly Language Review
Program Counter: Jump/Branch
A Basic Processor
Assembly Language Review
A Basic Processor
Program Counter: Jump/Branch
dedicated adder which computes the value to which the PC would be set in case of branch or jump: one operand is the current PC, the other comes from the instruction itself