Lecture9

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Levels of Abstraction

Transistors

CS 21 - Computer Organization and Assembly Language Programming Lecture 9 Levels of Abstraction: Transistors to Gates University of the Philippines - Diliman College of Engineering Department of Computer Science

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Levels of Abstraction

hierarchical view of systems where details are made abstract, level by level used by people to avoid being overwhelmed by details the higher the level is, the less detail you see highest level is the system itself

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Transistors

What are transistors? building blocks of modern electronic devices has three terminals: drain/sink, gate, source control device: input in one terminal controls flow of current in the other two made of semiconductors, usually silicon(why?)

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Levels of Abstraction

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Schematic symbol and parts

gate is input current which flows from source to sink is output

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Discrete component

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Layout

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Microscopic View

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Response Curve

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Analogy: Tap

turning the tap induces water to flow applying current to gate causes current to flow what does this say about about the input and output of transistors? are they continuous or discrete?

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Analogy: Light Switch

has only two states: on or off very convenient in modeling the transistor as a binary device

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A switch in action

What would happen if we press the switch?

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Truth table Assuming that the the switch being pressed is ”1” and the light being turned on is ”1”, what is the truth table for the following diagram?

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Switches in action Our simple light bulb circuit could also feature multiple switches/inputs:

What is the truth table for this one?

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Switches in action

How about this one?

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From transistors to gates

What are logic gates? components that implement logic functions physically composed of interconnected switches

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Levels of Abstraction

From this...

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To this

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Gates

there are only a limited number of gate types, which could then be interconnected to perform more complicated logic functions the output of another gate could become the input of another with the exception of the INVERTER, all gates have 2 inputs or more

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Levels of Abstraction

NOT

inverts value of input operation symbol is overbar

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AND

to get output of ”1”, ALL inputs must be ”1” operation symbol is ”.” output could be negated to form operation NAND

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OR

to get output of ”1”, at least ONE input must be ”1” operation symbol is ”+” output could be negated to form operation NOR

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XOR

to get output of ”1”, number of inputs with value ”1” must be ODD operation symbol is ”+” with circle

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Basic Logic Operations


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Network of gates

Assuming A=1, B=1, C=0, and D=0, what would be the output of the following network of gates?

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Network of gates

Assuming A=1, B=1, C=0, and D=0, what would be the output of the following network of gates?

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Levels of Abstraction

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Network of gates

Assuming A=1, B=1, C=0, and D=0, what would be the output of the following network of gates?

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Levels of Abstraction

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Network of gates

Assuming A=1, B=1, C=0, and D=0, what would be the output of the following network of gates?

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Gate delay

after asserting input, the output does NOT become available immediately the amount of time between the assertion of input and the availability of output is called the gate delay

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