Probset1 reviewer

CS 21 Problem Set 1 University of the Philippines - Diliman College of Engineering Department of Computer Science This problem set is based on previous CS 21 long exams and will serve as a reviewer for the LE1. Answers in this probset will not be submitted.

1

Number Systems

1.1

Problem 1

Convert 55327 to base 2, 8, 10 and 16. (5pts)

1.2

Problem 2

Convert -4306 in 2C. Express your answer in 16 bit hexadecimal. (2pts)

1.3

Problem 3

1. Convert 83245.890625 to IEEE 754 double precision floating-point. (4pts) 2. Convert BEA40000 (in IEEE 754 single precision floating-point) to normalized binary form. (4pts)

2

Memory

2.1

Problem 1

The system depicted in Figure 1 has the following parameters: • transfer time from L1 cache to processor per access: 2ns • search time for L1 cache per access: 2ns • transfer time from L2 cache to L1 cache per access: 3ns • search time for L2 cache per access: 4ns • transfer time from main memory to L2 cache per access: 6 ns • replacement algorithm for L1 cache: FIFO • replacement algorithm for L2 cache: LRU If the program in Code Block 1 is ran 1. What is the hitrate for the L1 cache? (2 pts) 2. What is the hitrate for the L2 cache? (2 pts) 1

Figure 1: 3. After running the instruction sequence, what are the contents of the L1 cache? (2 pts) 4. After running the instruction sequence, what are the contents of the L2 cache? (2 pts) 5. How much time did the processor spend in loading data? (2 pts) Code Block 1 load A load B load C load D load A load A load A load D load E

2.2

Problem 2

I have a program with 100 read/load instructions. Its hitrate in the cache is 70%. The miss penalty of the cache is 10ns, while its hit time is 4 ns. If the miss penalty is increased by 20% and the hit time is held constant, the performance would degrade.

To ”counteract” this degradation, by how much should the hitrate improve? Express in terms of percentage of the original hitrate. (2.5 pts)

2.3

Problem 3

I have a program with 100 read/load instructions, and a processor design with three candidate caches. If there is no cache, the access time per read/load is 8ns. For each cache, determine the minimum hit rate required to ”breakeven” or to justify it being implemented.

1. Direct mapped cache. Hit time = 3ns. Miss penalty = 10ns. (1.5 pts) 2

2. Fully Associative cache. Hit time = 6ns. Miss penalty = 14ns. (1.5 pts) 3. Set-Associative cache. Hit time = 4ns. Miss penalty = 13ns. (2 pts)

3

Basic Electronics

3.1

Problem 1

Refer to Figure 2.

1. Given V = 24V, find VR1 , VR2Eq , VR3 .

2. Given I = 24A, find IR2A , IR2B , IR2C .

(5 pts)

Figure 2:

3.2

Problem 2

Refer to Figure 3.

1. Simplify and compute VTOTAL , ITOTAL , RTotal .

2. What is the power absorbed by the equivalent resistor Rtotal ?

(4 pts)

3.3

Problem 3

Refer to Figure 4.

1. Find VA , VB , VC , VD .

2. Find I1 , I2 , I3 , I4 .

3. Find Rι , Rβ , R , Rδ .

(6 pts)

3

Figure 3:

Figure 4:

4

Load Store Architecture

4.1

Problem 1

The program in Code Block 2 prints out �dlmn� in the console.

1. What is the output of the program in Code Block 3?(2.5 points) 2. What should be in the blank in Code Block 4 for it to have the same functionality as Code Block 2?(2.5 points)

4.2

Problem 2

1. After the program in Code Block 5 is ran, what is the console output?(2.5 points) 2. After the program in Code Block 6 is ran, what is the console output? Be careful of the spaces and newlines.(2.5 points)

4

Code Block 2 .text main: la $a0, diliman li $v0, 4 move $t1, $a0 lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) syscall li $v0, 10 syscall .data diliman: .ascii "D" .ascii "L" .ascii "M" .ascii "N"

0x00000020 1 0x00000020 1 0x00000020 1 0x00000020

5

Code Block 3 .text main: la $a0, diliman li $v0, 4 move $t1, $a0 lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) addiu $t1, $t1, lbu $t2, ($t1) addiu $t2, $t2, sb $t2, ($t1) syscall li $v0, 10 syscall .data diliman: .ascii "D" .ascii "L" .ascii "M" .ascii "N"

0x00000020 1 0x00000021 1 0x00000022 1 0x00000023

Code Block 4 .text main: la $a0, diliman li $v0, 4 move $t1, $a0 lw $t2, ($t1) li $t3, _______________ addu $t2, $t2, $t3 sw $t2, ($t1) syscall li $v0, 10 syscall .data diliman: .ascii "D" .ascii "L" .ascii "M" .ascii "N"

6

Code Block 5 .text main: li $t1, 0 li $t2, 0 li $t3, 5 start: add $t2, $t2, $t1 addi $t1, $t1, 1 bne $t1, $t3, start move $a0, $t2 li $v0, 1 syscall li $v0, 10 syscall

Code Block 6 .text main: li $t1, 0 li $t2, 3 li $t3, 5 la $a0, diliman li $v0, 4 syscall start: add $a0, $a0, 1 syscall addi $t1, $t1, 1 bne $t1, $t2, start li $v0, 10 syscall .data diliman: .ascii "D" .ascii "L" .ascii "M" .ascii "N" .ascii "\n"

7

4.3

Problem 3

1. After the execution of the program in Code Block 7, what is the value in register t0? (2.5 pts) 2. After the execution of the program in Code Block 7, what is the value in register t1? (2.5 pts)

8

Code Block 7 .text main: jal fxn #call function li $v0, 10 syscall

fxn: ####preamble###### subu $sp, $sp, 32 sw $ra, 28($sp) sw $fp, 24($sp) sw $t0, 20($sp) addu $fp, $sp, 32 ####preamble###### li $t5, 5 beq $a0, $t5, fin addu $a0, $a0, 1 jal

fxn

addi $t0, $t0, 1 addi $t1, $t1, 1 fin: ####end###### lw $ra, 28($sp) lw $fp, 24($sp) lw $t0, 20($sp) addu $sp, $sp, 32 addu $fp, $sp, 32 ####end###### jr $ra

.data

9