AUGUST 2016 VOLUME 14 | 5 EMBEDDED-COMPUTING.COM
IOT INSIDER
PG 8 Idle power management
TRACKING TRENDS PG 10 PC/104 maintains relevance
2016 Resource pG 32
Top left:
SIBORG SYSTEMS LCR-Reader® Multimeter LCR-Reader® Probe Station PG 47
Top right:
PENTAIR – SCHROFF
100G 14-slot ATCA Chassis Model 11990-141 PG 46
Bottom left:
DELL
Dell Embedded Box PC 5000 Dell Embedded Box PC 3000 PG 42
Bottom right:
TAG-CONNECT
2016 Tag-Connect TC2030-IDC-NL
TOP INNOVATIVE Plug-of-Nails No-Leg Cable PRODUCT PG 38 TM
WINNER
Announcing
2016
TOP INNOVATIVE PRODUCT
WINNERS
PG 30
AUGUST 2016 VOLUME 14 | 5 EMBEDDED-COMPUTING.COM
Top Innovative PRODUCT WINNERS SENDYNE dtSolve
™
pG 30
AMBIQ MICRO Apollo MCU
INTEL QUARK™ TECHNOLOGY ®
Intel® Quark™ Microcontroller D2000
AUGUST 2016 VOLUME 14 | 5 EMBEDDED-COMPUTING.COM
www.embedded-computing.com/designs/iot_dev_kits
Development Kit Selector EMBEDDED LENS
PG 12 Virtualization goes international
Guide pG 32 Top:
Bottom:
FIPS 140-2 Level 3 HSM 6 Gbps AES CBC Offload Engine PG 43
For Multi-OS and AMP Development PG 37
ENOVA TECHNOLOGY
MENTOR EMBEDDED MULTICORE FRAMEWORK
Middle:
MULTI-TECH SYSTEMS MultiConnect Conduit PG 58
Applications
TM
Shared Graphics Mentor® Embedded Linux®
Nucleus® RTOS
Security Bare Metal / Android
Safety VSTAR™
AUTOSAR
Mentor® Embedded Multicore Framework
Sub-threshold circuitry: Making Moore’s about power, not performance
Sourcery™ CodeBench
®
Heterogeneous Multicore SoC
PG 18
Advantages of digital power control for IoT cloud computing PG 14
Building trust in a model-based automatic code generator PG 22
tper ormin
the Others
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August 2016 | Volume 14 | Number 5
CONTENTS
opsy.st/ECDLinkedIn
FEATURES 14
@embedded_comp
COVER
Advantages of digital power control for IoT cloud computing By Chance Dunlap, Intersil
14
The 2016 Embedded Computing Design Resource Guide reveals this year’s Top Innovative Product winners on page 30 (Intel Quark Technology, Ambiq Micro’s Apollo MCU, and Sendyne dtSolve), along with scores of other solutions for the embedded and Internet of Things design engineer.
WEB EXTRAS ∠ Automotive-grade Ethernet maximizes bandwidth, minimizes packet loss for connected and autonomous cars
18
Sub-threshold circuitry: Making Moore’s about power, not performance
20
Wearable energy efficiency beyond the battery
Interview with Alex Tan, Marvell Semiconductor
By Jamie Leland, Content Assistant
http://opsy.st/2as0JJL
22
By Brandon Lewis, Technology Editor
∠ EEMBC gains active participation in China
Building trust in a model-based automatic code generator
By Markus Levy, EEMBC
By S. Tucker Taft, AdaCore
26
http://bit.ly/2aqSPgo
∠ Integrated IoT SoCs start with a variety of IP and the right core
How virtualization, modern silicon, and open source are conspiring to secure the Internet of Things
By Brandon Lewis, Technology Editor
22
Interview with Cesare Garlati, Chief Security Strategist, prpl Foundation
30 Top INNOVATIVE PRODUCT WINNERS Intel® Quark™ Technology | Ambiq Micro Apollo MCU | Sendyne dtSolve™
32 2016 RESOURCE GUIDE
IOT INSIDER
Power thrashing, the need for speed, and idle power management By Brandon Lewis, Technology Editor
10
TRACKING TRENDS PC/104 architecture maintains relevance in a competitive field
DOWNLOAD THE APP Download the Embedded Computing Design app iTunes: itun.es/iS67MQ Magzter: opsy.st/ecd-magzter
COLUMNS 8
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12
Published by:
EMBEDDED LENS Virtualization goes international
By Curt Schwaderer, Editorial Director
66
EDITOR’S CHOICE By Curt Schwaderer, Editorial Director
By Rory Dear, Technical Contributor
2016 OpenSystems Media® © 2016 Embedded Computing DesigAll registered brands and trademarks within Embedded Computing Design magazine are the property of their respective owners. iPad is a trademark of Apple Inc., registered in the U.S. and other countries. App Store is a service mark of Apple Inc. ISSN: Print 1542-6408 Online: 1542-6459 enviroink.indd 1
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IOT INSIDER
blewis@opensystemsmedia.com
Power thrashing, the need for speed, and idle power management By Brandon Lewis, Technology Editor
inefficient, to say the least. In fact, the transitions cost more power than if the circuit had just remained on.
Energy efficiency is almost synonymous with cost these days in the tech industry, particularly with the influx of resource-constrained Internet of Things (IoT) devices operating on battery power (or less). Power consumption for these devices can be the difference between profitable margins and sending technicians into the field to replace a coin cell, or consumers growing tired of charging a product and simply not using it anymore. However, the power consumption problem is not an easy one. Take, for example, the growing requirement for “always-on” sensing in many IoT systems. Even if the system uses a microcontroller (MCU) based on an extremely energy-efficient core and operates at very low duty cycles, in many cases most or all of the core must be fired up (even if seldomly) to check for changes in its surrounding environment. As discussed in the article “Sub-threshold circuitry: Making Moore’s about power, not performance” elsewhere in this issue, the dynamic energy required to change transistor states from on to off is a huge power suck in standard integrated circuits (ICs), and, likewise, transitioning a CPU from sleep or standby to active mode is power drain on a larger scale. The logical solution here is to wake up only those portions of the processor essential to verifying an environmental status change (which in the case of our sensor system would be a low-resolution analog IP block), while keeping other parts of the chip powered down. This is known as clock gating, a technique typically implemented through interrupt-driven software that shuts off the clock signal to parts of the processor, shutting off that circuitry. However, a drawback to this approach is power thrashing, an incident that occurs when latency in the software-based interrupt cuts the signal to a domain that actually needs to be powered up, resulting in an on-off-on series of power state transitions that is energy
ICE-Grain EPU Hardwarecontrolled d switching ing
Power Savings
Power
EPUs such as Sonics’ ICE-G1 enable faster power state transitions that result in significant energy savings.
Power Savings
Idle Power Opportunity Time Time
8
Earlier completion
Power Savings
FIGURE 1
Embedded Computing Design Resource Guide | August 2016
Given these limitations, engineers at Sonics, Inc. (www.sonicsinc.com), an IP company out of Milpitas, CA, took a different approach. Rather than executing dynamic power management techniques such as clock gating, voltage switching, and voltage scaling in software, Sonics developed a granular hardware subsystem that manages circuit idle time to minimize power consumption. They refer to it as an energy processing unit (EPU). The energy processing unit As its name suggest, an EPU is focused on power management, but unlike a CPU that governs active processes, an EPU is concerned with idle states. As a configurable power management subsystem that affords autonomous control over collections of logic, or grains, EPUs allow system-on-chip (SoC) designers to partition a chip into tens or hundreds of grains, enabling power management over each of them individually. These individual grains can be specified as part of a voltage domain, a power domain, a clock gating domain, or all three simultaneously, but more importantly, the hardware-based granularity permits the individual grains to be managed much more quickly than with traditional software-based methods. According to Sonics engineers, EPUs perform power state transitions orders of magnitude more quickly than operating system (OS) or dedicated MCU software, resulting in a virtuous cycle that requires less energy when transitioning between power states and faster time to completion (Figure 1). How it works
The architecture of EPUs such as the ICE-G1 calls for a dedicated controller that manages the clock and power control of various domains, which also provides the ability to specify additional power states for precision power management. Going back to our sensor subsystem example, the typical “sleep,” “doze,” and “on” power states can be supplemented with states like “wait detect” and “detect” modes in which the clock frequency and duration of the detection period can be carefully controlled. Not only does this imply that the low-resolution analog IP is active for the smallest amount of time, but the grain controller also ensures only that IP block is active unless further action is required. In an IoT that is increasingly about resource conservation, the power saved here is as good as gold. www.embedded-computing.com
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TRACKING TRENDS
rdear@opensystemsmedia.com
PC/104 architecture maintains relevance in a competitive field By Rory Dear, Technical Contributor PC/104 is into its third decade, standing the test of time whilst myriad form factors of yesteryear have faded into irrelevance. So why is PC/104 so persistent? How has it survived? The simple answer for me is the tireless work of the consortium that lies behind its continued success. A collaboration of companies with a common vision, it was formed in 1992 with 12 members but now has almost triple that. The PC/104 Consortium ensures PC/104’s continued relevance. The spine of a PC/104 stack is the desktop-derived peripheral bus, arguably the key evolution since 1992 (Figure 1).
FIGURE 1 WinSystems’ PCM-VDX-2-512-ST is a fanless PC/104 board with the desktop-derived peripheral bus.
The PC/104 Consortium’s continued role is to revise and evolve the form factor to encompass that next generation of peripheral bus, from a (now relatively) low 4.77 MHz ISA bus to the 8 GHz that’s available today. The consortium recognizes the importance of backwards compatibility and longevity. Hence, new revisions of the spec optionally retain the previous generation of peripheral bus to satisfy innumerable legacy PC/104 applications. The form factor’s unique selling point is of course its stackability, a trait that it has exclusively retained while the remaining vast infrastructure of embedded and desktop computing solutions continue to rely on a
traditional backplane format. The benefit of stacking is functional scalability: the ability to expand or contract functionality, to facilitate in-situ upgrades of legacy installations, or offer a range of configurations effortlessly from a single base product. The evolution of PC/104 is analogous to that of the ubiquitous Ford Mustang. The old adage “if it ain’t broke, don’t fix it” applies to both in the retention of their original unadulterated purity, and it’s under the hood where technology has kept both at the forefront of their respective industries – PC/104’s new engine is PCI express. PCIe integration into PC/104 The PCIe/104 and PCI/104-Express specifications were formally adopted by PC/104 Consortium voting members in 2008, with the former exclusively providing the PCIe peripheral bus and the latter also retaining the previous-generation PCI bus for its famed legacy support. Revisions to larger footprint standard form factors meant EPIC-Express and EBX-Express, while not supporting a stack-through architecture, represent valid baseboards to suitably support a rising PCIe/104 peripheral stack (Figure 2). PCIe/104 satisfies the breadth of I/O diversity required without falling into the incompatibility trap that SystemOn-Module (SoM) form factors invariably suffer due to multiplexed pin assignments. PCIe/104 offers two distinct types of fixed I/O configurations that offer flexibility without sacrificing PC/104’s scalable compatibility (Figure 3). Type 1 offers a high-speed 1x16 or 2x8 PCIe link, providing 8 Gbps peripheral bus bandwidth for the intensive (invariably video) processing applications.
FIGURE 2 EPIC-Express and EBX-Express revised to support a rising PCIe/104 peripheral stack.
10
Embedded Computing Design Resource Guide | August 2016
www.embedded-computing.com
FEATURE
TYPE 1
TYPE 2
USB 2.0
2
2
SMB
1
1
PCIe x1
4
4
PCIe x4 PCIe x16
2 1
USB 3.0
2
SATA
2
LPC
1
RTC Battery
1
FIGURE 3
Two fixed I/O configurations offer flexibility without sacrificing scalable compatibility.
Where such bandwidth isn’t needed, Type 2 trades this for dual USB 3.0, SATA, x4 PCIe links, and a low-pin-count (LPC) bus. Such a diverse range of possible stack configurations is underpinned by the bus’s mechanical flexibility and built-in electronic dynamic compatibility. The flexibility and expandability of the bus and its mechanical layout allow different stack configurations to support an array of diverse project requirements. Intelligent Link Shifting automatically assigns PCIe links throughout the stack and a PCIe/104 to PCI bridge peripheral board adds legacy PCI support where the choice of CPU module can’t. The PCIe advantage Due to the computing industry’s obsession with backplane motherboard and slot daughter board methodology, PC/104 finds itself as the only nonbackplane system supporting a PCIe peripheral bus. This translates to PC/104 being the only format that lets designers evolve existing solutions to include functionality not envisioned, or technology that didn’t even exist, during the initial design phase. The evolution of USB to version USB 3.0 has provided unprecedented bandwidth to hot-swappable peripheral devices evolving in parallel with the fixed PCIe bus to which it is effectively a subset. The ubiquitous take up of both has driven cost so down today that their respective capabilities and pricing structure are so similar that they invariably go hand-in-hand, complementing each other to satisfy either fixed or removable peripheral devices. Such is the design of www.embedded-computing.com
PCIe that a single high-speed x16 bus can be split to provide double the lanes at half the bandwidth, and so on. The first beneficiaries of a new, higher bandwidth peripheral bus are invariably graphics cards, always the first to push the bus bandwidth boundaries and arguably the key driver in the commercial computing arena when next generations get developed. In the embedded space, with ever increasing die density and exponential improvements in integrated graphics chipsets, increasingly the traditional peripheral boards find themselves locally satisfied within a System-on-Chip (SoC). This negates the need for such peripheral bus bandwidth. Additionally, embedded computing technology naturally strives for miniaturization. The real-estate pressure of often redundant, large peripheral bus connectors in a design that doesn’t fully utilize them poses a miniaturization bottleneck. One solution to this problem is OneBank. The PCIe/104 and PCI/104-Express specification defines three identical and adjacent connectors, integrated into one three-way connector. OneBank replaces that bank of three (superfluous in the majority of small form factor applications) with one connector that is identical to the first bank of both Type 1 and Type 2 PCIe/104 connectors. Maintaining the location of the first bank ensures compatibility with existing PCIe/104 boards as well as one another. Offering a 60 percent reduction in connector size, OneBank increases available PCB real estate and drives down cost. Support is also retained for lane shifting, the jumper-less autoconfiguration of peripheral boards. What’s next for PC/104? With the bandwidth boundaries of PCIe continuing to be pushed as hard as when it first landed, it’s unlikely any entirely new peripheral bus will replace PCIe any time soon. The third generation of PCIe, currently implemented in PC/104, offers a bandwidth of 8 Gbps, which is overkill for everything but the latest high-performance applications. The fourth generation will double this to 16 Gbps, though the development of interconnects is even further ahead, ready to support 28 Gbps. Embedded Computing Design Resource Guide | August 2016
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EMBEDDED LENS
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Virtualization goes international By Curt Schwaderer, Editorial Director Software defined networks (SDN) and network functions virtualization (NFV) are key technologies driving data center scaling at the enterprise and cloud application level. Virtualization is extending its reach into network infrastructure and Internet of Things (IoT) applications as well. I caught up with Patrick Blesso, Senior Manager, Product Portfolio at GlobeNet, about their international virtualization strategy and how it can extend reach and lower cost of delivering network services. Virtualization primer Virtualization is based on the premise that all functional systems boil down into common compute, storage, and network resources. In the networking world, network architectures are the starting point for deploying wired and wireless networks. Interfaces and functional components are defined. Once the reference architecture is established, equipment manufacturers develop the components that implement these functions and interfaces using fixed-function hardware.
“THE BUSINESS MODEL FOR SERVICE PROVIDERS IS ATTRACTIVE – THEY CAN DIP THEIR TOE INTO INTERNATIONAL MARKETS WITHOUT HAVING TO OUTLAY LARGE AMOUNTS OF CAPITAL EXPENSE TO DETERMINE IF THEIR STRATEGY IS A GOOD ONE. GETTING BANDWIDTH AND ACCESS AS A SERVICE PROVIDES FOR AN INCREMENTAL ENTRY INTO OTHER REGIONS.”
Over the past five years, the networking world has taken a page out of the enterprise virtualization playbook. Instead of creating all these fixed-function hardware components, functions have been abstracted away from purpose-built hardware and have become software-only functions (i.e. “virtualized”). These virtualized functions simply require an abstracted interface to compute, storage, and network resources. This network
12
Embedded Computing Design Resource Guide | August 2016
virtualization paradigm has dramatically changed the economics and development execution of network infrastructure. Virtualization has started becoming a mainstream feature of LTE networks. Ericsson and Nokia currently have products that virtualize the LTE mobility management entity (MME) infrastructure, signaling gateway (S-GW), and packet gateway (P-GW) functions. Ericsson has publicly announced that they intend to have their entire LTE portfolio virtualized by the end of 2016. Virtualization is taking hold in the networking world. However, its reach isn’t limited to wireless infrastructure. A number of router, voice-over-IP (VoIP) session border controller (SBC), and cable network providers are also virtualizing network functions within their networks as well. GlobeNet’s take on virtualization GlobeNet is a submarine network operator providing wholesale transport services in Latin and North America. GlobeNet provides network capacity to ISPs in Brazil, Colombia, and Venezuela. These ISPs need ways to extend their reach in the US, but capital expense challenges to manage deployment, needed licenses, and US taxes are major roadblocks to these initiatives. Likewise, providers in the US have significant interest in extending their services to Latin and South America. These providers are willing to connect to specific Internet exchange points, but are faced with the same challenges. Geographic reach, increased capacity GlobeNet’s international virtualization architecture includes virtual routers located in Miami, New York, and Sao Paulo, which allows customers to expand network reach, improve performance, aggregate international capacity, and manage the connections to peering fabrics. These routers become an integral part of customers’ networks for the extended delivery of their service offering. Transport services between international locations are also available as part of the offering. Management capabilities are also provided, which allow customers to manage their network architecture and capacity upgrades as needed. Basic engineering services are provided by GlobeNet so customers can quickly manage and control their extended network. Scalability is a critical aspect for these international providers from a geographic reach and capacity standpoint. In a recent GlobeNet press release, Erick Contag, www.embedded-computing.com
President and Chief Executive Officer said, “Carriers and ISPs need to present additional value to their customers in order to stand out in the competitive global telecommunications market. Virtualization enhances any customer network by expanding it to critical global points of presence without having to invest in the deployment of a subsea fiber system or purchase expensive equipment.” Under the hood GlobeNet leverages Juniper hardware to deploy their virtualization services, which can enable customers such as ISPs, Internet exchanges, and tier 1 providers. “We chose Juniper routers because of the performance and latency benchmarks they offer,” Patrick Blesso said. “The infrastructure is internalized into the customer networks. In addition to the increased capacity, we offer management of routers, ports, upgrades, and protocols, so operating within this extended virtual environment can adhere to the same availability and reliability standards they currently operate within.” The physical infrastructure is shared but logically segmented across the customer base. When virtual routers are spun up, they make ports available to customers according to their bandwidth needs. These router instances can be scaled up and down to optimize power and capacity. Security is another important aspect of the environment. “There are distributed denial of service (DDoS) mitigation capabilities within the infrastructure. Router spin-up and configuration is also controlled through a secure virtual private network (VPN). Once the router is brought up, the customer can configure restrictions for port access and bring the virtual environment into their security domain,” Blesso said. The business model for service providers is attractive – they can dip their toe into international markets without having to outlay large amounts of capital expense to determine if their strategy is a good one. Getting bandwidth and access as a service provides for an incremental entry into other regions. www.embedded-computing.com
There are adopters utilizing this virtual environment today. A tier 1 provider in Colombia is using the GlobeNet platform and successfully managing their extended network in Colombia and the US. They are currently using multiple 10 GbE in total bandwidth. Summary Virtualization has historically been used to scale web applications across multiple server platforms in a datacenter. GlobeNet is an example of leveraging virtualization to extend geographic reach and increase service areas without requiring a large capital expense. Early adopters are successfully extending their geographic reach while still effectively managing their combined physical and virtual network. The virtual network environment enables GlobeNet to focus in the areas of transport and increased security, which can help network operators extend reach while still providing high reliability services.
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SILICON: DIGITAL POWER
Advantages of digital power control for IoT cloud computing By Chance Dunlap
Power supplies are usually the last design task performed during system development. The discussion often starts with a specific input voltage and multiple outputs at specific currents with an efficiency target to manage thermals. However, today’s designs are getting much more complex.
P
ower supply designers know that a good supply – especially one for higher power levels of hundreds of watts – must balance often conflicting goals. These include output flexibility, dynamic line/load performance, highand low-load efficiency, component tolerances, thermal issues and temperature coefficients, monitoring and protection, and dynamic changes in voltage or current. The difficulties of designing a highperformance power supply are not fully appreciated, except by supply experts who have developed multiple solutions over the years to tackle the latest load requirements. This is exemplified in the challenge of designing supplies for servers and storage networking
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equipment that make up the Internet of Things (IoT) cloud computing and telecom infrastructure. The performance demands once relegated to high-performance CPUs are even extending down to medium and even smaller-size loads. Analog topologies have plateaued To meet these requirements, designers have developed many innovative analog control loops and techniques. Examples include constant on-time or hysteretic control, along with the classical approaches of voltage and current mode, just to cite a few. Despite the features that these designs offer, they are no longer capable of meeting user demands. With a pulse-width modulation (PWM) controller, functional blocks such as error amplifiers, comparators, and ramp generators are limited by their design constraints and variations. They are subject to time and phase shifts in the signal chain, as well as noise injection and large signal response issues to component selection for the compensation network (Figure 1). The nature of these designs (circuits must be tuned to a specific application requirement to minimize the tradeoffs) means that a single controller cannot provide the flexibility that modern systems require. This lack of freedom has caused the performance and use of analog controllers to plateau. Fortunately, digital power control (also known as ”digital power”) offers a superior alternative.
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SILICON: DIGITAL POWER
“THE BENEFITS OF DIGITAL CONTROL GO BEYOND ADVANCED CONTROL TACTICS AND FLEXIBILITY OF IMPLEMENTATION.”
What is digital power control? To some it is still an analog control loop, but with some parameters adjustable via a digital interface. For example, the output voltage could be changed via a command through a PMBus interface. But this interpretation lacks the benefit of what digital control, and hence digital power, can bring to the market.
FIGURE 1 Shown is an all-analog PWM power controller.
FIGURE 2 Depicted here is digital implementation of a power controller.
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Digital supplies to the rescue True digital power control with a digital PWM DC/DC controller is much more than just supervision of an inner analog loop. Instead, the actual closed-loop feedback path is executed entirely in the digital domain, starting with the analogto-digital conversion of the feedback voltage. Once all the information is in the digital domain, new, sophisticated control techniques and digital signal processing can be applied. Examples include changing states and algorithms based on the conditions of the load, allowing an optimized response even under changing conditions (Figure 2). The benefits of digital control go beyond advanced control tactics and flexibility of implementation. The algorithm can adapt to changes, overcoming previous limitations that occur in analog supplies such as component variation due to temperature rise, tolerances, and even aging. Note that the initial tolerance of some passives, such as inductors and capacitors, can easily be ±20 percent or more, with tighter-tolerance parts significantly increasing the cost of the design. A digital power controller no longer needs to precariously balance a long list of passive and analog components, all arranged in a complicated design, while accounting for their non-idealities. With advanced digital control algorithms, even the challenge of loop stability is no longer a concern.
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SILICON: DIGITAL POWER
Digital approach helps OEMs succeed While digital control may seem new and too good to be true to some designers, the reality is quite different. Figure 3 shows a dual-channel, dual-phase controller that integrates a high-performance step-down converter for a wide variety of power supply applications. It eliminates the need to compensate the loop for stability without compromising system bandwidth. Adaptive algorithms within the IC shown in Figure 3 can be used to automatically change the operating state to increase efficiency and overall performance with no need for user interaction. The device’s fully digital loop can achieve precise control of the entire power conversion process with no software required, resulting in a flexible device that is easy to use. The control algorithm is implemented to respond to output current changes within a single PWM switching cycle, achieving a smaller total output voltage variation with less output capacitance than traditional PWM controllers. The
device enables designers to fully control and monitor, via the PMBus interface, every power rail to maximize reliability. Digital modulation technology An advanced digital controller needs to meet three key requirements: it should support sufficiently high bandwidth; ideally, it should be compensation-free; and it should support fixed-frequency switching. 1. Digital modulation technology can allow a controller to react to voltage deviation in a single PWM switching cycle by sampling the error and computing the modulation signal multiple times during a switching period, significantly reducing group delay and therefore supporting very-high-bandwidth operation. 2. Certain digital controllers do not need to know the actual outputcapacitor value; instead, they rely on digital algorithms to make the correct adjustment, even for stability. The result is a reduction in the amount of capacitance needed to support a specific application, while providing a compensation free design. The response ensures that any transient conditions are met while preserving stability and minimizing any ringing or over-shoot. 3. Traditionally, voltage- or currentmode hysteretic controllers have offered the best loop response, but these come with the drawback of switching with variable frequencies. Modern telecommunication equipment that uses digital power controllers requires fixed frequency operation, allowing tight control of the noise spectrum in enduser applications. These can be achieved with digital modulator and compensation techniques. The system-level benefits of this approach are that designers are no longer limited in their power component choices. Furthermore, such a controller eliminates the effects of component aging or environmental variations since the digital loop is constantly monitoring and accounting for the change.
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FIGURE 3
This block diagram depicts Intersil ZL8800 DC/DC step-down controllers, a family of mixed-signal power-conversion power-management ICs (PMICs). The diagram illustrates the level of internal complexity it offers, most of which is transparent to the designer.
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Another advantage of the all-digital approach to closed-loop control, in the case of the ZL8800, is that it is compatible with a user-friendly and powerful graphical user interface (GUI) that allows simple configuration, validation, and monitoring of multiple devices using just a PC with a USB interface. Using the GUI, engineers can change all features and functions of the digital power supply design, including setting up the power architecture, defining voltage rails as well as current-sharing operation, establishing event- or time-based sequencing, monitoring hardware and faults, and saving project and configuration files.
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Conclusion Power density, transient response, and efficiency are all of chief concern to power supply designers tasked with powering advanced FPGAs, processors, and ASICs employed in IoT cloud computing servers and telecom equipment. Digital PWM DC/DC controllers offer superior transient response performance and compensation-free design that allow power supply designers to autonomously balance the tradeoffs between dynamic performance and system stability on a continuous basis.
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Chance Dunlap is the Director of Infrastructure Power at Intersil. Chance received his BSEE from Purdue University and MBA from the University of Arizona. www.embedded-computing.com
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SILICON: LOW POWER
Sub-threshold circuitry: Making Moore’s about power, not performance By Brandon Lewis, Technology Editor The Ambiq Micro Apollo MCU employs sub-threshold circuitry for power consumption as low as 34 µA/MHz.
As silicon geometries approach the edge of physics, a new rule of thumb is poised to govern the computing industry: “Thou shalt reduce power consumption by 50 percent every two years.” How could that be possible? Sub-threshold voltage circuitry.
T
he ULPBench is a standardized benchmark developed by the Embedded Microprocessor Benchmark Consortium (EEMBC) for measuring the energy efficiency of ultra-low power (ULP) embedded microcontrollers (MCUs). The benchmark ports a normalized set of MCU workloads to a target, such as memory and math operations, sorting, and GPIO interaction. These workloads form the basis for analyzing the active and low-power conditions of 8-, 16-, or 32-bit MCUs, including active current, sleep current, core efficiency, cache efficiency, and wake-up time. The results are then calculated using a reciprocal formula (1000/Median of 5 times average energy per second for 10 ULPBench cycles), yielding a score based on the amount of energy consumed during workload operation – the ULPBench.
In November 2015, Ambiq Micro (www.ambiqmicro.com), a semiconductor vendor out of Austin, TX, submitted its Apollo MCU for testing against the ULPBench, scoring 377.50 (the reciprocal formula means the higher the benchmark score, the better), more
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than twice that of the previous bellwether, STMicroelectronics’ STM32L476RG. Depending on the direction of an application, this 2x power savings can be repurposed to extend battery life or add new features (Sidebar 1). According to Scott Hanson, Ph.D., Founder and CTO of Ambiq Micro, advances in energy efficiency such as those being realized today could lead to a new iteration of Moore’s law in which the power consumption of embedded microprocessors is cut in half every couple of years. “What we’re seeing is every one of our customers wants to one-up their product from last year,” Hanson says. “If they want to add some great new feature – maybe last year it was heart rate monitoring and this year a microphone to do some always-on voice processing – that all takes CPU cycles. Today a lot of these companies are only running effectively at 1 million instructions per second (MIPS) or so, so very few cycles per second. Maybe they want to make a leap to 10 MIPS and, suddenly, MCU power goes from being a 25 percent contributor to a 75 percent contributor. That’s a problem. “Much in the same way that Moore’s law was about adding more transistors in the same area, we have to be very focused on driving energy down 2x or 4x every single year,” he adds. Sub-threshold voltage circuitry demystified What enables the Apollo MCU to achieve such notable ULP performance metrics is the use of sub-threshold circuitry, which operates on supply voltages below the threshold voltage of typical 1.8V or 3.3V MCUs. Threshold voltage represents the minimum gate-to-source voltage required to change a transistor’s state from “off” to “on” or drive a signal “low” or “high” for logic purposes. In a standard 1.8V integrated circuit (IC), significant current can be required to perform these state changes, which directly correlates with power consumption as dynamic energy – the energy associated with turning transistors on or off – is calculated by squaring the operating voltage (Figure 1).
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SILICON: LOW POWER
Ambiq, however, uses their Sub-threshold Power Optimized Technology, or SPOT, to operate transistors at voltages of less than 0.5V (sub-threshold), which provides a couple of benefits (Figure 2). First, state switching at these lower operating voltages makes for lower dynamic energy consumption; Second, the leakage current (see Figure 1) of “off” transistors can be harnessed to perform most computations, in essence recapturing previously lost power. In the case of Ambiq’s 32-bit ARM Cortex-M4F-based Apollo MCUs running at up to 24 MHz, the result is a platform that consumes 34 µA/MHz executing from flash and sleep currents as low as 140 nA, both of which are lower than competitive Cortex-M0+ offerings, the company says. “What we effectively do is we take a normal microprocessor, including both the analog elements and the digital elements, and run them at much lower voltage,” Hanson explains. “On the digital side we dial down the voltage very low, anywhere between 200 mV and 600 mV, depending on the type of device you’re using. That requires a system-wide change in how you design the chip, from the standard cells to how you do simulations to how you do time enclosure to how you do voltage regulation – all of that has to be modified specifically to run at lower voltage. And then on the analog side we run at extremely low gate-to-source voltages, so we’ll use tail currents in amplifiers that are as low as a few picoamps.” Sub-threshold circuitry is not without its challenges, however. While it can deliver exponential gains in energy efficiency, such low-voltage operation precludes processor speeds above a couple hundred MHz (for now) and also makes for circuits that are inherently more sensitive to fluctuations in temperature and voltage (Figure 3). “This obviously comes with its share of problems,” Hanson says. “We’re very sensitive to temperature fluctuations and voltage fluctuations and process fluctuations, but we have a pretty wide range of techniques that we use to address www.embedded-computing.com
that, for instance with proprietary analog circuit building blocks. Every analog circuit that you can read about in a textbook is based on saturated transistors and bipolar transistors, not sub-threshold-based MOSFETS, so we have had to reinvent a lot of the underlying analog circuit building blocks such that they work at extremely low sub-threshold currents.
FIGURE 1 Dynamic power consumption, or the energy required to switch a transistor on or off, is responsible for the majority of the energy used by ICs, particularly at higher operating voltages.
Voltage
FIGURE 2 1.8
Super-threshold
0.9 0.5 0.25
Sub-threshold
0.0
V-High V-Switch V-Low
Ambiq’s SPOT platform operates transistors at subthreshold voltages of less than 0.5V to achieve significant energy savings compared to standard IC implementations.
Time
FIGURE 3 Besides exponential current fluctuations in response to changes in operating voltages at subthreshold levels, slight temperature variations can lead to radical current deltas as well. This mandates significant compensation in sub-threshold circuitry. Embedded Computing Design Resource Guide | August 2016
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SILICON: LOW POWER
“Internally, we’re doing a lot of voltage conversion to get voltage down, we’re managing all the process variations, voltage variations, and temperature variations, and the result is dramatically lower energy,” Hanson continues. “There’s not any one silver bullet. There’s a wide range of things that we do to make sub-threshold possible.” More than Moore’s Advances in sub-threshold circuitry and voltage optimization will become more prevalent as Moore’s law continues to eke out smaller process nodes and the gate-to-source channels of MOSFETs shrink in size, necessitating lower and lower supply voltages as well as increasingly smaller thresholds. As Moore’s law advances towards the limits of physics, power consumption will become as much of a tenet of computing’s first amendment as performance, if not replace it. “One of the challenges we see for Ambiq at a system level is that, as we’ve driven energy efficiency of the processor down, the overall contribution of the microprocessor to the system has gone down to the point where customers say, ‘Hey, you knock another 10x out of the energy, it doesn’t make a difference because you’re already very, very low,’” says Hanson. “What they really need is for us to knock that energy down by 10x, but they need a commensurate increase in performance to take advantage of that. That is to say, if I reduce energy by 10x, they want to see an accompanying
10x increase in performance so they can stay in the same power envelope but dramatically increase the processing power. We focus a lot on that as a company: How can I both increase performance and continue to reduce energy? “We saw Moore’s law in the highperformance computing industry with PCs, notebooks, and phones. We saw Moore’s law lead the way in allowing us to deliver something better and more incredible every year so we could add more features, but we were kind of stuck in the same form factors, the same battery life, etc.,” Hanson continues. “We’re going to see the same thing happen with power consumption, and that means that we’re constantly going to be talking about how we need lower energy in every component.”
WEARABLE ENERGY EFFICIENCY BEYOND THE BATTERY By Jamie Leland, Content Assistant It’s true: charging a Fitbit couldn’t be simpler. Still, for a wearable device, especially one that requires 24-hour wear to take full advantage of its capabilities, charging even once a week feels like a chore. When the battery drains, it’s like your carriage turned back into a pumpkin. What was once the leading authority on your personal fitness level is now just an ugly, slightly uncomfortable bracelet. It’s so disenchanting that every time you put it on the charger, it might not make it back onto your wrist. This is exactly the problem that Misfit wanted to remedy. Their goal? Produce a device that never needs to be removed. The result? Their original tracker, the Misfit Shine, boasted a six-month battery life; most activity trackers need to be charged at least once a week. But while the Shine outpaced most other trackers in battery life, many users found the functionality to be too limited. The Shine was equipped with a Silicon Labs EFM32 MCU, Bluetooth Low Energy (BLE), and a 3-axis accelerometer. That put the Shine about on par with
FIGURE1 The Misfit Shine 2 has a six-month battery life. Similar activity trackers, like Fitbit’s newest and most advanced “everyday” offering the Fitbit Alta, require a charge about every five days.
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Embedded Computing Design Resource Guide | August 2016
Fitbit’s most basic offering, the Fitbit Zip, which, while not intended to track sleep, offers similar battery life and a more useful display. The next-generation Shine would need to add functionality without backpedaling on their commitment to long-term wear. Enter Ambiq Micro’s Apollo MCU. The Apollo in the Misfit Shine 2, twice as powerful as the EFM32 MCU in the original Shine, allowed for the addition of a vibration motor for call and text notifications; multicolored LEDs and a capacitive touch sensor for a more clear, interactive user interface; and a magnetometer to improve the accuracy of activity tracking (Figure 1). Thanks to Ambiq’s SPOT platform, the Apollo also boasts industry-leading energy efficiency, mitigating tradeoffs in power consumption brought on by the added functionality to retain the six-month battery life of the Shine 2’s predecessor. But while the Apollo offers unparalleled power consumption compared to similar MCUs, the processor isn’t the only place where battery life can be extended. Other components, such as sensors and wireless chips, could also leverage sub-threshold circuitry such as that used on the Apollo MCU to reduce power, and software can be optimized to further increase energy efficiency. The way Ambiq’s Chief Technology Officer Scott Hanson sees it, “We’re constantly going to be talking about how we need to be lower energy and the batteries need to be better. Every component needs to be more efficient than it is today. We’re always going to be under that pressure.”
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SOFTWARE: SAFETY CERTIFICATION AND COMPLIANCE
Building trust in a model-based automatic code generator By S. Tucker Taft
O
How do you go about building trust in an automatic code generator used for safety-critical systems? For example, given a code generator that takes a real-time model for a flight control system represented in Simulink and Stateflow and turns it into MISRA C or the SPARK subset of Ada, what process could ensure that the generated code is a faithful representation of the original real-time model? The US Federal Aviation Administration (FAA) has a well-defined process for creating a qualified code generator, meaning a code generator whose output can be trusted to match exactly the semantics of the input model, with nothing left out, and nothing added. This process is defined in DO-178C (Software Considerations in Airborne Systems), and its accompanying documents DO-330 (Software Tool Qualification Considerations) and DO-331 (Model-Based Development and Verification).
or a tool like a code generator, which could insert an error into an airborne system, the highest level of tool qualification (Tool Qualification Level 1 (TQL-1)) is required if the tool is to be used for a subsystem whose failure could be catastrophic (a level-A subsystem).
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Not surprisingly, this level of tool qualification can involve a great deal of time and effort, often estimated in the hundreds of hours per 1,000 source lines of code (KSLOC) of the tool. This is similar to the level of effort per line required for verifying a level-A, safety-critical embedded software component. But tools can be significantly more lines of code. For example, if the tool were 100 KSLOC, the traditional approach to verification at level A might cost in the ballpark of $5 million. Hence, there is a strong incentive to investigate alternative approaches to testing such a tool, while still achieving the TQL-1 objectives.
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SOFTWARE: SAFETY CERTIFICATION AND COMPLIANCE
Traditional approaches to testing The traditional approach to verifying a high-integrity application requires the tester to: › Carefully define and validate a set of high-level requirements for the application › Derive module-level requirements, which are specific enough to determine the appropriate implementation, from the high-level requirements › Check each module of the implementation against its low-level requirements using unit testing › Perform integration-level testing of all high-level requirements Coverage analysis is then performed to ensure that all code is covered by these tests, and to ensure there is no code remaining in the application that might provide extra, undesired functionality. For an embedded software component, this combination of unit-level testing of each module and integration-level testing of the component as a whole can work well. In particular, unit testing of embedded software modules is practical because, in many cases, the number and complexity of inputs for each module are manageable and the outputs are relatively easily identified and checked. However, for a tool like an automatic code generator, which generally involves multiple phases involving progressive transformation of the input model into the generated code, unit testing can be a real challenge. On the other hand, integration testing is not significantly harder for such a tool, as the number of intermediate phases does not affect the overall inputs and outputs of the tool. This dichotomy between the complexity of unit testing and the relative ease of integration testing of a multi-phase tool like a code generator is illustrated in Figure 1. www.embedded-computing.com
In Figure 1, we show the overall data flow of an optimizing automatic code generator, where the input model is referred to as the “User Language” and the output is referred to as the “Source Code.” Multiple phases are pipelined, with the first phase reading in the original model represented in the User Language (M0), and representing the model in some internal data structure (M1). This is then transformed into lower level representations of the model (M2, M3, etc.), until the final phase produces actual Source Code in the desired programming language. To perform integration testing, one only need prepare a model represented in the User Language using the normal model creation tools, feed it through the code generator, and then examine the generated Source Code to determine whether it satisfies the high-level requirements in terms of form and functionality, using normal compilers, static analysis, and testing tools for that programming language. By contrast, performing unit testing of each phase of a multi-phase code generator is significantly more complex. An internal data structure must be constructed for each test of a given phase that conforms to the representation used for input to that phase, then the phase needs to be invoked on that input, then the output representation must be checked to see whether it has the expected form and content. Preparing such inputs and checking such outputs requires laborious manual processes or the creation of special tools, which might need qualification themselves. Integrated unit testing Given the complexity of unit testing, an alternative approach has been developed called integrated unit testing. Figure 2 illustrates this approach: In Figure 2, we show a process that embeds unit test requirement monitors and unit test oracles (a checker that “knows” what is the desired output), directly into the structure of the tool. With these monitors and checkers embedded in the tool, we then follow the steps used for normal integration testing, preparing representative
FIGURE 1
Integration testing is preferred to unit testing thanks to ease of use. Embedded Computing Design Resource Guide | August 2016
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SOFTWARE: SAFETY CERTIFICATION AND COMPLIANCE
models (Test0 through Test4) and feeding them through the code generator. But now, rather than merely waiting for the tool to generate the final output, each embedded unit-test requirement monitor keeps track of whether an input to its associated phases matches its associated unit test, If it does match, it logs that fact and then triggers a corresponding unit test oracle-based checker, which verifies that the output of the phase corresponds to the expected transformations of the input for the particular test pattern. For example, imagine we have defined a particular transformation of a gain block at the model level into an expression at the code level that multiplies the value of a signal variable by a constant. We would have a unit-test-requirement monitor logging every time a gain block shows up in its model-level input representation, and when it does, trigger the oracle-based checker to look at the code-level output representation to be sure it involves a multiplication of the appropriate signal variable by the
FIGURE 2
The integrated unit testing approach is a simpler alternative to unit testing
appropriate constant. This is a very simple check to perform, and so long as enough models are passed through the tool as a whole, coverage of this particular unit-test pattern can be expected. After running a number of models through the tool, we can end up with a table like the one in Figure 2. Along the left side we have the models, Test0 to Test4. Along the
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top we have the pairs of test requirement and test oracle for each distinct phase of the tool. For example, tr0,2 means the test requirement 2 for phase 0, while to2,1 means the test oracle 1 for phase 2. Each time a particular input to a phase satisfies the test pattern associated with some test requirement, we will see a SAT in the requirement’s column at the input model’s row. Each time a test oracle is invoked we will see either a PASS or FAIL in the oracle’s column at the input model’s row. If we end up with an empty column, the test pattern was never encountered (the corresponding low-level requirement was not covered). If we end up with a FAIL in a test-oracle column, that means we have a test failure (the corresponding low-level requirement was not properly implemented). In the table represented in Figure 2, we see that tr0,1 and tr2,0 were not covered, while to0,2 and to2,1 had failures. Such a table documents a thorough unit testing process while avoiding the expense of preparing special inputs for each test pattern.
FURTHER READING Rierson, Leanna. Developing Safety-Critical Software: A Practical Guide for Aviation Software and DO-178C Compliance. CRC Press, 2013. Certification Authorities Software Team (CAST), CAST-25. “Considerations when using a Qualifiable Development Environment (QDE) in Certification Projects.” FAA. Sep 2005. https://www.faa.gov/aircraft/air_cert/design_approvals/air_software/cast/cast_papers/ media/cast-25.pdf Taft, S. Tucker. “TQL-1 Qualification of a Model-Based Code Generator.” HCSS 2016, Annapolis, MD. May 2016. http://cps-vo.org/node/24503 Richa, Elie; Etienne Borde, Laurent Pautet, Matteo Bordin, and Jose F. Ruiz. “Towards Testing Model Transformation Chains Using Precondition Construction in Algebraic Graph Transformation” in Analysis of Model Transformations. AMT’14 Valencia, Spain. Oct 2014. http://ceur-ws.org/Vol-1277/4.pdf
A trusted code generator Building trust in a code generator is essential if we are going to rely more and more on such tools to help automate the generation of safety-critical software from higher-level models. However, innovative approaches are needed to manage the potentially prohibitive expense of achieving tool qualification for a modern, optimizing code generator at the highest level of trust, TQL-1. Integrated unit testing is one such approach. When combined with other systematic approaches for specifying requirements formally, and generating components such as requirement monitors and oracles from these requirements, it becomes possible to achieve TQL-1 in a way that not only is more cost effective, but also supports incremental qualification as the tool evolves. AdaCore is in the process of qualifying its QGen code generator using these approaches, and thereby providing the model-based development community with a new tool that can be a trusted part of an overall high-integrity, software-intensive system engineering process. S. Tucker Taft if the Vice President and Director of Language Research at AdaCore. www.embedded-computing.com
Embedded Computing Design Resource Guide | August 2016
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STRATEGIES: VIRTUALIZATION
How virtualization, modern silicon, and open source are conspiring to secure the Internet of Things Interview with Cesare Garlati, Chief Security Strategist, prpl Foundation
In this Q&A with Cesare Garlati, Chief Security Strategist at the prpl Foundation and former Vice President of Mobile Security at Trend Micro discusses his organization’s standardization push around roots-of-trust, virtualization, open source, and interoperability in order to secure the Internet of Things (IoT).
The prpl Foundation is known for open source tools and frameworks like OpenWrt and QEMU, but has recently ventured into the security domain with a new Security prpl Engineering Group (PEG) and the “Security Guidance for Critical Areas of Embedded Computing” document, not to mention wooing you away from your role at security giant Trend Micro. What can you tell us about the drivers behind these moves? GARLATI: One way to look at it is a supply-and-demand schema (Figure 1). On the demand side, according to Gartner, the security market was worth $77 billion in 2015 and it’s going to grow much faster. One strong demand-side driver is the need for stronger security, because industry is not doing a very good job of it – and when I say industry I mean from silicon to software to services – and all of the spending is not resulting in better information security. Another very important aspect in terms of demand is the specific hardware layer. The current consensus among security professionals is that security is really about risk management, and there’s no single solution that can guarantee 100 percent coverage on anything. Currently, the most responsible and professional approach is through multiple tiers that reduce risk. This is an evolution in the security industry, because it wasn’t this way just a few years ago. A few years ago you would have vendors selling solutions that would “stop” attacks, but industry has realized this is simply not possible. A more credible approach is to say, “I can offer you the best you can do based on your specific criterion.” So from a practitioner or developer perspective, the more layers you put in place, the better off you are. What has been missing, though, is the hardware layer. We have solutions at the networking layer, we have solutions at the web server layer, we have solutions at the application layer, we have solutions in authentication, you name it. All of these tiers are there but what is still missing is the hardware, and there’s demand for this hardware-level security. Now what’s intriguing is a multi-tenant use case. Based on my conversations with actual OEMs, carriers, and so forth, the model where one single vendor deploys a box and then controls, administrates, and is ultimately responsible for it is a model of the past. The model that is evolving and is already part of the design and architectural choices that vendors are making today is a model that I would make a rough parallel with the model of an app store. So, how do you secure something where you have multiple entities that are peers in this [new] box? The old model of Trusted Execution Environments was good in the past, but if you are one of those applications that runs in the secure world, you have to trust all of the other secure tenants. On the supply side, what vendors can do and what is called the march of silicon, is that silicon is so powerful these days that it can embed more and more of the features that have been realized in software layers in the past. And, obviously, anything you move down the stack becomes much more resilient because it become much more difficult to tamper, to change, and so forth.
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STRATEGIES: VIRTUALIZATION
How specifically is modern silicon going to help improve current security paradigms? GARLATI: Something that’s very important is all of the modern processor cores support some kind of hardware-assisted virtualization, and security by separation is a very well understood concept in the security world that is coming to lower level hardware. This idea of looking at things separately is well described in the “Security Guidance for Critical Areas of Embedded Computing” document, so that although independently they might not be more secure, as a system, one bad apple doesn’t compromise the whole system – or in the jargon of the security community, helps prevent lateral movement. If you put in place virtualization and security by separation, what you get is something that’s much more difficult for an attacker to penetrate one weak entry point in the system and then move laterally to some more critical aspect. An example is the Jeep hack, where they got into the entertainment system and were able to re-flash something that controls the CAN bus and control the brakes and the steering wheel. In a virtualized situation, this would simply not be possible – the hardware is the same, but from a technology perspective it appears to applications as completely isolated systems.
Multicore processors make all this possible because there’s no performance impact as there was in the past, but at the same time they also make the process more efficient. If you have multiple guests on a multicore processor and can start mapping guests to defined cores, that’s when you start extracting all the power from these multicore platforms. A byproduct of security in this case is performance, which is exactly the opposite of tradition, because traditionally when you secured something you lower performance. But if you put in place security by separation, you’re actually much better off using processor virtualization.
“SOMETHING THAT’S VERY IMPORTANT IS ALL OF THE MODERN PROCESSOR CORES SUPPORT SOME KIND OF HARDWAREASSISTED VIRTUALIZATION, AND SECURITY BY SEPARATION IS A VERY WELL UNDERSTOOD CONCEPT IN THE SECURITY WORLD THAT IS COMING TO LOWER LEVEL HARDWARE.” But the [virtualized] architecture does not assume multicore. It does not assume anything. Multicore is a better architecture to get value out of, but is not a requirement. The hypervisor, or virtualization manager, itself is a very low-level, thin layer of software, which you could call a microkernel that provides the security, APIs, services, or agent, depending on the situation. If you have a Linux system, you speak in terms of services, or perhaps inter-process communication, and you don’t ever reach the operating system; if it’s a very small device it’s probably some sort of API or library, depending on the situation. The hypervisor provides all the security features – the moment that the hypervisor is trusted, you trust the code, and you’re sure that the code that is booting has been signed, the hypervisor itself becomes the virtual root-of-trust for everything else because you don’t need multiple keys or different Trusted Execution Environments or whatever you have in place to secure a virtual situation like this. Once the hypervisor is trusted, the only thing each individual entity needs to trust is the hypervisor itself. You can have a hardware root-of-trust to validate the hypervisor and then the hypervisor becomes the root-of-trust, or you can have many different variations. There might
FIGURE 1 Drivers from both the supply and demand sides of the market are pushing industry towards standardization around new security frameworks.
www.embedded-computing.com
Embedded Computing Design Resource Guide | August 2016
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STRATEGIES: VIRTUALIZATION
be a trusted element, multiple trusted elements, a one-time programmable element, it can be built into the SoC itself, it can be built into the system in terms of boards and so forth. There are many variations and It depends on the situation, but it’s very flexible. The key concept is that the hypervisor becomes the root of trust and provides all the security services through virtualization, meaning that these services can be driven by policies that are specific to guests.
need to be open sourced up, you need to be able to look at the code, you need to be able to change the code, you need to be able to make sure there are no nation-state actors that tampered with code or drove some of the requirements so security components are weaker. There are a whole host of concerns when you look at the global market on the supply side that lead to this sort of open-source security framework (Figure 2).
In fact, the more complicated the stack or rich the operating system, the easier it is for the developer to achieve all of this, because these architectural concepts have been in the Linux stack for a long time, but always deployed in terms of software. Now is the time for hardware to meet the software. So from a developer perspective, this really just looks like a driver, and the driver provides all the services, including inter-process communication, key management, and everything else. But again, since it’s virtualized it can provide different services for different guests. It’s a whole new world.
The second thing is reference implementations for these various APIs. In the first case these will be documents, and in the second case these will be actual pieces of software. A key aspect of this is that both will be provided as open source with the most permissive licensing possible, which means you’re be free to do anything you want, even to build commercial implementations, for everyone. That’s really the true nature of prpl. It’s not just open source because open source has many different licensing schema, with the General Public License (GPL) being the least permissive and the Berkeley Software Distribution (BSD) considered one of the most permissive. prpl goes even one step further than BSD, which is what commercial entities are really asking for, and what really makes sense for business.
Where does prpl figure into this whole equation, and how are you working to move this virtualized security architecture forward? GARLATI: It’s all about standards, interoperable protocols and APIs, and making sure this is not a vendor-specific solution, as has happened in the past. Vendor lock-in is not what large players are looking for. The supply side is telling us that proprietary systems, especially in a security context, don’t really cut it. You
The Security PEG is actively working on this right now, and we have the APIs. The problem is that we have too many APIs. The exercise we are going through as we speak is to try to rationalize these APIs and provide two things. One is the API definition, regardless of implementation. That’s what’s expected of prpl. These are not standards. We don’t provide certification.
There’s room in this model for an open-source community, but there’s also room for commercial providers to develop commercial-grade implementations of these APIs. So the definition will be common and standardized, and an open-source, community version will be available for everyone, but not as production ready as required by some major players. In that case there are vendors, and there are already three entities within prpl and many more coming soon that will provide the commercial-grade implementations required. As I said, all of this is real, but we have too many variations. We need to come to an agreement. That’s what an industry consortium is really about. It’s not about developing things, it’s about getting all the key players together to come up with what’s considered the best on both the supply and demand sides. When it comes to security, it has to be cross-vendor, it has to be platform agnostic. Heterogeneous environments are the reality these days, and vendor lock-in is something noone wants, especially on the security side. Read the prpl Foundation’s “Security Guidance Document for Critical Areas of Embedded Computing” at prpl.works/security-guidance, or get involved at prplfoundation.org/participate.
FIGURE 2 Despite increased security spending, the number and severity of cyberattacks has increased recently. In response, the prpl Foundation has proposed a multi-tenant, multi-tiered security architecture based on roots of trust, virtualization, open source, and interoperability.
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Embedded Computing Design Resource Guide | August 2016
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Sendyne dtSolve™ Sendyne dtSolve brings desktop-level simulation into the embedded domain through a physics-based model solver that enables computation of differential algebraic equations (DAEs) and ordinary differential equations (ODEs) in a software package that consumes less than 300 Kb. This small footprint, amenable to Cortex-M-class devices, allows physical modeling to be performed at the edge for prediction of time-sensitive applications such as real-time control, or in scenarios where network transmission is costly or non-guaranteed.
INTEL® QUARK™ TECHNOLOGY
Model Intel® Quark™ Microcontroller D2000 The Intel Quark Microcontroller D2000 represents the next generation of x86 computing for resource-constrained Internet of Things (IoT) devices. Optimizations have driven down the cost and power consumption (8 mA at 32 MHz) of the D2000’s 32-bit i486 architecture, resulting in a platform with desktop-class performance that is competitive across datasheet parameters with other industry-leading microcontrollers. Most importantly, however, the D2000’s Pentium-compatible instruction set has major implications for interoperability and scalability that span edge, gateway, and cloud.
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Ambiq Micro Apollo MCU The Ambiq Micro Apollo MCU signals a revolution in energy efficiency and power consumption for embedded microprocessors, as the use of sub-threshold voltage integrated circuits (ICs) yields a miniscule 34 µA/MHz power draw, per the company. Underlying digital and analog circuit blocks had to be redesigned to compensate for fluctuations in voltage, temperature, and process when operating in the sub-0.5V domain, but as supply voltages are lowered in response to shrinking silicon geometries and power savings become critical, we expect to see similar architectures become more commonplace.
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Embedded Computing Design Resource Guide | August 2016
SOMNIUM TECHNOLOGIES DRT Cortex-M IDE www.somniumtech.com
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2016 Resource Guide AUTOMOTIVE
INDUSTRIAL STORAGE
Microchip Technology Inc.
33
Rogue Wave Software
34
ATP Electronics
55
IOT DEV TOOLS AND OSS
Advantech
56
Annapolis Micro Systems, Inc.
35
ExpressLogic
57
Lynx Software Technologies
36
MultiTech
58
Mentor Graphics
37
congatec
59
Tag-Connect
38
Pentair/Schroff
59
Timesys
38
RFMicron, Inc.
60
HARDWARE
NETWORKING
ACCES I/O Products, Inc.
39
ADLINK Technology, Inc.
Annapolis Micro Systems, Inc.
40
Dolphin Inc.
ADLINK Technology, Inc.
41
Critical Link
41
OPERATING SYSTEMS AND TOOLS
Dell OEM Solutions
42
WITTENSTEIN High Integrity Systems
62
Enova Technology Corporation
43
Quantum Leaps, LLC
63
Intermas US LLC
44
MiTAC Computing Technology Corp.
44
PROCESSING
Opal Kelly Incorporated
45
Pentek
Pentair/Schroff
46
Serious Integrated, Inc.
47
STORAGE
Siborg Systems Inc.
47
APACER
Stratum Systems
48
VersaLogic Corporation
48-49
60, 62 61
64
65
WIRELESS Microchip Technology Inc.
65
INDUSTRIAL
34
Active Silicon, Ltd.
49
Elma Electronic Inc.
50
EMAC, Inc.
51
IEI Technology USA Corp
52
Kontron AG
52
Vector Electronics & Technology, Inc.
53
Virtium
54
Embedded Computing Design Resource Guide | August 2016
www.embedded-computing.com
OS81118 MOST® INICs
FEATURES
The OS81118AF with integrated coaxial physical layer (cPHY) cuts MOST150 system costs in half compared to MOST150 optical systems.
ĄĄ ĄĄ
150 Mbits/s MOST network bandwidth Intelligent Network Interface Controller architecture that provides a complete network interface on a single chip Supports low-cost LED/POF-based optical physical layer and coax physical layer
Both the OS8118AF and OS8118BF offer a USB 2.0 highspeed port, an I2C port, a streaming port, a GPIO port and MediaLB® and SPI application interfaces which seamlessly connect to an abundant range of SOCs.
ĄĄ
The USB 2.0 high-speed port comes as a standard application interface that supports control, audio, video and packet data, which helps you to simplify your application. Furthermore the MOST Linux® driver that is available from Microchip accelerates time to market and helps enhance the software quality. It is available starting with Linux Mainline Kernel Version 4.3.
ĄĄ
Flexible management of available bandwidth
ĄĄ
Embedded MOST network management
The OS81118AF comes with integrated coaxial physical layer (cPHY) and supports optical physical layer (oPHY) as well. The OS81118BF supports oPHY only.
ĄĄ
ĄĄ
Supports state-of-the-art industry standard streaming and packet formats
Supports Inter-Processor Communication (IPC) between the MediaLB controller and USB
ĄĄ
Provides remote control mode capability
ĄĄ
MOST Technology Linux Driver available
ĄĄ
ĄĄ
Universal Serial Bus (USB) port supports high-speed USB 2.0 upstream data transfers using either USB 2.0 physical layer or HSIC physical layer Powerful MediaLB controller
embedded-computing.com/p373550
Microchip Technology Inc.
www.microchip.com/OS81118 www.embedded-computing.com
480-792-7200 @MicrochipTech
https://www.facebook.com/microchiptechnology/
https://www.linkedin.com/company/microchip-technology
Embedded Computing Design Resource Guide | August 2016
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Embedded Computing Design Resource Guide
Automotive
Embedded Computing Design Resource Guide
Automotive
Klocwork 2016 and OpenLogic OSS support and audit Rogue Wave Software drives automotive software development for leading automotive manufacturers and suppliers by providing world-class development and test tools to ensure the security and reliability of their proprietary, open source, and supply chain software. With Klocwork continuous static code analysis and reporting, and OpenLogic open source support and auditing, the embedded auto-motive software lifecycle is covered. Enforce MISRA-C and MISRA-C++ coding standards MISRA coding standards provide guidance to the automotive industry to help facilitate safe and reliable coding practices for safetycritical embedded software. With built-in, automated detection and reporting for MISRA-C and MISRA-C++, MISRA coding standard violations are automatically flagged at the developer desktop and through continuous integration (CI) tools. Users, QA teams, and safety experts can implement defect detection and coding standard enforcement within one static analysis tool. Klocwork is also ISO 26262 certified, so developers expend less effort achieving functional safety compliance and more time building features customers want. Know what’s in the software – and the confidence to fix issues Whether from internal developers, external suppliers, or the open source community, it’s important to support and understand all aspects of code. With OpenLogic open source support, automotive developers get around-the-clock access to elite open source architects ready to support, consult, and train on the top packages used by embedded teams. With OpenLogic audit services, automotive development and legal teams get an OSS bill of materials (BOM) and license obligation analysis based on detailed scans of internal code bases and applications.
FEATURES ĄĄ
Continuous static code analysis
ĄĄ
Build-in MISRA checkers
ĄĄ
ISO 26262 certified
ĄĄ
Access to Tier 3/4 open source architects
ĄĄ
Guaranteed SLAs with support contracts
Shaping the future of automotive software security With millions of lines of code embedded in vehicle electronics, automobiles are becoming ever more susceptible to sy stem crashes, viruses, and hacks. Ensuring that automotive software is free of security vulnerabilities and software defects is critical, which is why OEMs, Tier One and Tier Two companies use Rogue Wave static code analysis and open source solutions. Rogue Wave is a member of the GENIVI Alliance, lending its expertise to ensure software security and reliability to a rapidly growing and highly software-dependent sector of the automotive industry. embedded-computing.com/p373548
Rogue Wave Software www.roguewave.com
36
info@roguewave.com https://www.linkedin.com/company/8823
Embedded Computing Design Resource Guide | August 2016
1.800.487.3217 @RogueWaveInc
www.embedded-computing.com
FEATURES
Open Project Builder Open Project Builder™ is an innovative FPGA application development tool that simplifies and speeds programming, providing a remarkably short and efficient programming experience.
ĄĄ
Board Support for latest Altera & Xilinx FPGAs
ĄĄ
Works from High Level, Data Flow Concept
ĄĄ
Intelligent Wizard for HDL Users
ĄĄ
GUI Design Entry and Debug Tools
ĄĄ
Tested & Optimized Open Project Builder IP Cores
ĄĄ
Modules Automatically Handle Synchronization
ĄĄ
Supports Multiple Data Types
ĄĄ
Integrates with Matlab™ Simulation Flow
ĄĄ
Standard Avalon and AXI IP interfaces
Open Project Builder users have the capability to use FPGA IP from any source, such as VHDL, HighLevel Synthesis (HLS), Verilog, or other HDL. Open Project Builder can also port IP to/from other platforms. It uses standard Avalon and AXI IP interfaces. Open Project Builder provides fast portability of applications between Altera and Xilinx and to newer FPGA families.
Annapolis is famous for the high quality of our products and for our unparalleled dedication to ensuring that the customer’s applications succeed. We offer training and exceptional special application development support, as well as more conventional support.
embedded-computing.com/p373350
Annapolis Micro Systems, Inc. www.annapmicro.com
www.embedded-computing.com
wfinfo@annapmicro.com 410-841-2514
Embedded Computing Design Resource Guide | August 2016
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Embedded Computing Design Resource Guide
Dev Tools and OSs
Embedded Computing Design Resource Guide
Dev Tools and OSs
LynxSecure • LynxOS 7.0 • LynxOS-178
RTOS and Secure Virtualization Software from Lynx Software Technologies LynxSecure LynxSecure provides one of the most flexible secure virtualization solutions for use in Intel® architecture based embedded and computer systems, including the new 4th generation Intel® Core™ i7 and Core™ i5 processors. LynxSecure is based on separation kernel technology and was designed from the ground up with security as a key design goal. Adding virtualization to the separation kernel allows for multiple different guest Operating Systems (OSs), both real-time and general purpose, to run in secure domains on a single embedded system. LynxSecure 5.2 is the latest version of this established product and adds a new feature that offers real-time detection of stealthy advanced persistent threats such as rootkits.
FEATURES LynxSecure LynxSecure runs fully virtualized guest OSs such as Windows®, Solaris, Linux®, Android, and Chromium OS, requiring no changes to the guest OS ĄĄ LynxSecure offers the ability to run guest OSs that have Symmetric Multi-processing (SMP) capabilities ĄĄ Designed to maintain the highest levels of military security offering a MILS architectural approach ĄĄ
LynxOS 7.0 LynxOS 7.0 provides the ability for developers to embed military-grade security directly into their devices ĄĄ LynxOS contains networking support for long haul networks with TCP/IPV4, IPV6, 2G/3G/4G cellular and WiMax communication stacks. It also supports the short-haul networks common with M2M applications such as 802.11 WiFi, ZigBee wireless mesh and Bluetooth ĄĄ LynxOS is a true fully preemptive hard real-time OS with a POSIX application interface ĄĄ
LynxOS 7.0 LynxOS 7.0 is a deterministic, hard real-time operating system that provides POSIX-conformant APIs in a small-footprint embedded kernel. LynxOS provides symmetric multi-processing support to fully take advantage of multi-core/multi-threaded processors. LynxOS 7.0 contains new security functionality designed for M2M devices. LynxOS 7.0 supports the most popular reference targets in the ARM and Intel PowerPC architectures, including the new 4th generation Intel® Core™ i7 and Core™ i5 processors.
LynxOS-178 LynxOS-178 provides full POSIX conformance, enabling developers to take advantage of the time-to-market and investment-protection benefits of open standards-based development ĄĄ Supported standards include ARINC 653 as well as support for the Future Airborne Capability Environment (FACE) standard currently under development ĄĄ LynxOS-178 is the only time- and space-partitioned RTOS that has been awarded the FAA Reusable Software Component (RSC) for DO-178B certifications ĄĄ
LynxOS-178 LynxOS-178 is a safety-critical COTS RTOS that fully satisfies the objectives of the FAA DO-178B level A specification and meets requirements for Integrated Modular Avionics developers. LynxOS-178 delivers the security and real-time responsiveness needed for safety-critical systems and provides a low-risk path to DO-178B certification for developers to meet the technical requirements in the production of software for airborne systems.
embedded-computing.com/p372827
www.lynx.com 38
inside@lynx.com
linkedin.com/company/lynxsoftwaretechnologies www.facebook.com/lynxsoftwaretechnologies
Embedded Computing Design Resource Guide | August 2016
800-255-5969 @LynxSoftware
www.embedded-computing.com
Mentor Embedded Multicore Framework – For Multi-OS and AMP Development How to Configure and Deploy Multiple Operating Systems and Applications across Homogeneous and Heterogeneous Multicore Processors Today’s complex SoC architectures are combining more applicationclass and microcontroller-class cores than ever before. Consolidation of heterogeneous operating environments on a single device is much harder to achieve. There is also more difficulty when attempting to fully utilize the underlying hardware. While symmetric multiprocessing (SMP) operating architectures allow load balancing of the application across homogeneous processors within the multicore infrastructure, they do not scale to heterogeneous cores. Until now there has been a lack of accepted standards and software design paradigms to take full advantage of asymmetric multiprocessing (AMP), even on homogeneous multicore SoCs. Having certain mechanisms in place would enable AMP applications to leverage parallelism offered by the multicore configuration. The Mentor Multicore Framework based on the OpenAMP standard Acknowledging the design complexities of AMP architectures and realizing the need for an accepted standard, The Multicore Association® (MCA) has created the OpenAMP™ standard. Mentor Graphics has contributed initial software to the OpenAMP open source project and created the Mentor® Embedded Multicore Framework, the first commercial implementation of the OpenAMP standard. The Mentor Framework allows developers to configure and deploy multiple operating systems and applications across homogeneous or heterogeneous multicore processors. It enables developers to manage the many challenges associated with inter-process communication (IPC), remote processor life cycle management, and simplified booting within a multicore environment by supporting native, trusted, and supervised/virtualized configurations. The Mentor Framework allows software developers to control the boot-up and shut down of individual cores on a SoC, allowing applications to maximize compute performance or minimize power consumption.
FEATURES ĄĄ
ĄĄ
ĄĄ
ĄĄ
ĄĄ
Configure and deploy multiple operating systems across homogeneous or heterogeneous processor cores Consolidation of the system – including discrete components Supports native, virtualized, and trusted configurations of multiple operating systems System level visualization of heterogeneous system behavior Common toolchain supports the entire solution enabling heterogeneous system development, debug, and analysis
Product Benefits: ĄĄ
ĄĄ
ĄĄ
Enables consolidation – Leverage multiple operating systems within a multicore design while easily managing payloads across cores Manage compute performance and power consumption – Developers are given control over boot-up and which cores to shut down, helping to manage power consumption Locate and fix problems deep in the system – Powerful tools give developers visibility deep inside multiple cores and fix problems quickly on a single common timeline
Visualization deep into the system Mentor Embedded Sourcery™ CodeBench with built-in Sourcery™ Analyzer have been integrated into the Mentor Framework allowing various operating systems and virtualized guest runtimes along with the applications, to be visualized on a single common timeline.
Mentor Graphics
www.mentor.com/embedded-software/?cmpid=9285 www.embedded-computing.com
embedded_software@mentor.com
embedded-computing.com/p373652
www.linkedIn.com/company/mentor-embedded
@MentorEmbedded 1-800-547-3000
Embedded Computing Design Resource Guide | August 2016
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Embedded Computing Design Resource Guide
Dev Tools and OSs
Embedded Computing Design Resource Guide
Dev Tools and OSs
Tag-Connect TC2030 Plug-of-Nails™ Programming Cable Tag-Connect’s patented Plug-of-Nails™ spring-pin cables allow you to eliminate Test and JTAG headers from your PCB’s saving all of the cost and most of the space a header on each and every board. With footprints starting about the size of an 0805 resistor, Tag-Connect cables have become the de-facto JTAG connection for IoT products especially tiny BLE beacons, wearables, radio modules etc. Designed and made in California, Tag-Connect cables are available ”With Legs“ that temporarily snap into the PCB keeping the connector securely fastened for prolonged debugging or programming sessions or with ”No Legs“ (seen here) which are hand-held, mounted in a fixture, or can be used with a retaining Clip Board holding the cable in place (much like an earring fastener). The legged version is inserted and removed from the PCB simply by squeezing. Since no mating component is required on the PCB other than the zero-height footprint, the Tag-Connect solution excels in low-profile and space-constrained and price-sensitive designs. Each low cost cable can replace many thousands of traditional connectors. Solutions are available covering most popular JTAG programmers/ debuggers, MCU’s, FPGA’s, DSP’s, USB and serial connections, in many cases also significantly reducing the natively used pin-count.
Tag-Connect
www.Tag-Connect.com
FEATURES ĄĄ No Header! No Brainer! The Greenest Connector is No Connector! ĄĄ Eliminates Bulky and Expensive JTAG connectors
ĄĄ Zero Height, Zero Cost PCB footprints save Space and Cost on each
and every PCB
ĄĄ Ultra-reliable Crown-Tipped Spring-Pins ensure robust and reliable
connections ĄĄ PCB Footprints starting from about the size of an 0805 resistor ĄĄ Plugs Directly to Pads and Holes in the PCB – no part to buy, stock and assemble onto the board. ĄĄ Space-Saving Solutions for most popular MCU’s, DSP’s, FPGA’s JTAG and Serial connections
Tag-Connect – No Header, No Brainer!
embedded-computing.com/p373684
sales@tag-connect.com
www.linkedin.com/company/tag-connect
+1 877 244 4156 @TagConnect
Dev Tools and OSs
Timesys LinuxLink Embedded Linux Development Solution Timesys is a pioneer and industry leader in providing embedded Linux and Android™ solutions. Timesys’ product, LinuxLink, includes a software repository and suite of tools, enabling developers to build, debug, deploy and maintain embedded Linux devices. LinuxLink tools include: Bakery – Enables you to quickly and easily jump start your custom Yocto Project based development. With our free Bakery web-based tool, you simply configure your custom image and then download and run our generated Yocto Project installer to setup the development environment required to build BSP and matching software development kit (SDK). Factory – Enables you to configure a custom board support package (BSP) and matching software development kit (SDK) by leveraging the most commonly used open source technologies. TimeStorm – Provides integration with Factory and Yocto built SDKs. Our TimeStorm IDE allows you to develop and debug your system and applicationlevel Linux software, helping you streamline development and maintenance. Timesys also offers project-based support for various build systems including Yocto Project, customized training and professional services ranging from board bring up to embedded application development and testing. Our products and services have been used across many industries including medical, automotive, telecommunications, industrial control/process automation, military/ aerospace, and consumer electronics.
ĄĄ Support for an extensive number of architectures (ARM, x86, MIPS, …), SoCs (Altera, Atmel, Intel, NXP, Qualcomm, TI and Xilinx ), partner development kits and community boards (BeagleBone, Raspberry Pi, Wandboard). Timesys-provided BSPs are based on partner-offered designs and technologies, enabling you to leverage hardware to the fullest extent. ĄĄ LinuxLink free and intuitive Web-based tool for both 1) configuring custom Factory builds and 2) customizing Yocto Project images at https://ll5.timesys.com ĄĄ Factory tools enabling full customization of your embedded Linux platform ĄĄ LinuxLink custom security notification service to inform developers of discovered vulnerabilities and patches that are specific to their devices ĄĄ LinuxLink update service to provide developers with package version and BSP version update and an easy and efficient way to integrate patches into their device software ĄĄ Easy integration of other open and third party software, with or without help from Timesys ĄĄ Access to development resources including “HowTo” docs, demos/starting points, videos, webinars, podcasts and more embedded-computing.com/p343992
sales@timesys.com
Timesys
www.timesys.com
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FEATURES
Embedded Computing Design Resource Guide | August 2016
@Timesys
+1.866.392.4897
www.embedded-computing.com
mPCIe-COM Family PCI Express Mini Cards ACCES I/O Products is pleased to announce the release of a new family of mini PCI Express (mPCIe) multi-port serial communication cards. These small, low-priced, PCI Express Mini cards feature a selection of 4 or 2-ports of software selectable RS-232/422/485 asynchronous serial protocols on a port by port basis. These cards have been designed for use in harsh and rugged environments such as military and defense along with applications such as health and medical, point of sale systems, kiosk design, retail, hospitality, automation, gaming and more. The small size (just 50.95mm x30mm) allows for maximum performance in applications where space is a valuable resource. Each RS-232 port is simultaneously capable of supporting data communication rates up to 921.6 kbps. RS-422/485 modes support data communication speeds up to 3 Mbps. The cards provide ±15kV ESD protection on all signal pins to protect against costly damage due to electrostatic discharge. Existing serial peripherals can connect directly to industry standard DB9M connectors on the optional breakout cable accessory kits. The mPCIe-COM cards were designed using type 16C950 UARTs and use 128-byte transmit/receive FIFO buffers to decrease CPU loading and protect against lost data in multitasking systems. New systems can continue to interface with legacy serial peripherals, yet benefit from the use of the high performance PCI Express bus. The cards are fully software compatible with current PCI and PCI Express 16550 type UART applications and allow users to maintain backward compatibility.
FEATURES ĄĄ PCI Express Mini Card form-factor (mPCIe) type F1, with latching I/O
connectors
ĄĄ 4 or 2-port serial communication cards with optional DB9M connectivity ĄĄ Software selectable RS-232, RS-422, and RS-485 protocols, per port
stored in EEPROM
ĄĄ High performance 16C950 class UARTs with 128-byte FIFO for each TX
and RX
ĄĄ Port-by-port field selectable termination for RS-422/485 applications ĄĄ Industrial operating temperature (-40°C to +85°C) and RoHS standard ĄĄ Supports data communication rates up to 3Mbps simultaneously, (RS-232 ĄĄ ĄĄ ĄĄ ĄĄ
up to 921.6 kbps) Custom baud rates easily configured ±15kV ESD protection on all signal pins CTS, RTS, 9-bit data mode, and RS-485 full-duplex (4 wire) fully supported RS-232 only and RS-422/485 versions available embedded-computing.com/p372691
ACCES I/O Products, Inc. www.accesio.com
contactus@accesio.com
linkedin.com/company/acces-i-o-products-inc.
1-858-550-9559 twitter.com/accesio
Hardware
USB-104-HUB – Rugged, Industrial Grade, 4-Port USB Hub This small industrial/military grade hub features extended temperature operation (-40°C to +85°C), high-retention USB connectors, and an industrial steel enclosure for shock and vibration mitigation. The OEM version (board only) is PC/104 sized and can easily be installed in new or existing PC/104-based systems as well. The USB-104-HUB now makes it easy to add additional USB-based I/O to your embedded system or to connect peripherals such as external hard drives, keyboards, GPS, wireless, and more. Real-world markets include Industrial Automation, Embedded OEM, Laboratory, Kiosk, Transportation/Automotive, and Military/Government. This versatile four-port hub can be bus powered or self powered. You may choose from three power input connectors: DC power input jack, screw terminals, or 3.5" drive power connector (Berg). Mounting provisions include DIN rail, 3.5" front panel drive bay mounting, and various panel mounting plates.
FEATURES ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ
Rugged, industrialized, four-port USB hub High-speed USB 2.0 device, USB 3.0, and 1.1 compatible Extended temperature operation (-40°C to +85°C) Data transfer rates up to 480 Mbps Supports bus-powered and self-powered modes Three power input connectors (power jack, screw terminals, or 3.5" drive Berg power connector) LED status indicators for power and overcurrent fault conditions for each downstream port USB/104 form factor for OEM embedded applications OEM version (board only) features PC/104 module size and mounting Includes micro-fit embedded USB header connectors in parallel with all standard USB connectors Industrial grade USB connectors feature high-retention design Small (4" x 4" x 1"), low profile, steel enclosure 3.5" front panel drive bay mounting provision embedded-computing.com/p369571
ACCES I/O Products, Inc. www.accesio.com
www.embedded-computing.com
contactus@accesio.com
linkedin.com/company/acces-i-o-products-inc.
1-858-550-9559 twitter.com/accesio
Embedded Computing Design Resource Guide | August 2016
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WILDSTAR UltraKVP for OpenVPX 6U & 3U Annapolis Xilinx FPGA boards are engineered for superior performance and maximum bandwidth. WILDSTAR UltraKVP FPGA boards utilize Xilinx Kintex FPGAs, which feature the most multipliers currently deployable, or UltraScale+ FPGAs, which feature 28Gb signaling capability! These FPGA cards are hot-swappable and paired with Annapolis OpenVPX compliant 6U/3U backplanes, enabling even the most bandwidth-intensive applications. All Annapolis COTS boards are rugged, open, deployable, and offer different cooling options, making them the most cutting-edge Xilinx-based products on the market. Optional, Annapolis is now building powerful Xilinx FPGA boards with optical 48x connectivity. This VITA 66/67 architecture delivers 5X the bandwidth of copper.
Annapolis is famous for the high quality of our products and for our unparalleled dedication to ensuring that the customer’s applications succeed. We offer training and exceptional special application development support, as well as more conventional support.
FEATURES ĄĄ General Features
• Up to three Xilinx® Kintex® UltraScale™ XCKU115, Virtex® UltraScale™ XCVU125/XCVU190 or Virtex® UltraScale+™ XCVU5P/XCVU9P FPGAs • – Hard 4x (3U) or 8x (6U) PCIe Gen3 endpoint for DMA • and register access • – FPGAs programmable from attached flash or • Annapolis-provided software API • – 16 or 20-nm copper CMOS process • – Available with DDR4 DRAM ports on all FPGAs • • 6U board has optional QDR-IV SRAM ports on IOPEs • Dual core ARM Cortex-A9 Processor (Zynq SoC) • – Host Software: Linux API and Device Drivers • A Full Board Support Package using Open Project Builder for fast and easy Application Development • System Management
ĄĄ OpenVPX Backplane I/O
• Two PCIe Gen3 4x (3U) or 8x (6U) Connections to VPX Backplane • 6 Backplane Protocol Agnostic connections support 10/40Gb Ethernet, IB capable, AnnapMicro protocol and user-designed protocols. Optional optical VITA 66/67 connectivity. • Radial Backplane Clock Support for OpenVPX backplane signals AUXCLK and REFCLK • – Allows reference clock and trigger from backplane to • synchronize and clock compatible ADC/DAC mezzanine • cards without front panel connections needed
ĄĄ Front Panel I/O
• Wild FMC+ (WFMC+) next generation IO site based on FMC+ specification • – Accepts standard FMC and FMC+ cards (complies to • FMC+ specification) • Up to 32 High Speed Serial and 100 LVDS connections to FPGA
ĄĄ Mechanical and Environmental
• Available in Extended Temperature Grades • Air or Conduction Cooled Path • RTM available for additional I/O embedded-computing.com/p373656
Annapolis Micro Systems, Inc. www.annapmicro.com
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wfinfo@annapmicro.com 410-841-2514
www.embedded-computing.com
MVP-6000 Series Fanless Embedded Computer ADLINK’s newly introduced MVP-6000 Series of fanless embedded computing platforms, incorporating the 6th Generation Intel® Core™ processor, provides one PCIe x16, one PCI slot, 1 mini PCIe slot and single-side access for I/O ports, optimizing easy maintenance in industrial automation environments. The series retains the robust design of all ADLINK MXC/MXE lines, at an extremely cost-effective price point. The MVP-6000 series supports DDR4 memory for more powerful computing and the Intel® HD Graphics 530 speeds graphics performance. Along with a versatile I/O array and flexible expansion capacity, the MVP-6000 Series fully satisfies all the needs of industrial automation with the performance demanded by vision inspection, motion control, and surveillance applications. Fanless construction overcomes contaminant and noise challenges presented by harsh industrial automation environments. The elimination of problematic structural elements that negatively affect Mean Time Between Failure (MTBF) greatly increases life cycle expectations for the platform.
ADLINK Technology
www.adlinktech.com
FEATURES ĄĄ 6th Gen Intel® Core™ i7/i5/i3 processors and H110 chipset ĄĄ Dual-channel DDR4 SO-DIMM sockets support up to 32 GB
memory
ĄĄ Support for two independent displays with 1 VGA, 1 DVI, 1 PCIe
x16 and 1 PCI expansion slots ĄĄ 3 Intel® GbE ports with teaming function ĄĄ 2 software-programmable RS-232/422/485 + 2 RS-232 ports ĄĄ Front-accessible I/O for simplified installation and maintenance ĄĄ Support for Windows® (standard) and Linux® (upon request) ĄĄ Extremely cost-effective, high performance, fanless system embedded-computing.com/p373681
info@adlinktech.com
800-966-5200
www.linkedin.com/company/adlink-technology
@ADLINKTech_usa Hardware
MitySOM-5CSx: Altera Cyclone V SoC-based SOM The MitySOM-5CSx combines the Altera Cyclone V SoC, memory subsystems and onboard power supplies into a highly-configurable, small form-factor System on Module (SOM). All products in the MitySOM-5CSx family are pin-for-pin compatible, allowing development teams room to grow and the flexibility to quickly and cost-effectively meet customers’ ever-changing needs. The MitySOM-5CSx family offers a wide range of processing densities, speed grades, and temperature options at competitive costs. Critical Link designed the SOM family with rigorous industrial, medical, and defense applications in mind, ensuring long-term production and professional support for our customers. Standard SOMs and development kits are available today from numerous major distributors. If a standard variant does not meet your specification, contact Critical Link to discuss developing a custom solution.
Critical Link
www.criticallink.com/mitysom-5csx www.embedded-computing.com
MitySOM-5CSx features a Hard Processor System (HPS) providing up to 4,000 MIPS at speeds of up to 925MHz per core and is combined with a NEON coprocessor with double-precision FPU. The MitySOM-5CSx combines a Cyclone V with up to 2GB of DDR3 CPU/FPGA RAM with ECC, 512MB of dedicated DDR3 FPGA RAM (optional) and up to 48MB of QSPI NOR Flash creating a highbandwidth system for embedded applications. The ARM architecture supports several high level operating systems, including Embedded Linux, Micrium uC/OS, Android, QNX, and Windows Embedded Compact. By combining six 3.125Gbps transceivers, one PCIe hard core, up to 133 user I/O, and dual Gigabit Ethernet interfaces, the system can simultaneously acquire and efficiently process large amounts of data. embedded-computing.com/p372770
info@criticallink.com
www.linkedin.com/company/critical-link-llc
315-425-4045
twitter.com/Critical_Link
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Dell Embedded Box PC 3000 Speed solutions to market with quality, reliable embedded box PCs delivered in weeks, not months. Do you need reliable embedded PCs, delivered quickly? Introducing the Dell Embedded Box PC 3000. A new rugged device built for 24x7 operation and long life, it offers broad connectivity backed by Dell’s brand and an enterprise-level suite of solutions and services. Fulfilling your needs for a reliable industrial PC that supports the growing demand for IoT solutions, it comes with Dell’s award-winning service and support. In addition, Dell’s fast PC lead times and configure-to-order flexibility will get your system commissioned more quickly than ever.
Dell OEM Solutions Dell.com/embedded
FEATURES ĄĄ Right-sized for a small footprint, the Dell Embedded Box PC 3000 is ideal
for space-constrained use cases requiring rich embedded I/O and extended operating specifications such as traffic control, retail, kiosk and vending PCs. Among its many features: • Built on the expertise of our rugged device engineers, to meet • MIL-STD-810G standards • Powered by Intel® Atom™ E3800 series processors • A flexible supply chain for orders of one, small batches or large • volumes delivered in weeks • Up to two simultaneous displays • Commercial quality standards for Dell products and suppliers to help • lower your service costs • Global service and support, with a five-year Dell ProSupport program • option embedded-computing.com/p373560
Dell_OEM_Solutions@Dell.com
1-800-456-3355
https://www.linkedin.com/company/dell-internet-of-things
@DellOEM Hardware
Dell Embedded Box PC 5000 Helping smart systems connect to the Internet of Things (IoT). Embedded computing is everywhere, and part of a rapidly expanding market. However, long lead times, low device reliability, limited scalability, limited support, and lack of security and manageability options have hindered the development of the market. Until now. Introducing the powerful Dell Embedded Box PC 5000. A new rugged device that is highly reliable, it can be used “headless” or with a keyboard, mouse and monitor. Bringing Dell’s established business heritage to this new market, the 5000 gives customers global scale, an end-to-end IT and OT security portfolio, flexible payment solutions, strong customization and award-winning levels of service and support.
Dell OEM Solutions Dell.com/embedded
44
FEATURES ĄĄ Optimized for I/O scalability, the Dell Embedded Box PC 5000 is ideal
for high-bandwidth industrial PC and IoT uses such as manufacturing, automation control, healthcare, telecom and datacom PCs. Among its many features: • Rugged fanless design for 24x7x365 usage and long life • Meets all MIL-STD-810G standards • Powered by Intel® Core™ i3, i5, i7 or Celeron® multi-core processors • with up to 16GB of RAM • Up to three simultaneous displays • Two PCI/PCIe card slots for added functions • Enterprise-grade security and manageability options backed by • global service and support to decrease your business risk
Dell_OEM_Solutions@Dell.com
embedded-computing.com/p373561
1-800-456-3355
https://www.linkedin.com/company/dell-internet-of-things
Embedded Computing Design Resource Guide | August 2016
@DellOEM
www.embedded-computing.com
X-Wall MX+ In-line 6Gbps Crypto Offload Engine Armed with digital signature generation, verifying and signing capabilities the X-Wall® MX+, among other features, is an in-progress FIPS 140-2 Level 3 certified single chip SATA Gen 3 cryptographic bridge capable of ensuring trusted and encrypted communications for all computing tiers. A standard end point computing device such as a SATA disk drive or SSD can also benefit from the additional in-line 6Gbps AES CBC/XTS 256-bit hardware disk encryption capability it provides. On top of the digital signature and in-line full disk encryption capabilities are FIPS certified Hash_DRBG, SHA256, HMAC and CMAC for either role based or identity based authentication. This means the entire authentication interfaces of the new X-Wall® MX+ are protected (encrypted). More, the X-Wall® MX+ has built-in TCG Opal 2.0 firmware to effectively transform any number of standard SATA disk drive or SSD to a TCG Opal 2.0 compliant drive, or an eDrive, wherein Microsoft BitLocker can manage and configure, through the software interface of the IEEE1667 and Opal 2.0, as either a boot drive, a data drive or a portable drive using latest USB3.0/USB3.1 technology. The MBAM (Microsoft BitLocker Administration & Monitoring) takes advantage of the X-Wall® MX+ transformed eDrive and provides enterprise-wise key management for fast deployment with low TCO (Total Cost of Ownership). Important Applications Microsoft Encrypted HDD (BitLocker managed eDrive): The X-Wall® MX+ automatically transforms any number of standard SATA drive (SSD included) into an eDrive to which Microsoft BitLocker manages and configures. Standard disk image cloning or data backup can be realized using the X-Wall® MX+ transformed eDrive to significantly reduce corporate IT overhead for mass deployment. Opal 2.0 Compliant Drive: The X-Wall® MX+ automatically transforms any number of standard SATA disk drive (and SSD) into an Opal 2.0 compliant drive.
File Folder Encryption (FFE): With add-on software components, the X-Wall® MX+ can be configured to perform file/folder encryption, encrypting Data-in-Motion such that files stored in the Cloud storage remain MX+ hardware encrypted. Only the right secret key can successfully decrypt those encrypted files, a solution that is OS dependent.
Enova Technology Corporation www.enovatech.com
www.embedded-computing.com
ĄĄ
ĄĄ
ĄĄ
ĄĄ
ĄĄ
ĄĄ
FDE (Full Disk Encryption) or SED (Self Encrypting Device): The X-Wall® MX+ can be configured to perform in-line 6Gbps full disk encryption with AES CBC/XTS 256-bit strength protecting entire Data-at-Rest. This default solution is OS independent.
Trusted Communications/Relationship: Armed with the built-in RSA 2048, HMAC, CMAC, AES ECB/XTS/CBC, SHA256, Hash_DRBG and TRNG, the X-Wall® MX+ is able to generate signature, sign and verify each identity thus ensures layer of trusted communications among all computing tiers.
FEATURES Built-in Power-On-Self-Test (POST) ability to ensure product reliability & security Built-in HMAC, CMAC, SHA256, RSA-2048 & Hash_DRBG hardware crypto modules for enhanced trusted communication Key Management through either I2C interface or built-in SATA API libraries The entire authentication process can be all encrypted, leaving no trace to clear text key data 100% hardware AES CBC/XTS/ECB off-load engine producing SATA Gen 3 in-line speed at 6Gbps Supports CBC IV scramble and XTS DUSN (Data Unit Sequence Number) key with AES ECB algorithm, which may enhance the key 2strength up to 512 bits
ĄĄ
Built-in OTP EFUSE for storing critical security parameters
ĄĄ
Compliant with Serial ATA specification rev 3.1
ĄĄ
Support NCQ (Native Command Queue)
ĄĄ
ĄĄ
Supports FIS-based Switching for port multiplier (PM) function Small footprint at TQFN 64 – RoHS & Lead Free embedded-computing.com/p373655
info@enovatech.com +886 3 577 2767 twitter.com/Enovatechnology www.linkedin.com/company/enova-technology-corporation Embedded Computing Design Resource Guide | August 2016
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InterShell Enclosures Intermas develops electronic enclosure systems:
FEATURES
Cabinets, housings, subracks, and an extensive range of accessories for the 19" rack systems and small form factors used in the fields of PCI, VME/VME64x, cPCI, IEEE, and communication applications with state-of-the-art EMI- and RFI-shielded protection. Intermas has an extensive product range of more than 10,000 separate components and more than 30 years’ experience.
Go to www.Intermas-US.com for our new catalog.
ĄĄ InterShell is a new aluminum housing enclosure composed of a top
and bottom, two front panels, and four screws
ĄĄ The simple housing design offers an uncomplicated solution for small
form factors for easy and quick assembly
ĄĄ Color options are unlimited and customer-specific print is possible ĄĄ InterShell is used for the packaging of small electronic units such as
Eurocard formats with 100x160 mm, universal formats, or as mITX formats for example
ĄĄ Excellent EMC compliancy ĄĄ InterShell is available in the following standard dimensions (h/w/d)
as well as customized formats: • 40x106.6x168.6 mm • 60x150x120 mm • 50x190x190 mm
embedded-computing.com/p372684
Intermas US LLC
www.Intermas-US.com
intermas@intermas-us.com 800-811-0236
Hardware
Slim Fan-less Embedded Box PC: Pluto E230 MiTAC’s Pluto E230 is built around the latest generation of Intel’s Apollo Lake. The whole new SOC structure packs more powerful capability for your tasks or applications. The E230’s 2.2 liter fan-less chassis design gives it the flexibility to be adapted at variety embedded applications and environments. VESA mount support allows for space-saving and rear-mounting on flat-screen displays. Flexibilities also mean a rich array of I/O ports (including 2xPS/2,4xUSB 3.0, 1xEthernet RJ45, 1xVGA, 1xHD out, 2xSerial Port, 1xDC Jack, 1xKensington lock) to add a variety of peripherals. Storage expandability is supported for high-density hard drives. Two M.2 slots provide the support of SSD and wireless interfaces which allow effortless connection to Wi-Fi and Bluetooth networks. D-Sub and HD-out extend your visual experience with support for dual displays.
MiTAC Computing Technology Corp http://client.mitac.com/
46
FEATURES ĄĄ Built-in the latest generation of Intel’s Apollo Lake SoC ĄĄ 2.2 liter fan-less chassis design to save space for various workspace ĄĄ Dual LAN(option) and wireless support ĄĄ Support dual displays / 4K resolutions ĄĄ 2.5" HDD/SDD support and rich I/O ports ĄĄ Vertical and horizontal orientation ĄĄ Support 75x75 and 100x100 VESA standard
sales_client@mic.com.tw
Embedded Computing Design Resource Guide | August 2016
embedded-computing.com/p373696
886-3-3289000 ext. 6633
www.embedded-computing.com
Opal Kelly XEM6310 Featuring the Xilinx Spartan-6 FPGA and Opal Kelly’s FrontPanel SDK with SuperSpeed USB 3.0 capability, the XEM6310 offers a turnkey professional grade connectivity solution for applications that lean on FPGA flexibility and high-speed host communication. Applications include image capture, high-speed data acquisition, image processing, digital communications, bioinformatics, and ASIC simulation and verification. As a third-generation device on the same form factor and footprint, the XEM6310 provides performance migration and lifecycle extension to customers previously using the XEM3010 and XEM6010. Migration enables expanded FPGA capability and over 900% increase in USB bandwdith. Celebrating over 10 years of USB FPGA connectivity, Opal Kelly’s FrontPanel SDK fully supports the XEM6310 for real-world transfer rates in excess of 340 MiB/s. FrontPanel includes a multi-platform (Windows, Mac, Linux) API, binary firmware for the on-board Cypress FX3 USB controller, and atomic HDL modules to integrate into your design. FrontPanel is the industry's most full-featured, high-performance, turnkey solution for professional grade USB connectivity.
Opal Kelly Incorporated www.opalkelly.com
FEATURES ĄĄ Xilinx Spartan-6 XC6SLX45 or XC6SLX150 ĄĄ Real-world measured performance over 340 MiB/s ĄĄ 128 MiB DDR2, 2x 16MiB serial flash ĄĄ Two 80-pin 0.8mm Samtec connectors ĄĄ Over 110 user I/O available ĄĄ Low-jitter 100 MHz clock oscillator ĄĄ Small form-factor: 75mm x 50mm x 15.9mm embedded-computing.com/p373668
sales@opalkelly.com
217-391-3724
opal-kelly-incorporated
@opalkelly
Hardware
Opal Kelly ZEM5305 The ZEM5305 packs an Altera Cyclone V FPGA, 512 MiB DDR3 SDRAM, and Opal Kelly’s FrontPanel SDK with SuperSpeed USB 3.0 host interface into a compact, low-power, low-cost integration solution. Designed without switching power supplies, the ZEM5305 is a production-ready module intended for turnkey low- to medium-volume production where EMI and noise may be a concern. Celebrating over 10 years of USB FPGA connectivity, Opal Kelly’s Front-Panel SDK fully supports the ZEM5305 for real-world transfer rates in excess of 340 MiB/s. FrontPanel includes a multi-platform (Windows, Mac, Linux) API, binary firmware for the on-board Cypress FX3 USB controller, and atomic HDL modules to integrate into your design. FrontPanel is the industry’s most full-featured, high-performance, turnkey solution for professional grade USB connectivity.
Opal Kelly Incorporated www.opalkelly.com
www.embedded-computing.com
FEATURES ĄĄ Altera Cyclone V FPGA (5CEFA2U19) ĄĄ Compact Type-B connector ĄĄ 512 MiB DDR3 SDRAM, 16 MiB SPI Flash ĄĄ Two Samtec BSE-040 expansion connectors ĄĄ 94 user I/O available, Access to 3 VCCO bank voltages ĄĄ 100 MHz low-jitter clock oscillator ĄĄ Smaller than a credit card at 64mm x 42mm x 6.81mm
sales@opalkelly.com
opal-kelly-incorporated
embedded-computing.com/p373669
217-391-3724
@opalkelly
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100G ATCA Now Available From Pentair Pentiar's Schroff brand is proud to introduce 100G backplane transmission rates to the AdvancedTCA product family. Offering 450 watts per slot of cooling backed by dependable chassis management solutions, Schroff ATCA leads the market in performance and quality. With superior physical construction, optimal cooling, reliable power supplies, efficient data distribution and secure system management, Pentair’s Schroff ATCA solutions are your choice for a dependable Solution.
FEATURES
Deploying these chassis ensure your integrated solutions will continue to perform at the highest level as network requirements grow and higher performing ATCA boards become available.
• AC & DC power entry modules
Partner with Schroff and bring success to your 100G ATCA project!
• 2, 6 and 14 slot backplanes • 40 & 100 Gbps (10GBASE-KR) transmission rate • Up to 450 watts/slot cooling • Various cooling configurations available • Designed to meet NEBS, PICMG 3.0 • Proven performance, test reports available embedded-computing.com/p373654
Pentair/Schroff
http://schroff.pentair.us
AskSchroff@pentair.com
800-525-4682
@Schroff_NA Hardware
Express Programs Express Programs: When product is needed fast Need systems, subracks, cases or front panels quickly for prototyping or small projects? Express service provides rapid delivery turn-arounds for solutions engineered to meet your design requirements – in a matter of days. Systems Express • ATCA, MicroTCA, CompactPCI, and CompactPCI Serial models available • Shipped in as few as 15 days Subrack & Cases Express
FEATURES • Conform to PICMG specifications
• EuropacPRO subrack kits, parts and accessories • RatiopacPRO case kits, parts and accessories • Delivered in as few as 15 days
• ATCA, uTCA, CompactPCI standards • Standard and customized solutions available
Front Panel Express • 5 to 50 front panels • Custom cut-outs, handles and silk screen • Delivered in as few as 5 days
• Local and global design and product support • Drawings and models available • Part and quantity restrictions may apply embedded-computing.com/p372874
Pentair/Schroff
http://schroff.pentair.us
48
AskSchroff@pentair.com
Embedded Computing Design Resource Guide | August 2016
800-525-4682
@Schroff_NA
www.embedded-computing.com
Serious HMI and IoT/IT/Industrial Networking Communications Transform your OEM system to professionally connect operators with the cloud. Incorporate sleek, modern iconography with responsive touch interaction so operators can control their equipment and react to events as they unfold. It’s the starting point for a new generation of embedded HMIs. • Use the Serious Human Interface™ Platform (SHIP) of hardware modules, software tools, and firmware components to add smartphone-like, touch-enabled, full color graphics through a simple UART or SPI port. • Select advanced communications support for a variety of communications protocols using WiFi, Bluetooth Smart with NFC™-A tag support, Ethernet and/or RS-232/422/485, and CAN. • Choose the right combination of HMI and communications modules to create the cost-optimized mix of features for your unique application. • Enable secure, in situ, embedded firmware updates on premise or over the cloud.
www.seriousintegrated.com
ĄĄ Hardware Modules • Available in a wide variety of sizes, features and cost options • Communications modules add WiFi, Bluetooth, Ethernet and RS-232/422/485, and CAN • Built with proven Renesas RX, RZ and new Synergy family MPU/MCUs • Prototype ready and production worthy • Extended Lifetime – for industrial, medical and commercial products • Industrial grade reliability and extended temperature availability ĄĄ GUI Tools & Communications Software • Serious Human Interface™ Platform (SHIP) for GUI development without using C-compiler • Rapid GUI creation in the SHIP IDE (SHIPTide) • Zero embedded GUI programming using the runtime GUI engine firmware (SHIPEngine) • Full C-based BSP and protocol stack development support for Serious Communications Modules
Purchase the right DevKit now to meet your requirements from either Arrow Electronics or Digi-Key.
Serious Integrated, Inc.
FEATURES
embedded-computing.com/p373711
info@seriousintegrated.com
480-646-8300
Hardware
SMT Electronic Measurement Solutions LCR-Reader akin to Smart Tweezers LCR-meter is a lightweight, digital LCR- and ESR-meter with automatic component identification and 0.5% basic accuracy. Each device comes with an NIST Traceable Calibration Certificate. Various gold-plated probes allow to handle components to a 0201 size, either mounted on a PCB or loose. LCR-Reader determines the type of component and best test parameters. The impedance values, component type and test frequency used are instantly displayed on the OLED display. Smart Tweezers LCR-meter has a higher basic accuracy of 0.2% and additional features: continuity/diode test, component sorting, adjustable test frequency and signal level. The latest model offers BlueTooth connectivity with PCs, Android and iOS devices. LCR-Reader Probe Connector is a kit converting LCR-Reader and other Smart Tweezers like LCR-meters into probe stations. The shielded two-wire connector allows LCR-Reader to test a complete PCB and measure larger components with virtually no extra parasitics. The kit includes 5 replaceable probes: long and medium pin-probe, alligator clips, spade connector, and 4 mm multimeter plugs. Other tweezer-like tools offered: LED Test Tweezers for LED testing using 3 fixed current ratings and Multifunction SMD Test Tweezers that allows to convert any Digital Multimeter with 4 mm jacks into a tweezer-meter.
Siborg Systems Inc www.lcr-reader.com
www.embedded-computing.com
Tweezer-Meter Products: ĄĄ LCR-Reader, Best selling Professional LCR/ESR meter with 0.5%
basic accuracy and NIST traceable Certificate, 1 Oz weight ĄĄ Smart Tweezers ST-5S LCR-meter with 0.2% basic accuracy, continuity/diode test, optional Bluetooth connectivity for measurement data logging ĄĄ Smart LED Test Tweezers for LED testing and connection to any conventional multimeter for tweezer-like measuring capability ĄĄ SMD Test Tweezers converting any multimeter into a tweezermeter good for up to 0402 components ĄĄ LCR-Reader Probe Connector compatible with Smart Tweezers and transforming the tweezer-meter into a low frequency (0.1, 1 and 10 KHz) Probe Station embedded-computing.com/p349328
info@siborg.ca 519-888-9906 @smarttweezersus www.linkedin.com/company/lcr-reader?trk=hb_tab_compy_id_10797282 Embedded Computing Design Resource Guide | August 2016
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SS-FMC-01 GPS Timing and Frequency Module The SS-FMC-01 is an FPGA Mezzanine Card (FMC) module that provides GPS and IRIG timing and synchronization signals to the system. The board has an onboard 100MHz OCXO oscillator, which is kept synchronized to any of selected references such as IRIG or time signal provided by on-board GPS receiver. The board can operate as timing master or slave. Several timing functions are derived from the on-board clock including a programmable periodic pulse rate output a programmable start/stop output, and a time-stamping input. The SS-FMC-01 provides 100MHz, 1PPS, 5 Programmable digital inputs or outputs, IRIG B AM and DCLS input and output synchronization signals along with stats and control signals to FMC Low Pin Count (LPC).
FEATURES ĄĄ FMC form factor ĄĄ Selectable GPS or external reference ĄĄ On Board 100MHz oscillator ĄĄ 5 programmable digital I/O's ĄĄ FPGA mezzanine card VITA 57 ĄĄ IRIG and 1PPS output options embedded-computing.com/p373623
Stratum Systems
www.stratum-systems.com
info@stratum-systems.com
954-769-1990
Hardware
BayCat (VL-EPM-31) PC/104-Plus “Bay Trail” Embedded Computer BayCat is a rugged PC/104-Plus™ single board computer (SBC) with on-board Trusted Platform Module (TPM) for enhanced security. BayCat combines high performance, low power consumption, and backwards compatibility with systems using PC/104-Plus ISA or PCI expansion. Built for extreme environments, the BayCat is designed and tested for industrial temperature (-40º to +85ºC) operation and meets MIL-STD202G specifications to withstand high impact and vibration.
FEATURES
BayCat is available in single-, dual-, and quad-core processor options to meet a variety of price/performance/application requirements.
ĄĄ -40°C to +85°C operation
The BayCat’s on-board TPM security chip can lock out unauthorized hardware and software access providing a secure processing environment for applications in applications that require hardware-level security functions.
ĄĄ High shock and vibe
The BayCat is backed by VersaLogic’s 5-year warranty and product life extension programs that can continue delivery well past the year 2025.
ĄĄ TPM hardware security ĄĄ Latching connectors ĄĄ 4th Generation Bay Trail processor ĄĄ Quad-, dual-, and single-core models ĄĄ PC/104-Plus expansion site (ISA + PCI) embedded-computing.com/p373589
VersaLogic Corporation
www.VersaLogic.com/BayCat-ECD-16
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sales@VersaLogic.com linkedin.com/company/versalogic-corporation
Embedded Computing Design Resource Guide | August 2016
503-747-2261
@versalogic
www.embedded-computing.com
Osprey (VL-EPU-3311) This next generation of the VersaLogic Embedded Processing Unit (EPU) format combines processor, memory, video, and system I/O into an extremely compact full function embedded computer. The computer has a footprint just slightly larger than a credit card! The Osprey was engineered to meet the military, avionic, and medical industries’ evolving requirements for smaller, lighter, and more powerful embedded systems. Roughly the size of a credit card and less than 1.08 inches thick, the Osprey is a highly-integrated embedded computer. It combines the new 4th generation Intel® Atom™ “Bay Trail” processor, with newer system interfaces, in a form factor designed to withstand extreme temperature, impact, and vibration. Osprey is available in single-, dual-, and quad-core models. The singlecore is suitable for lower power systems, while the quad-core is ideal for UAV video and control applications where higher performance and light lower weight are important. The Osprey is backed by VersaLogic’s 5-year warranty and product life extension programs that can continue delivery well past the year 2025.
VersaLogic Corporation
www.VersaLogic.com/Osprey-ECD-16
FEATURES ĄĄ Size: 55 x 95 x 27 mm; Weight: 140 grams (< 5 oz.) ĄĄ Quad-, dual-, and single-core models ĄĄ 4th Generation “Bay Trail” processor ĄĄ -40°C to +85°C operation ĄĄ Wide input voltage (8V – 17V) ĄĄ Soldered-on RAM; Soldered-on Flash ĄĄ Mini PCIe/mSATA expansion socket embedded-computing.com/p373590
sales@VersaLogic.com linkedin.com/company/versalogic-corporation
503-747-2261
@versalogic
Industrial
COM Express Vision PC – Your choices. Our expertise. Active Silicon specifies, designs and manufactures customized embedded systems that will remain fit, form and function identical for many years. We can integrate any type of video acquisition along with all the standard interfaces such as USB3, HDMI, GigE, eSATA etc. plus expansion options using PCI/104 Express. The COM Express architecture is ideally suited for rugged applications and is designed with reliability and long product life in mind. The mezzanine standard allows a wide variety of third party processor modules to be fitted to a custom carrier card and the processor module can be replaced, while keeping key functionality identical. Supported operating systems include Windows Embedded, Linux, and QNX. Our COM Express products are often used in markets with regulatory control and a need for high reliability as is the case for complex medical machines, or in machine vision in pharmaceutical packaging, quality control and food processing. They are successfully applied in extremely rugged military applications including UAV, as well as in speed cameras and vehicle identification.
Active Silicon, Ltd.
www.activesilicon.com www.embedded-computing.com
FEATURES ĄĄ COM Express Mezzanine standard ĄĄ Custom carrier card to suit the application ĄĄ Camera Link, CoaXPress and 3G-SDI ĄĄ USB3, HDMI, GigE, eSATA ĄĄ PCI/104 Express expansion capability ĄĄ Stable product supply ĄĄ Rugged and highly reliable ĄĄ Ideal for long life products
info@activesilicon.com
www.linkedin.com/company/active-silicon
embedded-computing.com/p372656
+44 (0) 1753 650 600
@ActiveSilicon
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OptiSys-5101 Quad Camera Link Image Processing System
FEATURES Four speed configurable Camera Link ports
Systems designed for today’s image capture applications require three top level capabilities including high speed capture, high speed processing and high capacity storage. Elma’s OptiSys-5101 provides all three.
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4th Gen Intel® Quad Core™ i7 4700EQ, 2.3GHz CPU
The OptiSys-5101 is a high performance embedded vision system featuring an Intel Quad Corei7 processor and high definition image frame grabber ideal for a wide array of applications across multiple industries. The small light weight system features, multiple Camera Link ports plus a multi-terabyte front removable storage cartridge to maximize storing capacity and simplify data transfer to supporting systems. Packaged in a sturdy and attractive chassis, the OptiSys-5101 is US-designed and manufactured with full test and integration to ensure standout performance for your target application. Inquire about additional CPU options and a range of storage capacities.
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miniPCIe expansion site
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Ready to run image analysis software package options
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Multi-terabyte front removable storage bay with a SATA III interface
Additional I/O including 1 x HDMI port, 2 x USB 2.0 ports, 2 x Gig E ports
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Modular construction allows for custom configurations
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Various mounting options
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Operating Temp: -20°C to 55°C with forced air cooling
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Dimensions: 127 mm H (incl. feet) x 160 mm W x 210 mm D (5.0" H x 6.3" W x 8.3" D) 14 - 36 VDC input voltage
embedded-computing.com/p373594
Elma Electronic Inc.
sales@elma.com 510-656-3400 @elma_electronic https://www.linkedin.com/company/elma-electronic
http://www.elma.com/en/products/systems-solutions/application-ready-platforms/product-pages/industrial-computing/optisys-detail/
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www.embedded-computing.com
Industrial Temperature iPAC-9x25 Designed and manufactured in the USA, the iPac-9X25 is a Web-enabled single board computer with the ability to run an embedded web server to host the monitored or logged data. The web connection is available via two 10/100 Ethernet ports or optional 802.11 wireless Wi-Fi or Bluetooth networking when using the proper Linux modules and adapters. This single board computer has all connectors brought out as headers on the board and has the same footprint of a standard PC/104 module at 3.77" x 3.54". The iPAC-9x25 is perfectly suited for Industrial Temperature Embedded Data Acquisition and Control applications.
FEATURES ĄĄ ATMEL AT91SAM9x25 400 MHz Processor ĄĄ 128MB DDR2 RAM, 4GB eMMC, 16MB Serial Data Flash, Micro SD ĄĄ 20x GPIO Lines, 16x SPIO Expander Based Digital I/O, and 8x High
Drive Digital Outputs
ĄĄ 2x USB 2.0 (High-Speed) Host Ports, 1x USB 2.0 (Full-Speed) Host Port
1x USB 2.0 (High-Speed) Device Port, 1x CAN Bus
ĄĄ 3x RS232, 1x RS232/422/485, 2x 10/100 BaseT Ethernet ĄĄ 7x A/D Channels with 10-bit Converter, Up to 4x 16-bit PWMs ĄĄ -40° - 85° C Operating Temperature
Qty 1 price is $198. OEM & Qty pricing available on request.
embedded-computing.com/p372029
info@emacinc.com
EMAC, Inc.
618-529-4525
https://www.linkedin.com/company/emac-inc-
www.emacinc.com/products/pc_compatible_sbcs/IPAC-9X25
Industrial
SIB-A5D35 Low Power ARM Embedded Server The EMAC Low-Power Server-In-a-Box (SIB) is a low cost, small footprint ARM embedded server. This low power SIB utilizes the Atmel ARM Cortex A5 ATSAMA5D35 536Mhz fanless processor, allowing it to run EMAC OE Linux. The server can support APM sleep mode which allows for ultra-low power consumption and has the ability to support real time applications utilizing Xenomai. The SIB-A5D35 has no moving parts and features a rugged enclosure design, making it the ideal choice for most industrial applications. The minimal power requirements of the SIB-A5D35 also mean low heat generation and lends itself to battery operated or backed-up systems. Right out of the box, the SIB-A5D35 is configured for Ethernet, serial IP, serial terminal and raw serial connections. Other devices including modem links, Wi-Fi, and Bluetooth may be added and configured by the user. Qty 1 price is $375. OEM & Qty pricing available on request.
EMAC, Inc.
FEATURES ĄĄ ATMEL ARM Cortex A5 Atmel ATSAMA5D35 CPU at 536 MHz ĄĄ 512MB of LP DDR2 RAM, Up to 16GB eMMC Flash, 16MB Serial
Data Flash, SD Card Expansion
ĄĄ 18x GPIO (3.3V) Lines, 1x SDIO, 2x I2C, 2x SPI Ports ĄĄ 4x RS232 & 1x RS485/422, 2x USB 2.0 Host, 1x USB 2.0
Host/Device, 1x CAN 2.0b Ports
ĄĄ 10/100 BaseT Ethernet onboard, Optional: Wi-Fi & Bluetooth BLE ĄĄ 0-70° C Operating Temperature (-40° - 85° Optional) ĄĄ APM Sleep Mode
info@emacinc.com
http://www.emacinc.com/products/embedded_servers/SIB-A5D35 www.embedded-computing.com
embedded-computing.com/p373553
618-529-4525
https://www.linkedin.com/company/emac-inc-
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TANK-860-QGW QTS Gateway is an operating system designed specifically for IEI IPCs and fully inheriting the QNAP NAS operating system (QTS), breaking through the stereotype of IPCs not having operating systems and saving unnecessary costs for installing servers and computers. “TANK-860-QGW is the best way to get into cloud applications, especially in the aspect of operating system. With QNAP’s years of software experience and the built-in Virtualization Station, users can seamlessly migrate their current operating platform to the virtual machine (VM) in QTS Gateway, and directly connect to the cloud through various apps in QTS Gateway. Therefore, the three main goals of industrial IoT (IIOT) – remote monitoring, preventive maintenance and asset management can easily be achieved,“ said Don Yu, Director of IEI. QTS Gateway not only allows easy monitoring of computer activity through its visualized interface, it also allows the use of many free application programs, making it multifunctional while challenging the values of traditional IPCs. The TANK-860-QGW is installed with an iRIS-2400 module so that it can utilize the IoT concept to perform remote control, including power management/control, remote KVM monitoring or sending alarm and warning information through e-mail or SMS.
IEI Technology USA Corp
http://new.ieiworld.com/en/support/con_show.php?cid=6
FEATURES ĄĄ Intel® HM86 Chipset + 4th gen Intel® Core™ CPU ĄĄ Ruggedized and Wide Temp support: -20°C ~ 60°C ĄĄ Great Flexibility of expansion slots:
ĄĄ ĄĄ ĄĄ ĄĄ ĄĄ
• 2-slot: 2 x PCIe by 16, 1x PCIe Mini slot • 4-slot: 2 x PCIe by 16, 2 x PCI, 2 x PCIe Mini slot • 6-slot: 1 x PCIe by 16, 2 x PCIe by 4, 3 x PCI, 2 x PCIe Mini slot IPMI function for remote control management Three independent video outputs (DP, VGA, DVI-I) support high resolution Remote visualization system and remote device manager Integrated cloud management Multiple OS Support: Windows/Linux/UNIX embedded-computing.com/p373483
marketing@usa.ieiworld.com
1-909-595-2819
www.linkedin.com/company/iei-technology-corp @ieiworld
Industrial
COMe-bBD6
Powerful COM Express module pushes massive Ethernet throughput into the Embedded Market The COMe-bBD6 is the most powerful COM Express on the market today. Kontron was the first vendor to maximize the Intel Xeon capabilities of a pure server headless design with high performance supported by 12-16 core processor. It is based on the COM Express Specification Type6 but additional Interfaces, not yet hosted by an official standard. Kontron is making its mark in various industries that need to create server applications, especially in IoT environments.
FEATURES ĄĄ COMPUTER-ON-MODULE WITH INTEL® XEON® PROCESSOR D-1500 ĄĄ Up to 32GB DDR4 ECC 2x SODIMMs ĄĄ Dual 10GbE Interfaces (option) ĄĄ x16 PCIE 3.0 ĄĄ x8 PCIE2.0 ĄĄ USB 4x USB 3.0/2.0 ĄĄ TPM 2.0, INFINEON SLB9665XQ2.0 embedded-computing.com/p373675
Kontron AG
sales@kontron.com
www.kontron.com/products/boards-and-standard-form-factors/com-express/
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Embedded Computing Design Resource Guide | August 2016
+49 821 4086-0 twitter.com/#!/Kontron www.linkedin.com/company/164627
www.embedded-computing.com
cPCI, PXI, VME, Custom Packaging Solutions VME and VME64x, CompactPCI, or PXI chassis are available in many configurations from 1U to 12U, 2 to 21 slots, with many power options up to 1,200 watts. Dual hot-swap is available in AC or DC versions. We have in-house design, manufacturing capabilities, and in-process controls. All Vector chassis and backplanes are manufactured in the USA and are available with custom modifications and the shortest lead times in the industry. Series 2370 chassis offer the lowest profile per slot. Cards are inserted horizontally from the front, and 80mm rear I/O backplane slot configuration is also available. Chassis are available from 1U, 2 slots up to 7U, 12 slots for VME, CompactPCI, or PXI. All chassis are IEEE 1101.10/11 compliant with hot-swap, plug-in AC or DC power options. Our Series 400 enclosures feature side-filtered air intake and rear exhaust for up to 21 vertical cards. Options include hot-swap, plug-in AC or DC power, and system voltage/temperature monitor. Embedded power supplies are available up to 1,200 watts. Series 790 is MIL-STD-461D/E compliant and certified, economical, and lighter weight than most enclosures available today. It is available in 3U, 4U, and 5U models up to 7 horizontal slots. All Vector chassis are available for custom modification in the shortest time frame. Many factory paint colors are available and can be specified with Federal Standard or RAL numbers.
FEATURES ĄĄ
Made in the USA
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Most rack accessories ship from stock
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Modified ’standards’ and customization are our specialty
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Card sizes from 3U x 160mm to 9U x 400mm
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System monitoring option (CMM)
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AC or DC power input
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Power options up to 1,200 watts
For more detailed product information, please visit www.vectorelect.com or call 1-800-423-5659 and discuss your application with a Vector representative.
embedded-computing.com/p371649
Vector Electronics & Technology, Inc. www.vectorelect.com
www.embedded-computing.com
inquire@vectorelect.com 800-423-5659
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®
Solid State Storage and Memory
Industrial-Embedded Solid State Storage and Memory Virtium manufactures solid state storage and memory for the world’s top industrial embedded OEM customers. We design, build and support our products in the USA, and provide a dedicated software team for custom storage solutions – all fortified by a network of global locations. Our mission is to develop the most reliable storage and memory solutions with the greatest performance, consistency and longest product availability. Industry Solutions include: Communications, Networking, Energy, Transportation, Industrial Automation, Medical and Video/Signage. SSD Advantages include: SATA, PCIe, USB and legacy CF and PATA solutions in all popular formats and capacities.
FEATURES ĄĄ ĄĄ
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SSD classes include: • Good (MLC) at *1X endurance – 3-year warranty • Better (iMLC) at *7X endurance – 5-year warranty • Best (SLC) at *30X endurance – 5-year warranty
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* Endurance Baseline = one entire drive write per day (DWPD) for the entire warranty period.
Virtium‘s new vtView SSD Software is tailored for the industrial-embedded market and enables designers to analyze, quality and monitor SSDs to improve reliability and longevity. Memory Advantages include: lowest profile in the market, monolithic components, first-to-market highest capacity Mini-DIMMs, 100% industrial-temperature-tested at -45 degrees to 85 degrees Centigrade; built with server-grade components, conformal coating and under-filled heat sinks.
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In business nearly two decades. 100% focus and dedication for the industrial embedded market. Fully integrated hardware, firmware and software supported by industry’s strongest application engineering team. Made in the USA following strict ISO processes. Long and successful track record of servicing Tier-1 Industrial OEMs. Leading innovator in small-form-factor, high-capacity, high-density, high-reliability designs. Broad product portfolio from latest technology to legacy designs. High service level unmatched by competition. Strategic supply continuity through partnerships with leading technology suppliers. Long-term direct relationships with leading suppliers ensure on-time priority allocations and longer availability. Worldwide Sales and FAE support and industry distribution.
embedded-computing.com/p373487
Virtium
www.virtium.com
56
sales@virtium.com www.linkedin.com/company/virtium
Embedded Computing Design Resource Guide | August 2016
949-888-2444 @virtium
www.embedded-computing.com
www.atpinc.com ATP DRAM and NAND Flash Products ATP Industrial Grade DRAM Products ATP DRAM Modules are designed for high-performance, mission-critical applications such as Industrial PC and Networking/Telecom, where high levels of technical support, operating consistency, and wide operating temperature ranges are required. Built with high quality IC components and 100% tested, the ATP DRAM module family includes a full spectrum of form factors including VLP, ULP, UDIMM, RDIMM, SODIMM, and MINI-DIMM, as well as multiple generations of DRAM technologies. ATP has a long history of providing long-term support and addressing specific requirements of OEM customers.
FEATURES
The new ATP Manufacturing, Testing and Validation facility offers enhanced manufacturing quality and TDBI/ATE testing capabilities on all DRAM product lines.
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ATP Industrial Grade NAND Flash Products Flash Product Line Summary: Memory Cards (microSD/SD), Embedded Modules (SATA, USB, eUSB), and HDD Replacement SSD (2.5" SATAII/III). ATP Industrial Grade NAND Flash Products are designed for high-performance, mission-critical applications such as Automotive, Healthcare, Networking/Telecom, Military, etc, where high levels of durability, operating consistency, and wide operating temperature ranges are required. All ATP Industrial Grade NAND Flash products implement ECC and wear-leveling algorithms to maximize NAND Flash component utilization and long-term data integrity. The product line is also built using SLC (Single Level Cell)-type NAND Flash components, which are specified to at least 20 times greater the rating for program/ erase cycles (lifetime) compared to commercial and consumer level MLC-type NAND Flash. ATP is a true manufacturer with over twenty years of experience in the production of NAND Flash memory solutions and DRAM memory modules. ATP offers in-house design, testing and product tuning, as well as extensive supply chain support with controlled/fixed BOMs and long product life cycles.
ATP Industrial-Grade DRAM Products ĄĄ
JEDEC compliant Extensive support on DDR4,DDR3, DDR2, DDR1, and PC133 SDRAM generation memory modules
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Industrial Grade temperature range (-40°C to 85°C)
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Conformal coating for environmentally rugged applications
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Long-term supply chain commitment upon module qualification ATP patented TDBI System – the next generation test during burn-in Extra 30µ" thickness golden finger
ATP Industrial-Grade Flash Products ĄĄ ĄĄ ĄĄ
SLC NAND Flash Components ATP patented PowerProtector Technology – Data integrity during a sudden power down SMART/SD Life Monitor Technology – Flash health status feedback to host
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Integrated Secure Erase Technology
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Industrial Grade temperature range (-40°C to 85°C)
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Supply chain road maps by BOM upon product qualification
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Onboard AES Encryption (SSD Products)
New SATA III Products • 2.5" SSD SII Pro • CFast • 2.5" SSD MV • mSATA • M.2 2260/2242 • SlimSATA embedded-computing.com/p373482
ATP Electronics www.atpinc.com
www.embedded-computing.com
sales@atpinc.com 408-732-5000
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Advantech IoT Gateway – ARK-1123H-3S53 This powerful and complete IoT gateway starter kit empowers your IoT project with a reliable platform and open gateway technologies. The package includes a ready-to-run fanless automation system (Intel® Celeron® J1900 platform and Windows® 7 Embedded), IoT platform software, development kit, and technical support service. Also included is Microsoft® Azure® service integration. With the Advantech IoT Gateway Starter Kit, you can build your own IoT applications quickly and efficiently. For Industrial Equipment Manufacturing • Connect your things to enable data acquisition, device management, and analytic intelligence that create new business value. For System Integrators • Enable your projects to integrate all devices and systems quickly and efficiently to work together in a reliable platform. For IoT Developers • Empower your applications to create innovations and practices that discover more business opportunities.
FEATURES ĄĄ ĄĄ
Pre-Integrated Software Capability WISE-PaaS/RMM Device Management • Remote monitor and control (Power, KVM) • Devices/Groups/Map view device management • Device event history Data Flow Logic Designer • IBM® Node-RED flow design tool • Drag and drop plug-in nodes • Integrated WISE-PaaS/RMM function nodes Data Storage • Relational DB (PostgreSQL) for device and account management • NoSQL DB (Mongo DB) for big sensor data • Redundant server to provide data and service Dashboard Builder • Supports Google Maps, gauge, spark line, and c • Multiple format data source supported • Supports Websocket data stream and JSON content
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Data Acquisition & Transition WISE-Agent Included in WISE-PaaS/RMM, WISE-Agent software framework enables seamless connectivity from across pervasive sensor devices, data flow, and IoT cloud, such as Microsoft Azure. WISE-Agent SDK includes data handler, protocol connector, and device monitoring for communication security. Data Handler • WISE-Agent’s dynamic data collection module • Plug the needed handler into different usage scenarios • Provides handler sample code for RS-232/485, Modbus-TCP/RTU, GPS Protocol Connector • IoT standard M2M protocol, such as MQTT • Small code footprint • Publish-Subscribe structure to provide one-to-many message sharing Device Monitoring • Hardware monitoring: CPU temperature, fan speed, voltage • Software monitoring: CPU/memory usage and process status • Distributed threshold-based detection and alerts
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Built-in Intel® Celeron® J1900 Quad Core 2.0GHz SoC Supports up to 8GB DDR3L memory and 2.5" SATA and mSATA slot Anti-Vibration Certification: IEC 60068-2-64, Shock Protection Certification: IEC 60068-2-27. Dimensions: palm-sized 5.27" x 1.7" x 3.71" (133.8 x 43.1 x 94.2 mm) Wireless expansion capability via Mini PCIe x 1 and has Gigabit Ethernet x 2 Supports a wide operating temperature from -20 to 70 °C Pre-integrated remote monitoring and device management software for control and security. Supports up to 1,000 device connections. Supports RESTful API web service & WISE Agent framework for cross-platform connectivity and integration, which utilizes standard IoT Protocol, MQTT. Technical Support: 3 hours of online consulting and IoT Developer Forum for FAQ and software design tools. Online forum: When you join the IoT Developer forum, you will receive the latest versions of software resources and video training courses.
For additional IoT gateways and solutions visit us at Buy.advantech.om/go/IoTGateway
Simplify your IoT deployment with the Advantech Gateway Starter Kit.
Advantech
http://buy.advantech.com
58
Buy@Advantech.com
https://www.linkedin.com/company/162304
Embedded Computing Design Resource Guide | August 2016
embedded-computing.com/p373587
888-576-9668 Advantech_USA
www.embedded-computing.com
ThreadX-Real Time Operating System For Embedded Development
FEATURES
ThreadX is Express Logic’s advanced Real-Time Operating System (RTOS) designed specifically for deeply embedded, realtime, and IoT applications. ThreadX provides advanced scheduling, communication, synchronization, timer, memory management, and interrupt management facilities. In addition, ThreadX has many advanced features, including its picokernel™ architecture, preemption-threshold™ scheduling, event-chaining™, execution profiling, performance metrics, and system event tracing. ThreadX comes pre-certified for use in products that must meet safety-critical standards – standards such as IEC 61508, IEC 62304, UL 60730-1 Annex H, CSA E60730-1 Annex H, IEC 60730-1 Annex H, UL 60335-1 Annex R, IEC 60335-1 Annex R, and UL 1998. Combined with its superior ease-of-use, ThreadX is the ideal choice for the most demanding of embedded applications. As of 2016, ThreadX has over 5.4 Billion deployments worldwide in a wide variety of products, including consumer devices, medical electronics, and industrial control equipment, according to the leading M2M market intelligence firm VDC Research. The popularity of ThreadX is a testament to its reliability, quality, size/performance, advanced features, ease-of-use, and overall time-to-market advantages. Combined with its superior ease-of-use, ThreadX is the ideal choice for the most demanding of embedded applications.
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Small Footprint – ThreadX only needs a remarkably small 2KB instruction area and 1KB of RAM for its minimal footprint Fast, Deterministic Execution – ThreadX achieves a sub-microsecond context switch on most popular processors and is significantly faster overall than other commercial RTOSes Pre-Certified For Safety Critical Applications – TUV and UL to Many Safety Standards Simple, Easy to Use – The ThreadX API is both intuitive and highly functional Advanced Technology – Preemption-threshold scheduling, Complete/Comprehensive Multitasking Facilities and more
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Multicore Support – AMP & SMP
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Memory Protection via ThreadX Modules
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Comes With Full Source Code
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MISRA-C:2004 and MISRA C:2013 Compliant
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Supports Most Popular Architectures
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Supports Most Popular Software Development Tools
embedded-computing.com/p373671
ExpressLogic
www.rtos.com www.embedded-computing.com
info@expresslogic.com
(858) 613.6640
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MultiConnect® Conduit™ MultiConnect® Conduit™ is the industry’s most configurable, manageable, and scalable cellular communications gateway for industrial IoT applications. Network engineers can remotely configure and optimize their Conduit performance through DeviceHQ®, the world’s first IoT Application Store and Device Management platform. The Conduit features two accessory card slots that enable users to plug in MultiConnect® mCard™ accessory cards supporting their preferred wired or wireless interface to connect a wide range of assets locally to the gateway.
FEATURES
Available options include a LoRaWAN™ mCard capable of supporting thousands of MultiConnect® mDot™ long range RF modules connected to remote sensors or appliances.
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Both IBM’s Node-RED, a graphical, drag-and-drop interface and mLinux™ Open Embedded/Yocto opens the complex world of IoT application development to a wider user group to monitor and control their assets.
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Connect most any asset to your preferred data management platform Backhaul options include 4G-LTE, 3G, 2G cellular or Ethernet for cost effective global deployment Quick-to-deploy, manage and scale differentiated services using the DeviceHQ IoT Application Store Incredible asset management range – up to 10 miles line of sight, 1 to 3 miles into buildings
Quick-to-deploy and easy to customize and manage, the Conduit communications gateway realizes your IoT application.
MultiTech designs, develops and manufactures communications equipment for the industrial internet of things – connecting physical assets to business processes to deliver enhanced value. Our commitment to quality and service excellence means you can count on MultiTech products and people to address your needs, while our history of innovation ensures you can stay ahead of the latest technology with a partner who will be there for the life of your solution.
embedded-computing.com/p373698
MultiTech
www.multitech.com
60
sales@multitech.com www.multitech.com/linkedin.go
Embedded Computing Design Resource Guide | August 2016
800-328-9717 @MultiTechSys
www.embedded-computing.com
conga-TS170 Introducing two new Server-on-Modules which have been especially designed for real-time media processing. The new conga-TS170 Server-on-Modules are based on the latest Intel® Xeon® E3-1578L and E3-1558 processors. A distinguishing feature of the new modules is the integrated Intel® Iris™ Pro Graphics accelerated by 128 MB fast eDRAM and double graphics base frequency for outstanding transcoding and video processing performance. Additionally, with the Media Studio Server package they offer comprehensive software support. congatec’s new Server-on-Modules come with an extensive ecosystem including complete Board Support Packages, comprehensive driver support, application-ready carrierboards and evaluation kits, simplifying individual embedded server configurations. Edge and fog computers for industrial IoT applications are a major application area for the new Server-on-Modules. Their task is pre-processing and transcoding big data as well as managing and controlling local processes. In close proximity to the field-level such servers are highly responsive and real-time capable allowing both the horizontal and the vertical networking of any industrial IoT-connected smart sensors, actuators and complex equipment and machines. High-level media processing performance brings benefits to numerous application fields. Examples are autonomous driving, drone control, vision-based robotics as well as selflearning machines with complex Deep Learning algorithms and neuronal network structures, which also profit from the high-level media and GPGPU processing capacities of the new Xeon processors.
congatec
www.congatec.us
FEATURES ĄĄ conga-TS170 up to Intel® Xeon® E3-1578L v5 ĄĄ integrated Intel® Iris™ Pro Graphics ĄĄ up to 32 GByte dual channel DDR4 memory ĄĄ high transcoding performance ĄĄ congatec Board Controller for enhanced functions ĄĄ real-time media processing ĄĄ media server applications and big data analytics embedded-computing.com/p373695
sales-us@congatec.com
www.linkedin.com/company/congatec-ag
858-457-2600 twitter.com/congatecAG
IoT
Interscale C Interscale C cases have integrated heat sinks and are compatible with Schroff’s Flexible Heat Conductors (FHC) for industry leading conduction cooling performance. Custom case sizes with variable heat sink fin heights are available, as well as options for cut-outs in customer specific locations, special colors and silk-screen.
Total conduction cooling solution • Compatible with the Flexible Heat Conductor (FHC) for greater thermal dissipation than traditional conduction cooling • The integrated springs within the FHC allow the aluminum block to expand and contract vertically thereby eliminating the need for a thermal gap pad • Interscale C, with the FHC, provide consistent performance over the lifetime of the system • Complies with the requirements for “top side cooling” per the SDT.03 embeddedNUC standard • Whitepaper, including thermal test procedures and results, available on http://schroff.pentair.com/en/schroff-na The Pentair team is ready to help you with your layout design, through final assembly; to support you on your next project!
Pentair/Schroff
http://schroff.pentair.us www.embedded-computing.com
Simple to assemble, performance centric design
• Ideal for use in industrial applications • 5 mm heat sink is integrated into the case cover • Pre-installed M2.5 studs for board mounting • Modular case consisting of three easy to assemble parts requires only two screws • Innovative design provides integrated EMC protection up to 20 dB at 2 GHz • Ingress protection up to IP 30
The Interscale C chassis line is suited to support classic form factors: • • • • • • •
embeddedNUC ATX MicroATX Flex ATX Mini ATX/ITX Boards Computer on module Customer-specific board formats
embedded-computing.com/p373653
AskSchroff@pentair.com
800-525-4682
@Schroff_NA
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RFM5103 Hermes Smart Edge IoT Development Platform Hermes™ is a smart edge data aggregation development platform for wireless IoT sensors. This flexible platform delivers connectivity and local data processing for wireless battery-free Smart Passive Sensing™ devices from RFMicron. Hermes enables real-time decisions where they are needed, while delivering full cloud access for data management, analytics and business insights. For industries protecting people and equipment, local management of alarms and alerts is essential in areas like patient care, mechanical plant predictive maintenance, industrial IoT and automotive applications. The Hermes platform incorporates an industry-standard Linux processor at its heart, which decouples the application and processing software from the specific hardware options. This makes scaling processor power up or down a manageable task. The system includes working example software that is ready to use out of the box, or easily modified to suit specific needs. Communication and peripheral components are built using a modular approach and can be easily added or subtracted from the system. The platform features an integrated wireless reader module compliant to the North American and European frequency standards used worldwide. Captured sensor data can be transferred either wirelessly (via Wi-Fi, ZigBee, RAIN compliant UHF, etc.) or using wireline infrastructure (via KNX, CAN, SPI, Ethernet, etc.).
RFMicron, Inc.
www.RFMicron.com/embedded
FEATURES ĄĄ Wireless data access point ĄĄ Smart edge local processing ĄĄ Modular hardware and software design ĄĄ Flexible Linux OS with full source code access ĄĄ Designed for wireless battery-free Smart Passive Sensing™ ĄĄ Integrated UHF/RAIN reader ĄĄ Full range of wired and wireless IoT interfaces embedded-computing.com/p373680
info@RFMicron.com
+1 (512) 535-4647
@RFMicron Networking
CSA-7400 MICA Network Appliance The ADLINK CSA-7400 is a high-performance, high-density computing platform supporting four dual Intel® Xeon® processor E5 compute nodes, interconnected by dual redundant switch modules. This product is designed as a next generation network security appliance and offers a highly scalable design in a compact 2U rackmount form factor for packet inspection, firewall, load balancer, network monitoring, security gateway, and voice gateway applications. The CSA-7400 can ensure uninterrupted service delivery through hot-swappable compute nodes and switch modules. It is ideally suited for building next generation highperformance firewalls and virtualized telecom elements. ADLINK network appliances are accompanied by the ADLINK PacketManager, a software package that includes control plane configuration tools and data plane processing acceleration capabilities. ADLINK network appliances provide increased packet processing speed and are ideal for Software Define Networking (SDN) switches and Next Generation Firewall (NGFW) applications that require Deep Packet Inspection (DPI) and network virtualization functionality. As part of ADLINK’s new Modular Industrial Cloud Architecture (MICA) platform, the CSA-7400 offers additional options for configuration, giving OEMs and system integrators faster development and a better cost-performance ratio. With the MICA platform, computing, storage, and I/O resources are modularized for flexibility, and then recombined as needed for a specific application.
ADLINK Technology
www.adlinktech.com
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FEATURES ĄĄ Supports four single-system dual Intel® Xeon® processors E5 compute nodes (MCN-2600) ĄĄ Dual redundant switch modules provide 40G internal links to each compute node, and 360G uplinks ĄĄ Support for hardware-based acceleration for processing Network Virtualization using Generic Routing Encapsulation (NVGRE) and Virtual Extensible LAN (VXLAN), assisting the construction of large layer 2 networks in the cloud ĄĄ Support for IPMI 2.0 specification, web-based intelligent system management, and support for Serial over LAN (SOL) on compute nodes ĄĄ Dual redundant power supply units provide active power management on compute nodes, support flexible power limit policies ĄĄ Support for PacketManager software to provide data plane software stacks for dynamic layer 3 and flow-based forwarding, accelerating development of customer applications ĄĄ Optional integration of Wind River® Titanium Server software to provide carrier grade Network Function Virtualization (NFV) service. Support for hardware acceleration for Open vSwitch and OpenFlow protocol processing, accelerating SDN services.
info@adlinktech.com
embedded-computing.com/p373586
800-966-5200
www.linkedin.com/company/adlink-technology
Embedded Computing Design Resource Guide | August 2016
@ADLINKTech_usa
www.embedded-computing.com
PCI Express Gen 3 Host adapter/PXH810 The PXH810 Gen3 PCI Express Host Adapter is our high performance cabled interface for distributed processor subsystems and I/O expansion applications. The host adapter extends PCI Express over cables to external systems. Based on PLX Gen3 PCI Express switch architecture, the PXH810 host adapter includes advanced features for non-transparent bridging (NTB) and clock isolation. For high performance application developers, the PXH810 host adapter combines 64 Gbit/s performance with less than one microsecond latency, significantly improving overall inter-system communication. Inter-processor communication benefits from the high throughput and low latency. The PXH810 performs both Remote Direct Memory Access (RDMA) and Programmed IO (PIO) transfers, effectively supporting both large and small data packets. RDMA transfers result in efficient larger packet transfers and processor off-load. PIO transfers optimize small packet transfers at the lowest latency. The combination of RDMA and PIO creates a highly potent data transfer system.
FEATURES
Dolphin’s software suite takes advantage of PCI Express’ RDMA and PIO data transfer scheme. Delivering a complete deployment environment for customized and standardized applications. The suite includes a Shared-Memory Cluster Interconnect (SISCI) API as well as a TCP/IP driver and SuperSockets software. The SISCI API is a robust and powerful shared memory programming environment. The optimized TCP/IP driver and SuperSockets™ software remove traditional networking bottlenecks, allowing standard IP and sockets applications to take advantage of the high performance PCI Express interconnect without modification. The overall framework is designed for rapid development of inter-processor communication systems. With the implementation of clock isolation, the PXH810’s signal quality is excellent. By isolating the system clock and transmitting an extremely low jitter high quality clock to downstream devices, the PXH810 offers users high signal quality and increased cable distances. The PXH810 supports PCI Express fiber optic cables up to 100 meters. These cables are x8 fiber optic cables. The improved signal quality and fiber optic support makes the PXH810 ideal for simulation systems. The PXH810 is also used in applications such as test and measurement equipment, medical equipment, and storage subsystem seeking high performance and data quality.
ĄĄ
PCI Express® 3 compliant - 8.0 Gbps per lane
ĄĄ
Link compliant with Gen1, Gen2, and Gen3 PCI Express
ĄĄ
PCI Express iPass Connectors
ĄĄ
One x8 PCI Express port
ĄĄ
RDMA support through PIO and DMA
ĄĄ
ĄĄ ĄĄ
Copper connection up to 2 meters, Fiber-optic cable connection up to 100 meters Clock isolation support, CFC or SSC on cable Transparent host and target operations along with non-transparent bridging to cabled PCI Express systems
ĄĄ
Low Profile PCI Express form factor
ĄĄ
EEPROM for custom system configuration
ĄĄ
Link status LEDs through face plate
embedded-computing.com/p372871
Dolphin Inc
www.dolphinics.com www.embedded-computing.com
Paraison@dolphinics.com
214-960-9066
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MCS-2080 Media Cloud Server The ADLINK MCS-2080 provides a modular architecture, is designed for media applications, and offers mass data processing capabilities. The MCS-2080 leverages ADLINK’s MICA (Modular Industrial Cloud Architecture) hybrid design for compute nodes, supporting the installation of either eight 1/4-width dual-system, dual-processor nodes (Intel® Core™ i3/i5/i7 processors or Intel® Xeon® processor E3), or four 1/2-width single-system, dual-processor nodes (Intel® Xeon® processor E5), or a combination of both. The Intel® Core™/Intel® Xeon® processor E3 systems have built-in hardware acceleration units for video processing and are suitable for handling video transcoding and analytics tasks. The Intel® Xeon® processor E5 systems provide high performance computing ideal for big data tasks. The MCS-2080 supports the IPMI 2.0 specification to provide web-based intelligent system management, as well as support for Serial over LAN (SOL) on compute nodes. Dual redundant power supply units include power health monitoring and abnormal situation alert using the IPMI interface. In addition, designers can speed up product development with ADLINK’s MediaManager, which enables prototyping for frequently used video server functions, and open source software from OpenStack and Apache YARN ecosystems, a big data-ready platform.
ADLINK Technology
www.adlinktech.com
FEATURES ĄĄ 16 systems (MCN-1500 compute node) or 4 systems
(MCN-2600T compute node), hybrid combinations supported
ĄĄ Supports Intel® Quick Sync Video (GT4e graphics) with hardware
assisted H.265/VP9 transcoding
ĄĄ Dual redundant switch nodes, each providing 16x 1G internal
links to compute nodes and 4x 10G uplinks
ĄĄ 8x PCIe x8 slots to meet expansion requirements ĄĄ ADLINK MediaManager for end-to-end video server prototyping
to speed-up product development
ĄĄ IPMI 2.0 with SOL and web-based management interface ĄĄ Adaptive fan speed and intelligent power supply monitoring embedded-computing.com/p373585
info@adlinktech.com
800-966-5200
www.linkedin.com/company/adlink-technology
@ADLINKTech_usa
Operating Systems and Tools
SAFERTOS SAFERTOS is a pre-certified, pre-emptive, safety critical Real-Time Operating System (RTOS) that delivers determinism and robustness to embedded systems, whilst using minimum resources. SAFERTOS is delivered for a specific processor/compiler combination. By following the clear, concise instructions within the Safety Manual, the integrity of SAFERTOS can be preserved whilst it’s installed and integrated into a development environment. This removes the need for retesting on the target hardware, and certification as part of a product becomes very straightforward.
ĄĄ Pre-certified to IEC 61508 SIL3 & ISO 26262 ASIL D by TÜV SÜD ĄĄ Supplied as source code with a full Design Assurance Pack
SAFERTOS includes features supporting the development of safety critical products such as Task Isolation and Separation functionality, and intrinsic self-verification routines. With an imperceptible boot time, SAFERTOS is an ideal choice in systems that need to protect users and equipment from hazards quickly after a power on or brown out event.
ĄĄ Intrinsic self-verification routines
SAFERTOS supports IEC 62304 Class C and FDA 510(K) submissions for medical devices, IEC 61508 SIL 3 for industrial devices, ISO 26262 ASIL D for automotive and EN50128 SIL 4 for rail. SAFERTOS is available pre-certified by TÜV SÜD.
ĄĄ Supports wide range of popular microprocessors, and all popular
WITTENSTEIN high integrity systems www.HighIntegritySystems.com
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FEATURES
ĄĄ MPU support as standard ĄĄ Migration path from FreeRTOS ĄĄ MISRA C compliant
development tools
Sales@HighIntegritySystems.com
WITTENSTEIN high integrity systems
Embedded Computing Design Resource Guide | August 2016
embedded-computing.com/p373531
+44 1275 395 600
@WITTENSTEIN_HIS
www.embedded-computing.com
QP™ Active Object Frameworks Embedded software developers are independently re-discovering patterns for building concurrent software that is safer, more responsive and easier to understand than naked threads of a RealTime Operating System (RTOS). These best practices universally favor non-blocking, asynchronous, event-driven, encapsulated state machines (a.k.a. active objects) instead of naked, blocking RTOS threads. The QP™ family of active object frameworks from Quantum Leaps provides a lightweight, reusable architecture that inherently supports and automatically enforces the best practices of concurrent programming. The QP™ family consists of QP/C, QP/C++, and QP-nano frameworks, which are all strictly quality controlled and thoroughly documented. The frameworks are licensed as GPL open source as well as commercially. The behavior of active objects is specified in QP by means of hierarchical state machines (UML statecharts). The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free QM™ graphical modeling tool. All QP frameworks contain a selection of built-in real-time kernels and can run on bare-metal MCUs, completely replacing a conventional RTOS. Native QP ports and ready-to-use examples are provided for major CPU families, such as ARM Cortex-M. QP/C and QP/C++ frameworks can also be used with many traditional RTOSes and desktop OSes (such as Windows and Linux).
FEATURES ĄĄ
ĄĄ
ĄĄ
ĄĄ
ĄĄ
ĄĄ
Reusable architecture based on active objects (actors) and hierarchical state machines Efficient, thread-safe event-driven mechanisms for active objects to communicate, such as direct event passing and publish-subscribe Built-in RTOS kernels to run QP applications, such as cooperative QV kernel, preemptive non-blocking QK kernel, and preemptive blocking QXK kernel Compliant with MISRA-C:2004 (QP/C and QP-nano) and MISRA-C++:2008 (QP/C++) Free, graphical QM™ modeling tool for designing UML statecharts and automatic code generation based on QP frameworks Book “Practical UML Statecharts in C/C“ with detailed design study of the QP frameworks, application notes, articles, manuals and videos
embedded-computing.com/p373548
Quantum Leaps, LLC
www.state-machine.com www.embedded-computing.com
info@state-machine.com www.linkedin.com/company/quantum-leaps
919-360-5668
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Processing
6 GHz RF/IF Sentinel Intelligent Signal Scanning Recorder Model RTS 2620 6 GHz RF Sentinel™ Intelligent Signal Scanning rackmount recorder is suitable for military, security and government intelligence (SIGINT, COMINT and ELINT) applications. The Talon RTS 2620 is the first recorder to combine and exploit the power of a Pentek Talon recording system with a fully integrated signal scanner, RF tuner and RF upconverter. The Sentinel recorder provides automated signal monitoring and detection. The user specifies a start and stop frequency for the scan, covering any range between 2 MHz and 6 GHz. The RF tuner and DDC step across the scan range in consecutive bands, each programmable up to 40 MHz in width. RF energy in each band is detected to create a waterfall spectrum display of the entire scan. Any band can be selected for continuous real-time monitoring and/ or recording. In addition to manual band selection, a recording can be automatically started during a scan by configuring signal strength threshold levels to trigger a recording of the detected band. Each recording captures an instantaneous bandwidth up to 40 MHz.
FEATURES ĄĄ
ĄĄ
Ease of Operation Sentinel recorders are built on a Windows 7 Professional workstation with an Intel Core i7 processor and provide both a GUI (graphical user interface) and API (Application Programmer’s Interface) to control the system. Systems are fully supported with Pentek's SystemFlow® software for system control and turn-key operation. The SystemFlow software has been enhanced to include intelligent scanning and integrated control of the RF tuner and optional RF upconverter. The software provides a GUI with point-and-click configuration management and can store custom configurations for single-click setup. It also includes a virtual oscilloscope, spectrum analyzer and spectrogram to monitor signals before, during and after data collection. Post processing and analysis software tools like Matlab can be installed directly on the Talon RTS 2620. Data files are recorded to the Windows native NTFS file system, which allows operators immediate access to recordings without the need for any file format conversion.
Depending on storage requirements, the RTS 2620 is configured in a 3U-6U 19" rackmountable chassis, with hot-swappable data drives, front panel USB ports and I/O connectors on the rear panel. The hotswappable Hard Disk Drive (HDD) array is available in 2 to 192 TB configurations and supports RAID levels 0, 5, or 6.
Captures RF signals up to 6 GHz • Capture and scan bandwidths up to 40 MHz • 30 GHz/sec scan rate • Selectable threshold triggered or manual record modes • 16-bit A/D with 75 dB SNR & 87 dB SFDR • Built-in DDC with selectable decimation range from 2 to 65,536
ĄĄ
Capture and scan bandwidths up to 40 MHz
ĄĄ
30 GHz/sec scan rate
ĄĄ
Selectable threshold triggered or manual record modes
ĄĄ
16-bit A/D with 75 dB SNR & 87 dB SFDR
ĄĄ
ĄĄ
Configuration Options
Search and capture system using Sentinel Intelligent Signal Scanner
Built-in DDC with selectable decimation range from 2 to 65,536 Built-in DUC with selectable interpolation range from 2 to 65,536
ĄĄ
Storage capabilities to 192 TB
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RAID levels of 0, 5, and 6
ĄĄ
Optional RF upconversion
Additional options include a 6 GHz RF upconverter to allow users to re-transmit recorded signals at the same RF frequency at which they were recorded, GPS time and position stamping and 10GbE or 40GbE offload facilities.
Pentek
http://www.pentek.com/go/ecd2620
66
sales@pentek.com www.linkedin.com/company/pentek
Embedded Computing Design Resource Guide | August 2016
embedded-computing.com/p373646
201-818-5900 www.twitter.com/pentekinc
www.embedded-computing.com
SATA Disk Module Apacer SATA Disk Module adopts a 7-pin SATA connector. Its innovative hook design can effectively protect the inner parts of the system from possible loosening during any movement, ensuring operational stability. It comes in various angles (90°, 180°, 270°), heights, and widths, so users can flexibly install the storage device in accordance with their own mechanical designs. Moreover, selected designs of the product facilitate airflow within a unit’s body for better heat dissipation. With the built-in power pins on the 7-pin SATA connector, the module can operate without an external power cable. In addition, its unique locking mechanism provides secure connectivity to a motherboard during shock. The optional Write Protect switch can also disable the host from performing any write to the device.
FEATURES ĄĄ 7-pin SATA connector ĄĄ Unique Hook Design ĄĄ Power Cable-less Solution ĄĄ TRIM Command Support ĄĄ Product Housing Selection (Optional) ĄĄ Built-in ATA Secure Erase and S.M.A.R.T. Functions ĄĄ Global Wear-Leveling and Block Management embedded-computing.com/p372850
APACER
ssdsales@apacerus.com
http://industrial.apacer.com
Wireless
Revolutionary End Node Solutions: RN2483 and RN2903 The RN2483 and RN2903 are revolutionary end-node solutions that enable extremely long-range (up to 15 km), bidirectional communication with years of battery life for Internet of Things (IoT), Machine-toMachine (M2M), smart city and industrial applications. The RN2483 is a fully certified LoRa® technology modem for the European 433/868 MHz bands, and the RN2903 modem is for the 915 MHz North American band. Both modems come with the LoRaWAN™ Class A protocol stack, so they can easily connect with the rapidly expanding infrastructure driven by the LoRa Alliance to create Low-Power Wide-Area Networks (LPWANs), both as privately managed scalable deployments or telecom-operated public networks with nationwide coverage. Due to the long range of LoRa technology, these modems are able to operate without repeaters, reducing the total cost of ownership. Additionally, both the RN2483 and RN2903 are fully certified which saves significant certification costs and reduces time to market.
Microchip Technology, Inc. www.microchip.com/lora
www.embedded-computing.com
480-792-7200 @MicrochipTech
FEATURES ĄĄ On-board LoRaWAN Class A protocol stack ĄĄ ASCII command interface over UART ĄĄ Compact form factor 17.8 x 26.7 x 3 mm ĄĄ Castellated SMT pads for easy and reliable PCB mounting ĄĄ Device Firmware Upgrade (DFU) over UART ĄĄ 14 GPIO for control, status, and ADC ĄĄ Environmentally friendly, RoHS compliant embedded-computing.com/p373551
https://www.facebook.com/microchiptechnology/ https://www.linkedin.com/company/microchip-technology
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Editor’s Choice
EDITOR’S CHOICE
www.embedded-computing.com/editors-choice
Timing measurement tools for air traffic management The latest European Organization for Civil Aviation Equipment (EUROCAE) standards address the implementation of IP-based technology for air traffic control voice services. GL Communications timing measurement tools help mitigate risk and lower complexity involving migration to Voice-over-IP (VoIP) services in air traffic management. The GL MAPS controller works in conjunction with signal logging, audio analysis, event logging, packet analysis, and IP network simulation to measure delays and jitter in push-to-talk activation, audio between planes and ground stations, squelch enable/disable, transmitter activation delay, and aircraft call indication delay.
GL Communications Inc. www.gl.com | www.embedded-computing.com/p373721
New industrial PC kit solution using 6th Gen Intel Core The Fujitsu Kit Solution for 6th Generation Intel Core processors is pre-CE and FCC/B certified and enables customers to create white-labeled industrial PCs quickly and easily. There are two Mini-ITX mainboard options with a variety of USB, HDMI, Ethernet, and wireless connectivity options. The mainboard offers three independent displays and one PCI Express x16 Gen 3 and mini-PCIe port. Extended temperature ranges between 0 °C to 60 °C is supported with the Intel 6th generation CPUs dissipating between 35 W and 65 W. Fujitsu also provides housing options for the mainboard that can be white-labeled by the customer.
Fujitsu www.fujitsu.com/us | www.embedded-computing.com/p373722
Active noise cancellation, ambient inclusion chipset for USB-C headsets Conexant’s CX20888 audio stereo CODEC is a single chip solution for USB-C compliant active noise cancellation (ANC) and ambient noise inclusion headsets. USB-C enables higher data speeds and faster charging in a single cable. The CX20888 also includes a “Wake-on-Voice” trigger for audio-sensing applications. The chip includes a stereo 24-bit DAC and ADC for music and voice applications with a sampling rate up to 96 KHz. No external crystal is needed and the 5 mm x 5 mm BGA package minimizes space requirements. The chip provides ultra-low power consumption and wind-noise cancellation for smartphone headset applications.
Conexant www.conexant.com | www.embedded-computing.com/p373723
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Connecting Global Competence
Planet e: Where the future begins. Embedded solutions of tomorrow. Today. Embedded exhibition sector: November 8–11, 2016 electronica Embedded Forum: November 8–11, 2016 Embedded Platforms Conference: November 9–10, 2016 All about electronica Embedded: electronica.de/en/embedded
Tickets & Registration: electronica.de/en/tickets
World’s Leading Trade Fair for Electronic Components, Systems and Applications Messe München I November 8–11, 2016 I electronica.de
Capture. Record. Real-Time. Every Time. Intelligently record wideband signals continuously...for hours Capturing critical SIGINT, radar and communications signals requires hardware highly-optimized for precision and performance. Our COTS Talon® recording systems deliver the industry’s highest levels of performance, even in the harshest environments. You’ll get extended operation, high dynamic range and exceptional recording speed every time! •
High-speed, real-time recording: Sustained data capture rates to 8 GB/sec
•
Extended capture periods: Record real-time for hours or days with storage up to 100+ TB
•
Exceptional signal quality: Maintain highest dynamic range for critical signals
•
Flexible I/O: Capture both analog and digital signals
•
Operational in any environment: Lab, rugged, flight-certified, portable and SFF systems designed for SWaP
•
Out-of-the-box operation: SystemFlow® GUI, signal analyzer and API provide simple instrument interfaces
•
Intelligent recording: Sentinel™ Intelligent Scan and Capture software automatically detects and records signals of interest
Eight SSD QuickPac™ canister, removable in seconds!
Download the FREE High-Speed Recording Systems Handbook at: www.pentek.com/go/ecdtalon or call 201-818-5900 for additional information.
Pentek, Inc., One Park Way, Upper Saddle River, NJ 07458 Phone: 201-818-5900 • Fax: 201-818-5904 • email: info@pentek.com • www.pentek.com Worldwide Distribution & Support, Copyright © 2016 Pentek, Inc. Pentek, Talon, SystemFlow, Sentinel and QuickPac are trademarks of Pentek, Inc. Other trademarks are properties of their respective owners.