Embedded Computing Design with Embedded World Profiles Spring 2018

SPRING 2018 VOLUME 16 | 1 EMBEDDED-COMPUTING.COM

IOT INSIDER Crossroads for connected cars PG 5 TRACKING TRENDS

Key indicators and inflection points PG 6

EMBEDDED WORLD ISSUE

PG 28

MICROMAX M-Max 771 PR7/MMS. MIL-STD Certified Rugged Computer

PG 30

ARM LTD. Arm's Advanced, Energy Efficient Designs Enable Intelligence in More Than 125 Billion Chips

PG 28

Development Kit Selector

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2018 Embedded Processor Report:

Rise of the Neural Network Accelerator PG 10

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CONTENTS

Spring 2018 | Volume 16 | Number 1

opsy.st/ECDLinkedIn

FEATURES 10

COVER

10

2018 embedded processor report: Rise of the neural network accelerator

AI and machine learning workloads represent the next big opportunity for embedded processing solutions.

Unfortunately, current offerings aren't optimized for these applications. It's time for a new class of semiconductor IP.

By Brandon Lewis, Technology Editor

12

Spectre and Meltdown: A new breed of vulnerability

By Curt Schwaderer, Editorial Director

14 18

Now is the time for eFPGA technology

By Anil Parchuri, Quicklogic and Rakesh Jain, Mentor, a Siemens Business

14

WEB EXTRAS

Is FreeRTOS the future of embedded operating systems?

 Designing optimized microphone beamformers

By Brandon Lewis, Technology Editor

20

By Paul Beckmann, DSP Concepts

Mind the gap: Going from reference board prototype to production system

http://bit.ly/MicBeamformers

 Choosing the most suitable MEMS accelerometer for your application, part 1

By Erik Welsh and Gene Frantz, Octavo Systems

23 28

@embedded_comp

2018 DEVELOPMENT KIT ROUNDUP

By Chris Murphy, Analog Devices http://bit.ly/BestMEMs

EMBEDDED WORLD PROFILES Arm Ltd. MicroMax Computer Intelligence Vision Components

 Fog computing will gain steam in 2018

TAICENN Technology Technologic Systems

By Lynne Canavan, OpenFog Constortium

20

http://bit.ly/Fog2Steam2018

EVENTS  embedded world 2018 Nuremburg, Germany February 27 – March 1, 2018 www.embedded-world.eu

 Sensors Expo & Conference

COLUMNS 5

IOT INSIDER

Automotive Ethernet: A crossroads for the connected car

8

TRACKING TRENDS

Key indicators and inflection points for embedded engineers and IT

By Curt Schwaderer, Editorial Director

MUSINGS OF A MAKERPRO

Simple device-to-device communication with the NRF24L01+ module

By Brandon Lewis, Technology Editor

6

San Jose, CA June 26-28, 2018 www.sensorsexpo.com

By Jeremy S. Cook, Contributing Editor

9

AUTOMOTIVE ANALYSIS

A quick progress report on SiC and GaN chips for electric vehicless

By Majeed Ahmad, Automotive Contributor

4

Published by:

Embedded Computing Design | Spring 2018

2018 OpenSystems Media® © 2018 Embedded Computing Design All registered brands and trademarks within Embedded Computing Design magazine are the property of their respective owners.

ISSN: Print 1542-6408 Online: 1542-6459 enviroink.indd 1

10/1/08 10:44:38 AM

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IOT INSIDER

blewis@opensystemsmedia.com

Automotive Ethernet: A crossroads for the connected car

By Brandon Lewis, Technology Editor The term “connected car” loosely describes any vehicle with Internet access. It implies an external network connection, and possibly the provisioning of a wireless hotspot that other nearby devices can join.

But in the age of IoT, is that really enough to consider a car “connected”? We now expect all of our other connected devices to be more than mere access points. We expect all of our other connected devices to do something with connectivity.

This is part of the reason Teslas are so compelling. And the Tesla Model S, for example, has an internal Ethernet network.

The expansion of automotive Ethernet Ethernet first made an appearance in consumer vehicles back in 2008 when BMW introduced it as a diagnostics interface for reprogramming calibration software on engine control modules. Whereas reflashing these modules had previously taken 10 hours over the CAN bus, only 20 minutes was required to upload the same package using 1 GbE technology. The time savings alone covered the cost of integrating the bus into vehicles, and since then Ethernet has invaded other automotive subsystems such as backup cameras and infotainment[1].

For instance, the Model S is equipped with a 100 Mbps full-duplex Ethernet network that connects the center console, dashboard and navigation screen, and another unknown device[2].

In fact, Ethernet has been so successful in automotive applications that it has brought the industry to a crossroads. With the advent of deterministic Ethernet standards developed by the IEEE’s 802.1 Time-Sensitive Networking (TSN) task group, the technology can now be implemented in automotive control applications where buses such as CAN, LIN, and FlexRay have traditionally dominated. This evolution also coincides with the need for higher bandwidth data links in automotive vision and active safety applications, which seem to incorporate more high-performance sensors every year.

Today, suppliers like Molex are brining multi-gigabit automotive Ethernet solutions to market that address these use cases. At CES 2018, the company showcased a fully functional in-vehicle network based on a 10 Gbps

www.embedded-computing.com

Ethernet gateway, which also supported CAN, LIN, FlexRay, and other common automotive buses. The customizable gateway leveraged an Aquantia chip for the Ethernet MAC and PHY, while an Ethernet Audio Video Bridging (AVB)/TSN protocol stack from middleware vendor Excelfore guided data across the network.

Beyond just higher bandwidth, a key advantage of Ethernet in the connected car is TCP/IP. Because automotive Ethernet supports TCP/IP, in-vehicle communications over an Ethernet backbone roughly resemble the external communications between a vehicle and the cloud. As a result, automakers can use a common networking technology across their connected car infrastructure, which both reduces design complexity and enables more seamless over-the-air (OTA) software updates to vehicles deployed in the field. This was on display in the Molex demonstration through a feature called Diagnostics-over-IP (DoIP), which discovered all of the vehicle’s IP-enabled devices, established a route to each, and provided a method for reflashing their software.

Vehicle communications crossroads As stated previously, however, the automotive industry is at a crossroads. In a market that has historically been defined by long technology lifecycles, automotive Ethernet is in its very early days. Before OEMs and Tier 1s commit to large-scale migrations away from legacy buses, Ethernet must prove itself in terms of cost, reliability, security, and a host of other design factors.

Still, the bar for connected vehicles has already been set by the likes of Tesla and others, and automotive Ethernet appears to be the best path forward. At CES I asked the head of connected cars for a major auto manufacturer whether their new concept vehicle had an Ethernet backbone. He paused for a few seconds before saying, “It will.”

References: 1. “Successful connection on the Model S internal Ethernet network.” Tesla Motors Club. Accessed January 30, 2018. https://teslamotorsclub.com/tmc/threads/successfulconnection-on-the-model-s-internal-ethernet-network.28185/.

2. “The case for ethernet in automotive communications.”

ACM SIGBED Review. Accessed January 30, 2018. https://dl.acm.org/citation.cfm?id=2095257.

Embedded Computing Design | Spring 2018

5

TRACKING TRENDS

cschwaderer@opensystemsmedia.com

Key indicators and inflection points for embedded engineers and IT

By Curt Schwaderer, Editorial Director

The Gartner Group’s now-famous “Hype Cycle” research methodology and resulting graph sets an important foundation for understanding historical events and emerging trends in the technology market space. The graph is predicated on walking a certain technology from its innovation trigger point through inflated expectations (i.e., market claims that the technology will be worth billions and solve every existing problem), to the trough of disillusionment (i.e., there are too many holes or issues with the technology to do anything useful), through the slope of enlightenment (i.e., 'hey, we can solve these issues and do a proof of concept that shows the technology is useful for this application!), and, finally, the plateau of productivity (i.e., the hype is over, it’s being used, and generating revenue in specific markets and applications').

In Gartner’s “Top 10 Strategic Technology Trends for 2018,” the first three trends listed are: 1. AI foundation – Decision making, changing business models and ecosystems, and remaking customer experience depends on machine learning and cloud solutions that can make sense of data 2. Intelligent applications and analytics – Gartner asserts that “over the next few years, every app, application, and service will incorporate AI at some level.” These applications are foundational

components of technologies ranging from embedded systems to cloud services.

3. Intelligent “things” – What many industries have coined “smart sensors” or “smart devices” are really connected embedded systems that provide information and execute new tasks based on cloud analysis.

Gartner goes on to say that this relationship isn’t going to simply look like a chain from embedded smart device to network to cloud and back. These systems will actually interconnect a “swarm of collaborative intelligent things” that will “work together, either independently or with human input.”

This sets the stage in 2018 to progress the IoT trend from a grouping of technical embedded device, network, and

FIGURE 1 Gartner’s Hype Cycle graph.

Innovation Trigger

Peak of Inflated Expectations

Trough of Disillusionment

Slope of Enlightenment

Plateau of Productivity

time

6

Embedded Computing Design | Spring 2018

www.embedded-computing.com

cloud capabilities to a mesh environment capable of paradigm-altering results.

THIS SETS THE STAGE IN 2018 TO

The evolution is not just technology Technology advancements are just one enabling factor. Today’s technology also requires domain expertise in embedded, networking, and enterprise/IT cloud. This is causing an interesting shift that is not just affecting embedded engineering organizations, but IT organizations and the staffing services companies that support them as well.

Vanick Digital illustrates how IT/enterprise organizations are changing to address the entrance of embedded and IoT in the enterprises they serve. Particularly interesting is the prominence of their API management initiatives, which illustrates the need for enterprises to manage APIs beyond the traditional IT realm. These APIs may address smart systems or devices that require an understanding of embedded systems, as well as the networks that connect them to the enterprise. This is a trend that will not only continue to evolve, but become commonplace for enterprise-oriented technology services companies.

NexTech Solutions is a staffing solutions company that specializes in the placement of contract and permanent employees in the technology and accounting/finance arenas. While they compete with national staffing firms, their smaller size gives them the ability to adjust to paradigmshifting trends more quickly than national agencies.

IT staffing is no longer a laundry list of Microsoft enterprise software and databases/mainframes. While those still exist, what’s evident from NexTech’s staffing capabilities is the extension and support for a new breed of IT systems engineer that understands embedded and networking environments – both corporate and LAN/WAN. Positions like “Network Engineering and Administration,” “Project Management,” and “Software Development and Engineering” positions are on this list, all with a dimension of being able to understand, deploy, write software

PROGRESS THE IOT TREND FROM A GROUPING OF TECHNICAL EMBEDDED DEVICE, NETWORK, AND CLOUD CAPABILITIES TO A MESH ENVIRONMENT CAPABLE OF PARADIGM-ALTERING RESULTS.

for, and manage projects relating to IoT and new enterprise systems that bring businesses closer to their customers that use smart devices, networks, and cloud applications.

Trends point toward 2018 being an inflection point IoT systems are rolling out in many industries, and embedded technologists have been working with networking and cloud engineers to create version 1.0 of IoT systems. While technologies, systems, and processes have been fined tuned in the embedded space for many years now, IT companies and staffing organizations are showing that mainstream enterprise environments are starting their shift towards supporting the IoT and its new set of challenges.

Debugger for RH850

from the

automotive specialists

ING

DEBUGG RH850, ICU-M and GTM Debugging

AUTOSAR / Multicore Debugging

NEXUS Runtime Measurement (Performance Counter)

Onchip, Parallel and Aurora Tracing

Multicore Tracing

TRACIN

G

Code Coverage (ISO 26262)

www.lauterbach.com/1701 advertisement_rh850_210x110mm.indd 1

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19.06.2017 07:45:09

Embedded Computing Design | Spring 2018

7

MUSINGS OF A MAKERPRO

www.youtube.com/c/jeremyscook

Simple device-to-device communication with the NRF24L01+ module

By Jeremy Cook, Engineering Consultant Wireless communication can take many forms, from Wi-Fi to Bluetooth to LoRaWAN and everything in between. For an extremely low-cost option for Arduino projects (under $2 for each transceiver), it’s tough to beat the NRF24L01+. While its range is limited to 100 meters or less line-of-sight, it’s perfect for simple remote control and data transmission applications.

Besides its low cost, one benefit is that once the Rx and Tx microcontroller are programmed, you simply turn both on and they communicate without the hassle of pairing or logging on as you would with a Wi-Fi or Bluetooth device. It’s also extremely small, making it easy to stuff into your latest IoT contraption. To explore its capabilities, I turned to an instructable by Akshay Jha, which outlines how to setup this type of communication via a pair of Arduino boards. He used an Uno and a Nano, as did I, but other Arduino combinations should work for this experiment as well.

I first wired up the NRF24L01+ modules to the Arduino boards as outlined per Jha’s instructions, which was actually the toughest part of the build. I didn’t have the proper jumper wires available, and had to resort to more soldering and wire cutting/stripping than would have normally been necessary (Figure 1). As outlined in this post, stocking up on cheap parts ahead of time can really be worth it, and I ordered the proper wires

With wiring complete, I programmed each Arduino as specified, but changed the first two lines to the following: #include <SPI.h> #include <nRF24L01.h> #include <RF24.h> I also modified the delay functions in the two pieces of code, including adding a delay at the end of the transmitter routine.

After this wiring and programming work, I had a set of components that, when the NRF24L01+ was plugged into the transmitting Nano, the receiving Uno would then blink an LED, and stop when power was disconnected, proving one was controlled by the other (Figure 2).

You can also check this via serial output.

One thing to note is that pin 13 is in use by the transceiver module, meaning that, as written, you will need to wire in an LED instead of use the one that is already onboard.

FIGURE 1 Without proper tools, wiring the NRF24L01+ modules to the Arduino boards involved a lot of soldering.

While I’m still in the early stages of using this device, I’m excited at the possibilities for such a tiny and inexpensive module for IoT applications. Looking through the Arduino IDE Library Manager, several interesting applications have been explored, including mesh networking, and even Bluetooth LE communication. At a price of around $2, this module is certainly worth consideration for your next wireless project.

FIGURE 2 The Arduino Uno blinks an LED when the NRF24L01 is plugged into the transmitting Nano.

8

soon after this was completed. Another tip that I saw too late is to snap headers into individual pieces before trying to take them out by melting the solder – this would also have saved me some frustration when I took a set out in order to solder directly to the NRF24L01+ board.

Embedded Computing Design | Spring 2018

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AUTOMOTIVE ANALYSIS

A quick progress report on SiC and GaN chips for electric vehicles

By Majeed Ahmed, Automotive Contributor The vehicle electrification drive, where every pound matters, is increasingly looking toward two wide bandgap semiconductor technologies: silicon carbide (SiC) and gallium nitride (GaN). These semiconductor materials can withstand much higher voltages and temperatures than silicon, and thus offer greater reliability and durability while using less energy.

SIC CHIPS ARE CONSIDERED MORE SUITABLE FOR HIGH-POWER DC/AC INVERTERS AND DC/DC CONVERTERS, WHEREAS GAN COMPONENTS ARE MORE ADAPTABLE TO LOWTO MEDIUM-POWER DC/DC AND AC/DC CONVERTERS. SiC-based MOSFETs are already replacing silicon insulated-gate bipolar transistors (IGBTs) in the main inverters that convert battery voltage into three-phase AC voltage to drive motors. Wolfspeed, for example, recently supplied the SiC power module for Ford’s electric vehicle (EV) powertrains. The 400 A power module contains four MOSFETs connected in parallel to achieve 2.5 mΩ Rds(on), and is designed around the Wolfspeed’s 900 V, 10 mΩ CPM3-0900-0010A chip. The company has also demonstrated these chips in an 800 A, 1.25 mΩ module.

It’s worth noting that Wolfspeed, a business unit of Cree, has been offering SiC components for on-board charging and DC-to-DC power conversion systems in EVs. Compared to IGBT modules, these SiC modules reduce switching losses by as much as 75 percent. This makes the inverter significantly smaller and lighter by boosting power throughput, and also improves thermal management as lower switching losses contribute to a more compact cooling system.

as potential markets for GaN due to its high-speed switching capability.

Transphorm, headquartered in Goleta, CA, is a case in point. In March 2017, the supplier of high-voltage GaN FETs unveiled a 650 V chip that, according to the company, is the first GaN solution to earn automotive-grade qualification (Figure 1). They also recently secured a $15 million investment from Yaskawa Electric.

After passing AEC-Q101 stress tests, Transphorm is targeting its TPH3205WSBQA chip for on-board charger and DC-to-DC systems in plug-in hybrid electric vehicles (PHEVs) and battery electric vehicles (BEVs).

Powering ahead The choice between SiC and GaN components generally depends on a lot of design considerations. However, SiC chips are considered more suitable for high-power DC/AC inverters and DC/DC converters, whereas GaN components are more adaptable to low- to mediumpower DC/DC and AC/DC converters.

In 2018, industry watchers are anticipating a lot of momentum in vehicle electrification, especially for HEVs. Both SiC and GaN power components are likely to be an important part of this automotive industry upheaval.

FIGURE 1 The TPH3205WSBQA from Transphorm is an AEC-Q101qualified GaN FET for electric vehicle (EV) applications.

While SiC components are steadily gaining adoption in EVs, where do GaN chips stand? The market research firm Yole Développement sees the charging of highvoltage drive batteries, DC-AC auxiliary power supplies, and DC-DC buck conversion to 12 V and 48 V batteries www.embedded-computing.com

Embedded Computing Design | Spring 2018

9

SILICON: 2018 EMBEDDED PROCESSOR UPDATE

2018 embedded processor report: Rise of the neural network accelerator

By Brandon Lewis, Technology Editor AI and machine learning (ML) applications represent the next big market opportunity for embedded processors. However, conventional processing solutions were not designed to compute the neural network workloads that power many of these applications, necessitating new architectures that can meet the growing demand for intelligence at the edge.

W

ith billions of connected sensor nodes being deployed across the IoT, one thing has become clear: Automation is needed everywhere. Given the nature of IoT systems, many of which have serious economic, productivity, and safety implications, this need transcends the use of simple rules engines or programming thresholds. In response, industry has turned to AI and ML. Many of today’s AI and ML applications rely on artificial neural networks, which are algorithms that analyze different aspects of a data set by organizing its defining characteristics into a series of structural layers. These networks are initially modeled on high-performance compute platforms that teach the algorithm to make decisions or predictions depending on certain parameters.

Afterwards the algorithm can be optimized and ported to an embedded target, where it makes inferences based on input data received in the field.

Different embedded processing solutions are used to execute neural network algorithms depending on the application, leaving a range of options for AI and ML developers to choose from.

But, as Mike Demler, Senior Analyst for The Linley Group and Co-Author of the firm’s “Guide to Processors for Deep Learning” asserts, each of these comes with tradeoffs in terms of power, performance, and cost.

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“The trend is definitely toward adding an accelerator to the mix along with CPUs, GPUs, and DSPs. The reason is that they are more area- and power-efficient than the other general-purpose cores,” Demler says. “As the use of standard, open deep learning frameworks like Caffe and TensorFlow increases, along with readily available open source networks like GoogleNet and ResNet, it’s easier for IP vendors to design cores that have hardware specifically dedicated to run the various neural network layers. That’s why a lot of accelerators keep adding larger and larger multiplieraccumulator arrays, because most of the calculations in a neural network are MACs.” Emerging architectures for AI workloads A major focus for IP vendors targeting neural network workloads is flexibility, as requirements are changing rapidly in the evolving AI market. An example of this can be found in CEVA’s recently released NeuPro AI processor architecture, which consists of a fully programmable vector processing unit (VPU) alongside specialized engines for matrix multiplication and computing activation, pooling, convolutional, and fully connected neural network layers.

One common challenge in processing neural network workloads is the need to transfer large data sets to and from memory. To overcome this, the NeuPro architecture incorporates direct memory access (DMA) controllers that enhance DDR bandwidth utilization. In addition, the architecture features the ability to dynamically scale resolutions to accommodate the precision requirements of individual network layers. According to Liran Bar, Director of Product Marketing for Imaging and Computer Vision at CEVA, this helps maximize the accuracy of neural network inferencing.

“Not all layers require the same level of precision. In fact, many commercial neural networks require 16-bit resolutions in order to keep high accuracy, but at the same time 8-bit is sufficient for some layers,” Bar says. “NeuPro determines the precision of each 8- or 16-bit layer in advance to enable full flexibility. For example, when using the NP4000 product, this allows 4000 8x8, 2048 16x8, or 1024 16x16 MACs to be dynamically selected at run time.”

A similar feature is available in Imagination Technologies’ PowerVR Series2NX, a neural network accelerator (NNA) with native support for bit depths down to 4 bits. The PowerVR Series2NX takes dynamic scaling to the extreme, however, supporting 4-, 5-, 6-, 7-, 8-, 10-, 12-, and 16-bit resolutions on the same core for even greater precision (Figure 1).

Embedded Computing Design | Spring 2018

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“One can see the NNA architecture as a tensor processing pipeline,” says Russell James, Vice President of Vision and AI at Imagination Technologies. “It has a neural network compute engine optimized for fast convolutions over large tensors (input data and weights), complemented by various other units performing element and tensor operations such as activations, pooling, and normalization. The architecture also employs an optimized dataflow that enables operations to be grouped into passes, and thus minimizes external memory access.”

Another unique capability of the PowerVR Series2NX is its ability to convert data into an exchange format in memory that can be read by CPUs or GPUs, which gives heterogeneous systems a head start in neural network processing. Imagination offers a Network Developer Kit (NDK) for evaluating the core that contains tools for mapping neural networks to the NNA, tuning network models, and converting networks developed in frameworks such as Caffe and TensorFlow.

Neural network processing: Everyone’s in Outside of IP vendors, major chipmakers also continue to position themselves to take advantage of AI workloads. NVIDIA Tegra and Xavier SoCs combine CPU, GPU, and custom deep learning accelerators for autonomous driving systems, while Qualcomm continues to build ML features into its Hexagon DSP. Intel, for its part, has had an 18-month-long shopping spree acquiring the likes of Mobileye, Movidius, and Nervana who develop neural network technologies for various markets. Even Google has created a tensor processing unit (TPU).

Each of these companies is taking a different approach to processing neural network workloads, and each architecture addresses slightly different use cases. But when it comes to AI for developers, the more options, the better.

FIGURE 1

The PowerVR Series2NX is a neural network accelerator (NNA) that can run off-the-shelf networks such as GoogLeNet Inception at up to 500 inferences per second.

EXECUTIVE SPEAKOUT

Seamless Control of Automotive Networks

By Francis Ielsch, Manager Product Marketing AIS

The Unified Centralized Network Stack (UNICENS) sets a new standard for handling complex, heterogeneous infotainment networks out of one single software framework.

UNICENS software encapsulates the network specifics and allows you to focus on your application development rather than burdensome network management details. You can choose your preferred device control method including Media Oriented Systems Transport (MOST®) technology’s FBlock, Ethernet IP or user-specific methods. UNICENS also supports the configuration and control of all network participants from one central node and can eliminate the need for microcontrollers (MCUs) in all other nodes in the network.

When combined with suitable drivers, you can develop standardized applications that are fully abstracted from the network technology. You do not need to have extensive knowledge of network technologies to use UNICENS software, making development cycles shorter and software easier to maintain.

UNICENS is available now as free and open-source software from Microchip. www.embedded-computing.com

Embedded Computing Design | Spring 2018

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SILICON: 2018 EMBEDDED PROCESSOR UPDATE

Spectre and Meltdown: A new breed of vulnerability

By Curt Schwaderer, Editorial Director

The Spectre and Meltdown vulnerabilities have caused a big wave in the electronics industry as of late. What’s interesting about this vulnerability is that it takes advantage of microprocessor behavior – not an OS software bug or back door. Both of these vulnerabilities involve exploiting processor instruction pipelining, which makes them particularly nasty.

A brief overview of Spectre and Meltdown The Spectre vulnerability takes advantage of branch prediction characteristics of the CPU instruction pipeline. When a branch instruction is executed, running the calculation that determines the branch path in real-time would normally result in stall cycles in the instruction pipeline. To avoid these stall cycles, processors use branch prediction during idle cycles to assume the branch path before the actual branch calculation takes place.

If the prediction is right, cycles are saved.

If not, no harm – the processor executes the branched-to instructions.

With the Spectre vulnerability, however, security analysts from Google’s Project Zero team discovered that they could use this branch prediction procedure to read unauthorized data during program execution. So far, Spectre has been proven on Intel, AMD, IBM, and Armbased processors.

The Meltdown vulnerability similarly attacks optimizations in new CPUs by exploiting a race condition that exists

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between memory access and privilege checking during the instruction processing phase. Because most OSs map physical memory, kernel processes, and other userspace memory into the address space of every application under the assumption that privilege checks will prevent access to restricted memory regions, Meltdown essentially allows software applications to read data from unauthorized memory. In fact, the Meltdown vulnerability potentially allows access to all of a device’s memory!

Industry’s response and an inconvenient truth: Performance degradation These vulnerabilities have and are being addressed in a variety of ways. The most obvious way to eliminate the problem(s) is by eliminating the optimizations they exploit. Of course, there is a reason these CPU optimizations exist in the first place – they dramatically increase performance!

No matter how you “slice” things (excuse the pun), correcting these vulnerabilities is going to lead to a performance hit. And, since these optimizations and

Embedded Computing Design | Spring 2018

vulnerabilities are a function of the instruction set pipelining of the microprocessor, this performance hit will be more than just a chunk of code that can be fixed in an OS. So, in addition to the Spectre and Meltdown security fallout, the aftermath in terms of performance degradation will be equally significant.

Jim D’Arezzo, CEO at Condusiv Technologies and a 35-year veteran of the electronics industry with stints at IBM, Compaq, and Autodesk, has recognized that while the vulnerabilities were significant enough for chipmakers and OS companies to update their firmware, that isn’t where things end. Even after chip companies issued Spectre and Meltdown patches, steps still need to be taken to recover lost performance.

“PC World said Intel published some post-patch benchmarks showing a bestcase performance loss of 2-7 percent,” D’Arezzo says. “System responsiveness scores that measure common user pain points took a 14 percent hit. Web applications with JavaScript reported a 7-10 percent performance loss post-patch. www.embedded-computing.com

While these tests were performed on a SSD-based system and are less noticeable when using a traditional hard drive, the numbers are still significant.”

D’Arezzo goes on to correlate this CPU performance loss to business productivity.

“For the sake of argument, let’s [assume a] 5 percent loss for the average PC user,” he says. “5 percent of an hour is 3 minutes. An average office worker uses a computer about 4 hours per day. Let’s say the cost per hour [loaded] is $60.

Taking 12 minutes out of a day is $12 per day. For 126 million workers in the US, half being office workers, that’s $720 million per day!”

If you think this number is astounding for a worker using a computer 4 hours per day, consider an IoT application or web service with stacks of servers in the cloud running 24x7!

Reclaiming lost performance Considering these numbers, it’s perhaps just as important to consider how to gain

back the performance lost from vulnerabilities. Condusiv’s V-locity I/O reduction software is one way to deal with this.

V-locity software helps resolve I/O inefficiencies by utilizing existing system DRAM and two patented caching engines (“IntelliMemory” for read caching and “IntelliWrite” for write caching) to cache frequent read operations and optimize large, clean, contiguous read and write operations. This approach enables what D’Arezzo refers to as “Tier 0 caching,” as the V-locity software sets up DRAM for caching during idle processor cycles so that the CPU can still access memory when need be without the engines interfering. The same principle applies to both read and write operations, and the technology has been benchmarked at up to 15x faster than SSD alternatives. “[The IntelliMemory and IntelliWrite] engines increase performance by an average of 50 percent, with some results being as high as 10x initial performance,” D’Arezzo says.

Software solutions like V-locity provide an effective way to regain lost performance in desktop PCs, as well as virtual and physical servers that are critical for today’s IoT and cloud deployments. Depending on the application and environment, they may even be able to provide additional performance gains. The Condusiv website includes a “Time Saved” dashboard” and other helpful utilities that indicate where performance gains are to be had.

CPU engineering: Back to the drawing board?

The Spectre and Meltdown vulnerabilities represent a concerning and dangerous trend in unauthorized data access, which is likely to generate some re-thinking of CPU engineering and architectures as processor roadmaps evolve. While the nature of the vulnerabilities will have a greater impact on microprocessor optimizations that target desktops and the enterprise, embedded and IoT systems must also consider potential threats and performance losses to stay up and running properly.

A BREAKDOWN OF THE SPECTRE AND MELTDOWN VARIANTS

By Jamie Leland, Content Assistant The Spectre and Meltdown vulnerabilities were originally discovered by Jann Horn, a 22-year-old white hat hacker working for Google’s Project Zero security research team in Zurich, Switzerland. Horn identified three flaws in the CPU architectures of numerous Intel, Arm, and AMD processors, which he simply labeled Variant 1, Variant 2, and Variant 3. Each of these takes advantage of CPU data cache timing to leak information from virtual memory across local security boundaries during processor execution.

Variant 1 (Spectre): Bounds check bypass In many modern processors, branch prediction is used to reduce memory latency during program execution. In doing so, the processor speculatively loads uncached data prior to branch execution, which is classified as an out-of-bounds read.

Normally this does not matter because the processor rolls back to a non-speculative execution state once the branch has executed so that the speculative instructions do not affect registers or other operations.

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However, Variant 1 reveals that when various arrays are uncached and all other accessed data is cached in certain branch prediction code patterns, a hacker could use this out-of-bounds check bypass to compare the time required to load data located in L1 cache during speculative and non-speculative execution states. This information can then be used to determine whether the value of that data is a 0 or a 1.

Variant 2 (Spectre): Branch target injection Variant 2 reveals that it is possible for different sets of code operating in different security contexts to influence each other’s branch prediction, which an attacker could leverage to redirect execution code and leak data into cache.

For example, after identifying code containing an indirect branch with a target address located in memory, an attacker could flush the cache line containing that address out to main memory. When executing, the processor will therefore have to load the complete cache in order to calculate the true destination address of the branch. During

this time, which typically consumes a few hundred clock cycles, the CPU will continue to execute speculative instructions based on branch prediction. Operations that occur in this window can be reverse engineered to leak data into the cache.

Variant 3 (Meltdown): Rogue data cache load Variant 3 attempts to read kernel memory from userspace by exploiting permissions checks for address access that could have a significant impact on CPU performance. In cases where an address might not be on the critical path for reading data from memory to a register, memory could provide the results of a memory read to ensuing instructions immediately and conduct asynchronous permissions checks later to maintain performance. A flag in the reorder buffer will raise an exception if the asynchronous permissions check fails, but an attacker can widen this window using a high-latency mispredicted branch.

Further details on the Spectre and Meltdown vulnerabilities can be found at https://googleprojectzero.blogspot.com.

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SILICON: 2018 EMBEDDED PROCESSOR UPDATE

Now is the time for eFPGA technology

By Anil Parchuri, Quicklogic and Rakesh Jain, Mentor, a Siemens Business

Embedded FPGA (eFPGA) technology is not a new idea. In fact, it has been implemented in various forms for several decades.

So why is it suddenly getting so much attention? The answer lies at the intersection of two fundamental economic trends within the semiconductor industry.

D

evelopment costs have been going up dramatically with each new process generation. These are driven by the increasing complexity of both the abstract designs themselves as well as the physical implementation of those designs in an actual system-onchip (SoC) device and include items such as software tools, engineering time, and mask costs.

Conversely, the cost per unit of functionality in these devices has been going down. For example, 20 or 30 years ago, FPGA gates were relatively expensive so FPGA devices tended to be used for prototyping and pre-production rather than high-volume, mass-production applications. Trying to add FPGA gates to an ASIC generally increased the overall die size and complexity to the point where

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the new hybrid device would become too expensive to be practical. Now that is no longer true.

Instead, the high cost involved in SoC design has increased the risk associated with not having quite the right product to meet a particular market need, and the relatively low cost of FPGA gates has meant that embedding FPGA technology to gain a degree of design flexibility (thus reducing market risk) makes economic sense.

The benefits of eFPGA technology Beyond resolving the challenges created by those two key economic trends, however, an eFPGA-based design approach offers many other potential benefits.

For example, by placing eFPGA IP on the same piece of silicon as other

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functional blocks in an SoC, it can have low power, low latency, and very high bandwidth connection to the rest of the design. The result is that an ASIC with an embedded FPGA block can have lower power, higher performance, lower cost, and consume less board space than an ASIC plus discrete FPGA solution, while still maintaining design flexibility.

Another advantage of an eFPGA is that the reprogrammable nature of the FPGA enables the design team to easily adapt their SoC to new, rapidly changing, or slightly different market requirements post-manufacturing, and thus extends the productâ&#x20AC;&#x2122;s time in market and increases revenue, gross margins, and overall profitability. Examples of when SoC-witheFPGA can be especially effective include quickly supporting new or evolving interwww.embedded-computing.com

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face standards, adding a new feature to rapidly address an emerging competitive threat, or cost-effectively creating multiple product variants for highly fragmented markets such as the IoT. Finally, adding eFPGA technology to an SoC design can increase the overall design performance while simultaneously reducing total power consumption.

Some functions are more performance or power efficient to implement in FPGA logic, especially if they would otherwise require the flexibility of an on-chip processor as is found in most SoC designs today. Also, by employing the reprogrammable aspect of most embedded FPGA technology, design engineers can create hardware-based solutions that can be reconfigured to adapt to the problem at hand, further increasing design performance and reducing power consumption.

Implementation considerations To most efficiently gain the benefits of embedding FPGA IP, design teams must consider various aspects of their eFPGA implementation. The first consideration is the quality of the integration between the synthesis tools and the rest of the

FIGURE 1

design flow. A synthesis tool should explicitly support the eFPGA architecture and should be able to generate an optimal design netlist for efficient design implementations. For example, QuickLogic collaborated with Mentor to provide a design and development environment for its eFPGA technology – specifically, Mentor’s Precision Synthesis software, which has been optimized to support the QuickLogic ArcticPro architecture used in the company’s eFPGA IP. Synthesis plays a key role in the design process as it has the most impact on the quality of result (QoR) of a design. A QoR metric is multi-dimensional – it may be a function of frequency, area, and power, depending on user’s design requirements. It is important for the synthesis tool to have current support for industry-standard HDL languages such as Verilog, SystemVerilog (SV2009), and VHDL (VHDL-2008) to allow flexibility for design entry. And, for best QoR, a synthesis tool must have an in-depth knowledge of the target architecture to optimally map to the resources available in the architecture.

The second consideration in the design flow is the quality of the software for the eFPGA implementation itself, as it will ultimately determine the efficiency, performance, and cost of the SoC device. FPGA architectures and their associated development tools tend to co-evolve, as changes in one can have dramatic effects on the other. Thus, companies who have shipped millions of units of FPGAs and have decades of experience developing the software used to provide design support for those devices in thousands of real-world applications are much more likely to provide good eFPGA IP/software solutions.

In some cases, experienced FPGA vendors also have learned how to effectively integrate eFPGA technology into their own SoC devices, which has allowed them to further refine their eFPGA IP offering by acting as their own customer for the technology. For example, QuickLogic has developed a sensor processing SoC for hearable, wearable, and IoT applications (Figure 1). This device includes eFPGA technology as the company has learned that having a programmable block of logic enables their

EOS S3 Sensor Processing Platform block diagram

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Embedded Computing Design | Spring 2018

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SILICON: 2018 EMBEDDED PROCESSOR UPDATE

customers to quickly implement new sensor processing algorithms and interface standards.

applications that suddenly appear can also be addressed without the time and cost associated with redesigning an ASIC.

As users of the eFPGA tools themselves, QuickLogic engineers quickly learned what tools they needed and how to best optimize the eFPGA implementation design flow. Along the way, they encountered various issues and resolved them, ultimately creating the complete suite of tools and design files necessary for successful eFPGA IP integration.

BEYOND RESOLVING THE CHALLENGES CREATED BY THOSE

Some of the files generated by these tools include the device wrapper file, back annotation files, and layout data.

The device wrapper file is a netlist that defines the eFPGA “black box” ports and how they are connected to the rest of the SoC design. The back annotation files provide library and timing information that are critical to the design verification process. The layout data includes the physical layout information, which the design team can use to instantiate the physical design blocks.

Uses of eFPGA in AI, IoT, security, and other applications SoCs are obviously used for a wide range of applications, and adding embedded FPGA technology only expands the potential set of use cases. However, there are some examples of applications in which SoC-with-eFPGA solutions offer significant advantages over traditional SoCs. We have already reviewed sensor processing, in which the embedded FPGA portion of the EOS S3 SoC enables rapid sensor algorithm and interface updates to be implemented without having to tape out a new version of the device.

Voice processing with associated cloudbase AI is the next big step forward in human-machine interaction and having the ability to quickly and easily add new trigger words for ecosystems supporting “smart speaker” products such as Amazon’s Alexa.

The highly fragmented IoT market is another good example of where eFPGA technology can provide a substantial benefit. The overall market is huge, but multiple product variants are needed to address specific applications. New

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TWO KEY ECONOMIC TRENDS, HOWEVER, AN EFPGA-BASED DESIGN APPROACH OFFERS MANY OTHER POTENTIAL BENEFITS. FOR EXAMPLE, BY PLACING AN EFPGA IP ON THE SAME PIECE OF SILICON AS OTHER FUNCTIONAL BLOCKS IN AN SOC, IT CAN HAVE LOW POWER, LOW LATENCY, LATENCY, AND VERY HIGH BANDWIDTH BANDWIDTH CONNECTION TO THE REST OF THE DESIGN. Nearly any machine learning application including big data and deep learning can take advantage of the reconfigurable nature afforded by most eFPGA solutions.

Hardware in the eFPGA block can be configured and then reconfigured as often as necessary to cheaply and efficiently solve some of the most complex problems addressed by computers today.

Another good example, and one especially relevant now, is the need to constantly update hardware-based security algorithms. As new security vulnerabilities or breaches are identified, delivering an updated defensive solution becomes time critical – a perfect fit for the eFPGA hardware in an SoC. The future of eFPGA technology Given that the development and unit cost trends will make embedded FPGA technology evermore attractive to SoC design teams, the future of eFPGA IP is extremely bright. As with every complex technology, though, there are some challenges. Among these is that one size does not fit all and there are many, many possible combinations of eFPGA IP architectures, sizes, and technologies, along with SoC implementations across different foundries and process nodes. There are also potential integration issues associated with the need for differing numbers of metal layers, managing clock domain boundaries, and coordinating different power management schemes.

Even though eFPGA technology has been available in various forms for some time now, the market is just now moving from the early adoption phase to the mainstream phase. This trend will only accelerate in the near term. Example applications and end products are becoming easier to find and range from mobile devices, hearables, wearables, and IoT to big data and communication centers to reconfigurable computing platforms to cloud-based AI. However, eFPGA technology will be successful only when the programmable logic is integrated efficiently within the SoC. That requires the right combination of technology, architecture, and software tools so that the development teams have a complete and effective design flow enabling them to move seamlessly from concept to working silicon to post-manufacturing with a market-tuned and ready-to-ship product.

Anil Parchuri is Software Product Manager at QuickLogic Corporation.

Rakesh Jain is Product Manager, Calypto Systems division, at Mentor, a Siemens business.

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BY ENGINEERS, FOR ENGINEERS In the rapidly changing technology universe, embedded designers might be looking for an elusive component to eliminate noise, or they might want low-cost debugging tools to reduce the hours spent locating that last software bug. Embedded design is all about defining and controlling these details sufficiently to produce the desired result within budget and on schedule.

Embedded Computing Design (ECD) is the go-to, trusted property for information regarding embedded design and development.

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SOFTWARE: 2018 RTOS UPDATE

Is FreeRTOS the future of embedded operating systems?

By Brandon Lewis, Technology Editor

The release of Amazon FreeRTOS generated considerable excitement in the IoT market. But outside of another victory for free and open source software, what does this say about the overall direction of software engineering, if anything?

R

ichard Barry developed the original FreeRTOS kernel in 2003. The OS was immediately successful as an alternative for MCU vendors who preferred not to favor – or support – one commercial software platform over the myriad others.

For users, of course, the major benefit of FreeRTOS can be found in its name.

Rather than building their software foundation from the ground up, FreeRTOS provides an open source option supported by 35 different processor architectures and a migration path to commercial-grade (OpenRTOS) and safety-critical (SafeRTOS) variants.

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At its core, however, FreeRTOS remains a multi-tasking kernel that relies on other middleware to provide functionality beyond managing CPU resources.

Over time, the open source community has therefore added functionality to the kernel through various APIs and modules, such as TCP/IP stacks. But perhaps the biggest boost for FreeRTOS came last year, when Amazon hired Barry and assumed responsibility for the OS. Shortly thereafter, Amazon FreeRTOS was announced.

that help IoT devices securely connect to the cloud. These libraries include utilities for configuring devices to local Wi-Fi or Ethernet networks, over-the-air (OTA) update features, data encryption and key management, and connectors to AWS services such as Greengrass and IoT Core. A few minor tweaks (such as the addition of stream buffers) have been made to the original kernel so that integrating these offerings is more seamless. But, at the end of the day, Amazon FreeRTOS is essentially still FreeRTOS.

Amazon FreeRTOS: Drivers & direction Amazon FreeRTOS extends FreeRTOS through a litany of software libraries

According to Roy Murdock, Analyst for IoT and Embedded Technology at VDC Research, Amazon’s selection of

Embedded Computing Design | Spring 2018

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FreeRTOS over other commercial and open source options came down to numbers. “The driving factor for Amazon is they really want to get into as many sockets as possible,” Murdock says.

“In terms of unit share, [FreeRTOS is] definitely one of the leaders in the market right now. It’s in the top five of the OS distributions that we track,” Murdock continues. “We do see sustained growth for FreeRTOS, and we tag that around the growth rate of the MCU market, which is approximately 8 percent over the next five years.

“Amazon went with FreeRTOS because they don’t need to make any money,” he says. “They don’t need to have a commercial OS provider in the space.

For them, it’s not about the margin; it’s not about generating revenue from licensing an OS.” As mentioned, one factor that has propelled FreeRTOS to its current market position is broad adoption amongst industry vendors. For instance, FreeRTOS (and subsequently Amazon FreeRTOS) is supported by Microchip’s PIC32MZ EF family of MCUs and its corresponding MPLAB software ecosystem. MCUagnostic development tools like IAR Embedded Workbench also provide RTOS Awareness plugins that help tune the environment to FreeRTOSspecific variables.

Open source challenges for a new breed of developer Despite the advantages of FreeRTOS, it still comes with drawbacks for developers simply because of its open source nature. Indeed, there are reasons that commercial RTOSs still exist, and chief among these is probably support. TCP/IP stacks, for example, can be complicated to bring up on resource-constrained IoT devices due to their limited amount of RAM. Beyond that, integrating large amounts of external code into an application that must be managed over time is a common oversight in early stages of development that can be costly during production.

Still, as one RTOS industry expert states, “downloading ‘stuff’ from the Internet … is probably the new normal.” And given www.embedded-computing.com

the growing number of non-embedded app developers entering the IoT, there is bound to be a learning curve.

Hugo Fiennes, CEO and Co-Founder of IoT platform and services company Electric Imp, cautions this type of engineer that “If you’re paying, you get support. If you’re not, you’re on Stack Exchange and forums trying to figure things out.”

Referencing a blog post on the challenges of simply managing a git repository, Fiennes stresses the need for these developers to “focus on the value of connected applications versus fixating on the technology. The ‘why’ versus the ‘how.’”

To enable this mindset, Electric Imp offers what Fiennes calls a “managed OS.” “The key advantage of a managed OS is it being managed [by a third party],” Fiennes says. “This means a customer can write and ship their application on top of impOS, and when it is featurecomplete and debugged they can essentially abdicate responsibility for ongoing maintenance and patching.

This allows them to work uninterrupted on future products.

“On our side, we maintain a single version of impOS that runs on every target and within every customer device,” he continues. “We run literally thousands of individual system tests on our platform constantly and monitor for regressions in functionality, performance (both latency and power), and memory to ensure we are maintaining our API contracts with our users. This extensive automated testing also gives us confidence that we can quickly develop and deploy patches to ensure the security of our customer’s devices.

The impOS provides a cloud-based virtual machine (VM) that runs application code, which decouples customer software from hardware and basic utilities.

Using security as an example, Fiennes notes that Electric Imp migrated their platform from TLS 1.0 to TLS 1.2 EllipticCurve Diffie-Hellman (ECDH) cryptography a couple of years ago without customers having “to lift a finger.”

“It’s certainly true that traditional developers are uncomfortable with the idea of an OS that essentially provides a Linux-like

userspace for their code, abstracting away all hardware access through its APIs,” Fiennes says. “However, the world has changed with IoT. Do we really expect every company, however big or small, to develop their own security infrastructure?

Is every team going to be given the time and money to do things right from the start and still be able to produce updates for decades-old products when the next Heartbleed or KRACK is discovered?

Do they want to go through UL 2900-2-2 cybersecurity certification for every product, or would they prefer to leverage a platform’s certification?”

A new approach to development Companies like Amazon and Electric Imp are embracing the reality that the engineering world of today is more about solutions than technology. As infrastructure companies this means they must address each level of the IoT solutions stack, from devices to the cloud.

In the case of Amazon, Murdock realizes that the company’s stewardship of FreeRTOS means there is no software left for them to acquire. As a a result, there is only one place left to go.

“The next step [for Amazon] if they want to go further down the chain is to get into hardware,” Murdock says. “That’s something that you would think to yourself, ‘Why would a company want to get into hardware with all this consolidation going on and margins shrinking?’ But Amazon doesn’t care about any of that, do they?

They just want to control everything, from the bottom to the top of the stack.”

In memory of James Ready 7-29-49 – 12-21-17 This article is dedicated to Jim Ready, Founder of Ready Systems and MontaVista Software; pioneer of embedded and real-time Linux; and arguably the progenitor of commercial real-time operating systems.

One of Jim’s mantras was “You never stop learning.” This belief is evident in his countless contributions to open source, embedded, and networking software that so many of us take for granted. His innovations will be leveraged further into the future than we can imagine. And with them, his memory.

Embedded Computing Design | Spring 2018

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STRATEGIES: EMBEDDED DEVELOPMENT KITS

Mind the gap: Going from reference board prototype to production system

By Erik Welsh and Gene Frantz, Octavo Systems

Once you have your idea for an amazing, innovative product, building a quick prototype is not the challenge. The challenge is creating a high yield, high quality, and highly valued design.

T

he market is filled with evaluation and development boards that have capabilities such as wireless communications, high-performance processors, high-speed memory, power management systems, and complex analog peripherals. Additionally, there are many open source communities and tons of available reference code that allow design engineers to minimize development time while optimizing the features of their product.

However, an embedded systems designer needs to look beyond just the prototype at how it will be transformed into a sellable product. The path from prototype to a production-worthy design is not as simple as one might expect.

Early decisions about components can

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save significant opportunity cost when designing and manufacturing a commercial product down the line.

Product after prototype: Keeping an eye on the prize Once a prototype is complete, the challenge for the embedded design engineer becomes how to quickly convert the prototype into a commercial product. This requires generating a set of schematics and layout that can be manufactured within the productâ&#x20AC;&#x2122;s size and mechanical design constraints.

The quick answer is to turn to a development boardâ&#x20AC;&#x2122;s specs online and get started with it as the basis for the product design, right?

Unfortunately, when using a development board as a reference design, embedded designers may not be aware of some of the pitfalls associated with replicating that design in a commercial product. First, not all development boards have open schematics and layout. Second, it may be difficult for smaller companies to procure parts for their production designs since they might not meet minimum volume requirements. Even if parts are procurable and the reference files are freely available, errors and inefficiencies in development board designs often carry over into production systems. Add to this the time and engineering skill required to work with complex

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the price of your home. Similarly, spending the time to become an expert in some routing tasks does not add value to an end product. Instead, designers need to be spending time adding unique value rather than redoing complex routing tasks.

Beyond the traditional schematic and layout expenses, the cost of manufacturing these complex boards can also increase exponentially if care is not taken during the initial product design. For instance, sourcing components that don’t fit within traditional pick-and-place or reflow manufacturing processes can be pricey.

With all of these factors in mind, embedded design engineers evaluating a development board should consider: 1. What the development board is not: › What are the dimensions and shape of your final product? › What set of components will your product use? › What is the optimal number of PCB layers for your product? › What is the best set of design rules for your product?

2. What the production design needs to be: › The right form factor (form, fit, and function) › The right set of components (in terms of specification, availability, and cost) › Producible in your volumes with high yields and minimal cost › Testable and repairable

layouts, and a significant amount of talent can be squandered on issues that add little value to an end product.

For example, most connected embedded systems need the software capabilities provided by Linux, which requires powerful processors, high-speed memory, and sophisticated power management. Plenty of development boards have these features, but this integration may have to be laid out from scratch when designing a production system.

Laying out a PCB for the DDR memory and processor alone requires matching 30 to 40 DDR signals to ensure that timing and impedance specifications are met. This is a tedious and often time-consuming task, but just having a working DDR interface doesn’t differentiate a product.

Think of the aforementioned processor and memory interface task like good electrical wiring in a house – you need it, and you would not be able to sell a house without it, but it adds no value to www.embedded-computing.com

Integrating value in commercial products One solution to some of the problems highlighted has been around for a while: system on modules (SoMs). SoMs mimic the core functionality of a development board by integrating some of its components into a single module, which simplifies many design challenges up front. However, manufacturability with SoMs can be non-standard, adding special handling and costs.

Fortunately, there is a better bridge between reference boards and production: systemin-package (SiP) devices. SiPs combine a number of ICs in one highly compact module that functions as a single integrated unit. They utilize advanced IC packaging technology to create building blocks for design engineers, which can include components such as high-end DDR memory, multicore processors, power management systems, discrete logic, sensors, and hundreds of passives. Any number of devices from any silicon process can be incorporated into a small, complete, ready-to-use subsystem.

Instead of building with raw plastic chips, design engineers can now use Legos.

SiP technology was born out of the overwhelming success of Moore’s Law, which has allowed semiconductors to be produced that are less expensive, higher performance, and dissipate less power. Simultaneously, however, Moore’s Law has also created a world in which no one semiconductor manufacturing process works best for all types of components. For example, high-performance, high-density silicon processes work well for microprocessors and memory, but are not as effective for sensitive analog components or MEMS devices. This is one of the drawbacks of system on chips (SoCs), as they must compromise on a single silicon process.

SiPs: A new era of ICs Beyond being able to integrate ICs and passive components from different silicon processes that would be impossible to create on a single wafer, SiP devices offer many tangible benefits when moving from a prototype to a production design.

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STRATEGIES: EMBEDDED DEVELOPMENT KITS

First and foremost, SiP devices remove complex, mundane, non-value-add design tasks. Similar to SoMs, SiPs integrate components at the heart of a system such as the processor, high-speed memory, and power management. But SiP technology takes this integration to the next level as devices that have the same look and feel as a standard IC, just with better signal integrity, lower power consumption, and a smaller, connector-less form factor than you get with a bulky module. By removing complex routing and power management from the system design, SiP devices also reduce the number of PCB layers required in a given design.

Another benefit of SiPs is manufacturability. Given that a SiP device looks like a standard packaged IC, it fits well within low-cost pick and place or reflow manufacturing processes. As mentioned, SiPs can integrate hundreds of discrete components, which reduces manufacturing time and the cost of products. In addition, the ability to integrate passives enables single-sided designs for complex microprocessors that would otherwise have to be placed directly under the device.

LAYING OUT A PCB FOR THE DDR MEMORY AND PROCESSOR ALONE REQUIRES MATCHING 30 TO 40 DDR SIGNALS TO ENSURE THAT TIMING AND IMPEDANCE SPECIFICATIONS ARE MET. THIS IS A TEDIOUS AND OFTEN TIME-CONSUMING TASK, BUT JUST HAVING A WORKING DDR INTERFACE DOESN’T DIFFERENTIATE A PRODUCT. Finally, SiPs simplify the supply chain.

Sourcing components in small quantities at a reasonable cost can be a real headache as a design moves to production, while trying to guarantee availability hundreds of components at the time of manufacture can be a daunting task.

Using a SiP, sourcing is already done.

Instead of worrying about the lead time of a hundred components, you now only have to worry about the lead time of one. Although this might not be a huge advantage for design engineers, operations people will thank you.

Make the most of Moore’s Law when moving from prototype to production While the performance, features, cost, and community support of a development board can be attractive, choosing the right devices for your end solution first will ease your path to a successful product. The best of the best processor, memory, analog, and power technology for a given design can be leveraged in integrated packages that take full advantage of Moore’s Law, so why compromise?

So, the next time you are looking for a development board, ask yourself, “Does it have a SiP?” Erik Welsh is Applications and Systems Manager at Octavo Systems.

Gene Frantz is Co-Founder and Chief Technology Officer at Octavo Systems.

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2018 DEVELOPMENT KIT ROUNDUP Company Name Model Number

Advantech Corp.

SOM-DK5992-00A1

Avnet AES-ATT-M14A2A-IOT-ADD-G

Critical Link 80-001005

DFI Inc. EC800-AL

Digi International XK3-Z8S-WZM

Digilent 6003-410-017

EMAC Inc. DEV-07-IMX6

Future Electronics AVMPF300TS-02-NA

EW Booth No.

Product Description The SOM-DK5992-00A1 is an evaluation kit for the COM Express R3.0 Basic Module, Type-7 pinout with an Intel Xeon D-1548 processor.

2-138

The LTE IoT Add-on Kit enables developers to add cellular LTE connectivity to development platforms like Raspberry Pi. Utilizing AT&T’s 4G LTE network, it includes all connectivity elements for collecting sensor data, connecting to AT&T’s network, and utilizing cloud services for the management, storage, and analytics of connected IoT devices.

1-370

The MitySOM-5CSX Embedded Vision Development Kit (VDK) for Basler dart BCON cameras is a complete hardware and software framework designed to accelerate the development of vision applications.

N/A

DFI’s Intel Atom Processor E3900-based EC800-AL fanless embedded system supports three high-resolution displays, three expansion slots (two M.2 and one Mini PCIe), -40 – 70°C operating temperature, and rich I/O ports for factory, IoT gateway, and digital signage applications.

1-521

The Digi XBee3 ZigBee Mesh Kit offers a great way to learn how to use Digi XBee3 RF modules for device connectivity and ZigBee-based mesh networking. ZigBee is one of the most popular open standard mesh networking protocols, specifically designed for low-data rate and low-power applications.

3-518

Featuring a powerful Xilinx Zynq 7020 APSoC and peripherals such as HDMI, Ethernet, USB, and Audio; PYNQ-Z1 is a board that was developed to combine the productivity of the Python programming language with the hardware-programmable capabilities of the Xilinx Zynq architecture.

3 / 3-610

The PPC-07-iMX6 development kit includes all the hardware and software needed to boot into a Linux-based operating system and start making your next product vision a reality. EMAC OE Embedded Linux is shipped with the kit, including complete driver support for the hardware.

N/A

The Avalanche Board allows developers to quickly prototype for the lowest power mid-range FPGA platform on the market.

At its heart is a 300K LE PolarFire non-volatile FPGA from Microsemi.

The PolarFire FPGA family is a cost-optimized, low-power, mid-range density FPGA family with proven security and exceptional reliability.

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Embedded Computing Design | Spring 2018

23

2018 DEVELOPMENT KIT ROUNDUP Company Name Model Number

Gateworks Corporation GW11036

Gumstix, Inc. Overo Conduit LoRa Gateway Kit (434 MHz)

Harwin DEV-001

Infineon Technologies AG KIT_AURIX_TC275_ARD_SB

ISSI

The GW11036 dev kit offers a quick start with Android on Gateworks Ventana SBCs. The kit includes a 7-inch TFT-PCAP touchscreen with aluminum bezel; GW5224 SBC with a quad-core NXP i.MX6 CPU; 1 GB DRAM; 2 GB Flash; Ethernet; GPS; two Mini-PCIe sockets; Wi-Fi; Bluetooth; and HDMI.

N/A

With the Gumstix Overo and the RHF0M301 gateway module, the Overo Conduit can deliver long-range communications over LoRaWAN between the Internet and LoRa devices. The included Overo AirSTORM-Y incorporates the TI WiLink8 Wi-Fi/Bluetooth module for further connectivity.

N/A

The Spring Contact Development Kit is the ideal prototyping kit for customers using SMT Spring Contacts. Containing 16 different contacts in strips of Tape and Reel, the kit is an easy reference library.

Engineers can immediately try out one or more of the contacts by keeping this kit on hand.

3-660

The ShieldBuddyTC275 is the smallest AURIX development board, and is hardware with the Arduino UNO R3 platform. The Hitex ShieldBuddyTC275 includes the Infineon TC275 32-bit multicore processor and is interoperable with the hundreds of Arduino application shields that are available.

3A-231

The IS31FL3741 is an RGB matrix LED board for evaluating the IS31FL3741 LED driver that supports 117 RGB LEDs.

IS31FL3741

Ka-Ro electronics NEW Ka-Ro TXULL Module

KAMAKA Electronic Bauelemente Vertriebs GmbH AEM10940 Evaluation Board

Microchip Technology Inc. Secure AVR BLE IoT Node (ATAVRBLE-IoT) ®

24

EW Booth No.

Product Description

Embedded Computing Design | Spring 2018

N/A

The Ka-Ro TXULL SOM features the NXP i.MX 6ULL at speeds up to 792 Mhz, providing high performance and low power at industrial temperatures. It is ideally suited for IoT, industrial, and medical devices, and includes support for Linux and Microsoft Windows Embedded Compact 7. Ka-Ro guarantees 10-year availability.

4A-320

The AEM10940 Evaluation Board is a PCB assembly featuring all components needed to evaluate the e-peas AEM10940 IC. The board allows you to test the AEM10940 and analyze its performance in a laboratory-like environment.

4A-324

The Secure AVR BLE IoT Node incorporates the key elements of an IoT design (wireless connectivity, a controller, and security) into a compact, easy-to-use board. Using the integrated 3-axis accelerometer with temperature sensor, anyone can quickly prototype a complete IoT solution on a single board.

1-500

www.embedded-computing.com

2018 DEVELOPMENT KIT ROUNDUP Company Name Model Number

Microsemi MPF300-SPLASH-KIT-ES

MSC Technologies MSC C6-SK-KLH-EV-KIT001

Neurotechnology FingerCell SDK

Newark element14 6100023_US

Nutaq PicoLTE 4x4-E

NXP Semiconductors i.MX RT1050 EVK (MIMXRT1050-EVK)

Octavo Systems OSD3358-SM-RED

ON Semiconductor IoT Development Kit (IDK)

EW Booth No.

Product Description Microsemi’s PolarFire Splash Kit provides common interfaces for evaluation and development of embedded designs. The kit connections include Gigabit Ethernet RJ45, PCIe, USB, and an LPC FMC connector.

A PolarFire 300K LE FPGA along with on-board DDR4 and SPI-Flash memory enable general-purpose evaluation.

1-431

The MSC C6-SK-SLH-EV-KIT001 is a ready-to-run Starter Kit for COM Express Type 6 modules based on the Intel Skylake H and Kaby Lake H CPUs. It is ideally suited for evaluation purposes, software development, and for prototyping of Type 6 applications. It is based on a Mini-ITX carrier board.

2-238

The FingerCell fingerprint identification technology is designed for embedded biometric systems developers and features a compact, sensor-independent, and cross-platform fingerprint recognition algorithm. It offers decent performance on various embedded devices based on low-power microcontrollers or processors.

N/A

The SimpleLink Sub-1 GHz Sensor-to-Cloud Linux Industrial Gateway development kit allows developers to get to market faster with an out-of-the-box, end-to-end solution enabling easy cloud connection for sending and receiving long-range sensor data while maintaining a robust link.

1-370

Test NB-IoT and Cat-M1 in real-time on all frequency bands with the PicoLTE IoT, an eNodeB and EPC that supports Cat-M1 and NB-IoT devices. The board is compliant with 3GPP LTE release 13, suitable for radiated and conducted environments, supports FDD and TDD, and can connect to multiple eNodeBs.

N/A

The i.MX RT1050 EVK is a four-layer through-hole USB-powered PCB. At its heart lies the i.MX RT1050 crossover processor, featuring NXP’s advanced implementation of the Arm Cortex-M7 core. This core operates at speeds up to 600 MHz to provide high CPU performance and best real-time response.

4A-220

Tne SiP on this Reference, Evaluation, and Development (RED) board for the OSD335x-SM devices integrates a 1 GHz TI Sitara ARM AM335x processor, DDR3 memory, two power supplies, and more than 100 passives in a single easy-to-use package. The board includes sensors along with a BeagleBoard.org compatible Debian Linux distribution.

3A-630

With multiple energy-efficient wired, wireless connectivity, sensing, actuation and cloud connectivity options, the IoT Development Kit (IDK) from ON Semiconductor provides designers and engineers a flexible, node-to-cloud platform to rapidly prototype IoT solutions targeting various verticals.

4A-260

Continued on next page

www.embedded-computing.com

Embedded Computing Design | Spring 2018

25

2018 DEVELOPMENT KIT ROUNDUP Company Name Model Number

Powercast Corporation P1110-EVAL-01 Wireless Power Development Kit for Battery Recharging

PowerFilm Solar Inc. LES100

Qualcomm Technologies Inc. DragonBoard™ 410c Development Kit

Reality AI SK-001

Renesas Electronics America YSAECLOUD1

Saelig Co. Inc. SCP-R2801

SEGGER 6.30.00

Sigasi nv Sigasi Studio

26

Embedded Computing Design | Spring 2018

EW Booth No.

Product Description The Powerharvester evaluation board includes tools for designing power-over-distance devices that can recharge up to 80 feet overthe-air using RF energy, including two FCC-approved transmitters, two receiving antennas, battery-recharging boards in smart watch and smart card shapes, two BLE radio boards, and power adaptors.

N/A

Fully powered by PowerFilm's low-light indoor solar modules, the LES100 collects data from a variety of sensors and sends it to the cloud via BLE. This development kit is meant to be the first building block of any wireless IoT sensing project or idea.

N/A

The DragonBoard 410c based on the 64-bit Qualcomm Snapdragon 400E processor features advanced processing power and Wi-Fi, Bluetooth, and GPS connectivity in credit card-sized development board. It is designed to support rapid software development, education, and prototyping in compliance with the 96Boards CE Edition specification.

4A-330

The SK-001 starter kit enables projects ranging from wearables to predictive maintenance to collect data quickly and exploit that data using artificial intelligence. Reality AI tools generate detection code that can be incorporated into our customer’s products, running at the edge on inexpensive, commodity hardware.

N/A

The Renesas Synergy AE-CLOUD1 Application Example for Cloud Connectivity is designed to allow the user to connect to Renesas IoT Sandbox and Synergy Enterprise Cloud Toolbox to build cloud-based IoT solutions.

1-310

Sol Chip Pak Power Modules are examples of the patented Sol Chip Saturn solar cells that offer 24/7 functionality by combining state-of-the-art solar cells, a rechargeable battery, and advanced power management circuitry. They harvest energy even from room lighting, providing stable voltage to a load.

N/A

This feature rich Cortex-M4 evaluation kit ships with a free-for-noncommercial-use SEGGER IDE and object code, as well as Embedded Studio, embOS RTOS, emFile file system, emWin graphics library, emUSB Host and Device, and the TCP/IP stack embOS/IP. These enable full use of the available emPower peripherals.

4-238

The Sigasi Studio entry tool drastically improves hardware design productivity by helping write, inspect, and modify digital circuit designs in the most intuitive way. Advanced features such as intelligent autocompletes and code refactoring make VHDL and SystemVerilog design easier and more efficient.

4-560

www.embedded-computing.com

2018 DEVELOPMENT KIT ROUNDUP Company Name Model Number

Silicon Labs SLTB004A

Silicon Radar GmbH SiRad Easy

Sundance Multiprocessor Technology Ltd. EMC2-ZU4/EV

Technologic Systems TS-8550-4900

Texas Instruments CC3220SF-LAUNCHXL

TOI srl 4zerobox

u-blox C030 App Board / NB-IoT and 2G/3G Mbed Enabled IoT starter kit

WISER Systems, Inc. WISER Locator Evaluation Kit

www.embedded-computing.com

EW Booth No.

Product Description The Silicon Labs Thunderboard Sense 2 is a complete sensorto-cloud development kit providing all the hardware and software needed to create battery-powered wireless sensor nodes for the IoT. The kit combines a broad range of sensors with the powerful multi-protocol EFR32 radio and a Bluetooth and cloud connectivity mobile app.

4A-128

SiRad Easy is a high performance evaluation system for miniature radar sensors including target recognition and Wi-Fi connectivity.

It consists of radar frontends for 24 GHz and 122 GHz and a ST-Nucleo64 microcontroller board. A graphical user interface for parametrization and with multiple visualization modes for radar data is included.

N/A

The EMC²-ZU4/EV is the first and only PCIe/104 OneBank SBC with a Xilinx Zynq UltraScale+ SoC and a VITA57.1 FMC LPC connector. The EMC²-ZU4 equips ARM Cortex-A53 CPUs combined with traditional FPGA logic, plus high-speed I/O interfaces.

The ZU4/EV is dedicated to vision and AI applications.

N/A

The TS-8550-4900 is based on the NXP i.MX6 CPU, which uses the ARM Cortex-A9 architecture. Several industry-standard interfaces and connections such as Gigabit Ethernet, Wi-Fi and Bluetooth, USB, SATA II, PCI Express, and more make it a great fit for nearly any embedded systems application.

N/A

The SimpleLink Wi-Fi CC3220SF LaunchPad kit features single-chip wireless MCU with 1 MB Flash, 256 KB of RAM, and enhanced security features. The CC3220SF-LAUNCHXL features on-board emulation and sensors for an out-of-the-box experience. The CC3220SF offers IoT network security, empowering developers to easily connect any application to the cloud using multiple communication protocols.

3A-129

4zerobox is a modular toolkit for developing Industrial IoT solutions.

It is based on the Espressif Systems ESP32 and programmable in Python using Zerynth, which allows rapid integration with industrial sensors, actuators, and cloud services like AWS, Google IoT, Microsoft Azure, and IBM Bluemix.

N/A

The C030 starter kit is an out-of-the-box rapid prototyping solution for IoT applications that supports LPWA cellular technologies such as NB-IoT, 2G, and 3G. The board is powered by an integrated Arm Mbed-compatible Corte- M4 CPU with 1 MB Flash and 256 kB RAM, leaving ample space for software development and debugging.

3-139

WISER's autonomous, ultra-wideband real-time asset tracking system can be implemented right out of the box. With wireless calibration, location-based data, and submeter accuracy, this kit can scale to meet the needs of any type or size of installation.

N/A

Embedded Computing Design | Spring 2018

27

Embedded Computing Design

Dev Tools and OSs

Arm software and tools for safety and security Creating safety or security critical applications requires more than just applying a software development process to an existing code base. Security and safety requirements have a major impact on the implementation of an application. Arm provides a comprehensive set of software building blocks and development tools that help you to create secure, robust applications.

The Arm Compiler has been used for many years in safety-related applications across a wide range of verticals including automotive, medical, industrial, avionics and railway. To simplify and accelerate the development of safetycertified systems by our customers, Arm offers a comprehensive safety package for the Arm Compiler C/C++ toolchain.

The RTX5 real-time operating system, that is part of CMSIS, is now being extended with a TÜV-certified safety manual (available in Q2’2018). The certification of RTX5 enables the creation of RTOS applications that require ISO 26262 (automotive) or IEC 61508 (industrial) safety standards. Many Arm Cortex-M processor-based microcontrollers include a Memory Protection Unit (MPU) which isolates memory and peripheral regions. An MPU option for RTX5 further improves the safety aspects of embedded applications with built-in process isolation.

At TechCon 2017, Arm introduced the Platform Security Architecture (PSA), which is a holistic set of threat models and security analyses, as well as hardware and firmware specifications. Together with the Trusted Firmware-M (TF-M), which is an open source reference implementation, it enables you to consistently design in a minimum level of security for connected devices.

TF-M addresses PSA firmware runtime isolation level 1 on Armv8-M mainline (Arm Cortex-M33) and there will be incremental support for higher isolation profiles. The initial release aims to provide a constrained PSA runtime implementation and in its first release RTX5 is being used for the prototyping work.

All these software building blocks require the partitioning and the management of system resources during the software design process. CMSIS-Zone is a new CMSIS component that supports developers working on multi-core platforms or who have stricter software isolation requirements that are common to many modern embedded and IoT systems. By providing an effective

mechanism to identify, select and partition resources, CMSIS-Zone allows the end user to focus on their software development rather than configuration of memory protection or tool chain.

CMSIS-Zone includes an interactive tool that seamlessly manages system configuration. It is suitable for single- and multi-processor environments. The CMSIS-Zone tool provides an overview of all available system resources and helps the software architect with the assignment of processor, memory, and peripherals to independent project zones.

At project level, the memory and peripherals can be further assigned to execution zones with MPU regions for safe process execution.

CMSIS-Zone simplifies the system configuration for the following use cases increasingly common in embedded systems: • Multi-core partitioning: running concurrent parts of an application needs well-defined resource assignments to prevent from access conflicts. Project zones help you to partition the peripheral and memory resources of a system.

• MPU protection of RTOS processes: to utilize the memory protection unit (MPU), data and peripheral separation is required.

Execution zones define the access rights to memory and peripherals for each RTOS process. The RTX5 RTOS utilizes this MPU setup to provide safe execution compartments for thread execution.

• The Arm Cortex-M TrustZone configuration requires additional separation for security. Project zones simplify the configuration of the Secure Attribute Unit (SAU) that is available in Armv8-M based devices.

Safety critical embedded systems require detailed validation and verification and several new features in Arm Keil MDK simplify the overall process: MISRA checking and static code analysis with PC-Lint is integrated. The Event Recorder gives insight of timing and data messages in an application. The new ULINKplus enables test automation and analysis of power consumption.

embedded-computing.com/p374530

ARM Ltd.

www.arm.com

28

Embedded Computing Design | Spring 2018

arm.emails@arm.com www.linkedin.com/company/Arm

+1 (408) 576 1500 twitter.com/ArmEmbedded

www.embedded-computing.com

TS-8550-4900 The TS-4900 is a high performance Computer on Module based on the NXP i.MX6 CPU which implements the ARM® Cortex-A9 architecture clocked at 1 GHz (Single or Quad Core) and paired with up to 2GB of DDR3 RAM. Several industry standard interfaces and connections such as Gigabit Ethernet, WiFi and Bluetooth, USB, SATA II, PCI Express, and more make the TS-4900 a great fit for nearly any embedded systems application, especially those needing wireless connections like an industrial internet of things gateway. A wide variety of software platforms are available including Linux, Ubuntu Core, Android, Windows Embedded Compact 2013, and QNX for flexibility in matching your embedded system requirements.

The TS-8550 is a complete platform for development, evaluation, and prototyping with TS-SOCKET macrocontroller CoMs. All signals on the board to board TS-SOCKET connectors are brought out to external connectors on the TS-8550.

FEATURES 

NXP i.MX6 CPU



Single or Quad Core • Up to 2GB of DDR3 RAM



Bluetooth 2.1+EDR (4.0 BLE) and WiFi 802.11b/g/n onboard radios



Gigabit Ethernet • microSD card socket • SATA II port



Up to 70x DIO, 2x I2C, 1x I2S, 2x SPI, 2x CAN



7x COM (TTL), 2x RS-485



Industrial temperature range (-40°C to 85°C)



Yocto, Ubuntu Core, Windows CE, Debian, Droid and QNX



Ideal for Development/Evaluation



RS-232 DB9 Console



5 VDC or 8-28 VDC Inputs • 3x USB Host Ports



10/100/1000 Ethernet Connector



10/100 Ethernet Connector



MicroSD Card Socket • CAN bus and RS-485 Port



Mini PCIe Socket (w/ Half Size Support)



Coin Cell Battery Holder



SATA Connector • SD Boot Jumper



Reset Push Switch • User Push Switch

About Technologic Systems Technologic Systems has been in business for 32 years, helping more than 8000 OEM customers and building over a hundred COTS products that have never been discontinued. We offer a wide variety of single board computers, computer-on-modules, touch panel PCs, PC/104 and other peripherals, and industrial controllers that satisfy most embedded project requirements. Our commitment to excellent products, low prices, and exceptional customer support has allowed our business to flourish in a very competitive marketplace. We also offer custom configurations and design services. We specialize in the ARM and X86 architectures, FPGA customization, and open-source software support, providing advanced custom solutions using hardware-software co-design strategies. embedded-computing.com/p374539

Technologic Systems

www.embeddedARM.com www.embedded-computing.com

sales@embeddedARM.com www.linkedin.com/company/556283/

480-837-5200 @ts_embedded

Embedded Computing Design | Spring 2018

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Embedded Computing Design

Dev Tools and OSs

Embedded Computing Design Resource Guide

Hardware

M-Max 771 PR7/MMS MicroMax’s Quad Core rugged industrial computer with data acquisition features for tough environments. It has been certified to comply with MIL-STD-810G (Method 501.5 – High Temperature (Procedure II) +70°C, Method 502.5 – Low Temperature (Procedure II) -40°C, Method 514.6 – Vibration (Procedure I) – Category 14 (Helicopter), Method 516.6 – Mechanical Shock, Procedure V, Crash Hazard) and airborne MIL-STD-704F (Voltage Distortion Spectrum, Steady State Limits for Voltage (Emergency), Starting Voltage Transients, Power Failure).

The M-Max 771 PR7/MMS enclosure is designed according to the VITA 75 footprint and can be mounted on different vehicle types. Lightweight compact sealed case with patented fanless heat dissipation resists contamination and humidity. Providing shock and vibration protection, the M-Max 771 PR7/MMS can operate under extreme temperatures (-40 to +70 °C). The embedded power supply complies with MIL-STD-704F specification. Standard configuration includes 16 DIO lines. Options include sixteen 16-bit analog inputs, four 16-bit analog outputs and six additional digital I/O lines.

MicroMax, as a manufacturer of industrial computers, takes a customized approach to each client. Our engineering group can design M-Max systems to fit customer-specific technical requirements.

MicroMax Computer Intelligence www.micromax.com

FEATURES  Tested & Complies with MIL-STD-704F and MIL-STD-810G

specifications

 Shock handling up to 40g, Vibration up to 2.5g  Operating temperature from -40 to +70 °C  Rugged construction and sealed case for tough environments  IP66 rated dust and moisture protection  16x digital I/O lines with programmable direction  Optional: 16x 16-bit analog inputs; 4x 16-bit analog outputs;

6x additional DIO lines

embedded-computing.com/p374511

info@micromax.com

www.linkedin.com/company/3004393

+1 (212) 968-1060 @MicroMaxTeam

Hardware

Intel Core Skylake i3/i5/i7 processors PoE fan-less Box PC TAICENN TBOX-3 Series is rugged & compact, high-performance fan-less industrial Box PC product. It adapts 6th Generation Intel Core™ Skylake processors, having advanced computer performance and low power consumption. its storage can support 1x mSATA and 1x 2.5-inch SATA SSD or HDD; The TBOX-3 BOX PC design provide varies of communication interface, with 5x GLAN ports (4 ports support PoE features); 2x USB2.0 ports + 4x USB3.0 ports; 1x RS232 + 1x RS232/RS485 serial ports; 32 Channels GPIO, 16x DI + 16x DO; The power input is wide 9~36V range, has over-current, over-voltage and reverse-polarity protection.

TAICENN TBOX-3 uses full-sealed box structure, and it can prevent dust from entering the device system. Large aluminum fin heat sink can distribute the heat effectively and rapidly, ensures the longer reliability and life-span of the system. TAICENN TBOX-3 operating temp. is -20°C ~ +70°C range, can be suitable for longer-time operating and harsh environment industrial application projects. This Box PC supports mainstream operating system, and it is also compatible with application software based on those operating systems.

TBOX-3 Series is very suitable for current machine vision, image & video acquisition, Industrial network, CNC system, Robots, and other kinds of industrial applications.

TAICENN Technology www.taicenn.com

30

FEATURES  Intel Core Skylake i3/i5/i7/ Celeron processor options  Rugged sealed aluminum box structure and large finned heat sink  5x Intel GLAN network ports, with 4x ports support PoE features  Industrial temp. range -20°C ~ +70°C,

Optional with -40°C ~ +70°C range

 32 channels GPIO, with 16x Digital input and 16x Digital output  4x USB3.0+ 2x USB2.0 and 1x RS232 + 1x RS232/RS485  Expansible with Wi-Fi/3G/4G

sales@taicenn.com

www.linkedin.com/company/13271888/

Embedded Computing Design | Spring 2018

embedded-computing.com/p374506

+86 (755) 2758 2411 @Taicenntech

www.embedded-computing.com

New Sony CMOS Sensors for VC Z Embedded Vision System Series Vision Components supplies several of its small VC Z series smart cameras with more powerful CMOS sensors: Sony's IMX252 and IMX273, providing a resolution of 3.2 MP with 2048 x 1536 px resp. 1.6 MP with 1440 x 1080 px.

The sensors provide framerates with 88 fps resp. 170 fps in this format, at lower resolutions, even higher speeds can be achieved. Both are 2nd generation Pregius series sensors employing global-shutter technology. Benefits over rolling shutters or CCDs: there is no bloom, smear, distortion, or overexposure in images captured with global shutter CMOS sensors. Despite its high resolution, the new sensors feature a compact footprint of 1/1.8" resp.

1/2.9". It is housed on a 23 x 35 mm board and can be used with a wide range of lenses. The compact design entails a small pixel size of only 3.45 µm, which is significantly smaller than the pixel of lower-resolution CMOS sensors. The image quality, however, does not suffer from this. Sony has compensated for the lower saturation capacity per pixel due to the smaller surface by technical optimization of the products: thanks to extremely low temporal dark noise and a wide dynamic range, they ensure very crisp, virtually noisefree pictures even under difficult ambient conditions with low light levels.

VC Z series embedded vision systems are available with a standard housing or an IP67 protective housing and as PCB versions. The board cameras are highly suitable for integration in a wide range of industrial applications, with a line-up including cameras with an onboard sensor and others with one or two remote heads on separate PCBs.

Vision Components GmbH

www.vision-components.com

FEATURES       

Sony Pregius CMOS Sensor IMX252 Sony Pregius CMOS sensor IMX273 Embedded Vision System/Smart Board Camera OEM Camera with remote sensor soard Small dimensions of board camera: 23 x 35 mm Freely programmable for all applications ZYNQ module combing ARM + FPGA for imaging tasks embedded-computing.com/p374532

info@vision-components.com +49 7243 2167-23 www.vision-components.com/en/products/oem/arm-linux/board-cameras/vcsbc-nano-z-rh-0252/

P 2eodwe f1or8free aodrmldis.dsioe /nvoucher E-c

w

dded-

embe

Nuremberg, Germany

27.2 – 1.3. 2018 Exhibition organizer NürnbergMesse GmbH T +49 9 11 86 06-49 12

DISCOVER INNOVATIONS Immerse yourself in the world of embedded systems and discover innovations for your success.

embedded-world.de

F +49 9 11 86 06-49 13 visitorservice@nuernbergmesse.de Conference organizer WEKA FACHMEDIEN GmbH T +49 89 2 55 56-13 49 F +49 89 2 55 56-03 49 info@embedded-world.eu

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Industrial