POWER & ENERGY EFFICIENCY HANDBOOK
Optimizing discrete SiC devices Dr. Anup Bhalla | UnitedSiC
SiC FETs now include measures aimed at keeping losses down while managing fast switching waveforms.
Silicon carbide (SiC) FETs have low onresistances, fast switching speeds, and intrinsic diodes with low reverse recovery charge (QRR) and low forward-drop (VF) qualities. These qualities make SiC FETs suitable for use in active-front-end threephase rectifiers, totem-pole power-factor correction (PFC) stages, interleaved PFC circuits, phase-shift full bridges, LLC and dual active-bridge circuits. To get the best from these devices, it is important to understand how system layout, thermal, power density and EMI constraints affect their performance.
UnitedSIC’s SiC FETs are cascoded devices formed by co-packaging a silicon MOSFET and a SiC JFET. It is useful to briefly explore what the cascode structure brings to SiC components. As a quick review, a cascoded JFET and MOSFET consists of a low-voltage MOSFET with its drain connected to the source of the JFET. The JFET gate is connected to the MOSFET source. The input to the cascoded combination is the gate of the MOSFET; the drain is the JFET drain, and the source is the MOSFET source. A JFET is normally on, and the The circuit at left shows MOSFET is normally off. The JFET VGS is how the common-
The benefits of a Kelvin connection Gate driver PWR
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DESIGN WORLD — EE NETWORK
United SiC — P&EE HB 10-19.indd 44
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source inductance can reduce the voltage available at the FET gate because of the voltage drop across it caused by the rapidly changing load and gate currents through it. On the right, a Kelvin connection has been added to return the gate current so the large voltage drop induced by the main load current in the common source inductance no longer reduces the bias on the gate. This results in faster switching.
Load GND eeworldonline.com | designworldonline.com
10/10/19 9:27 AM
